US 3894506 A
A system of driving a plasma display panel is disclosed using a pair of independently driven impedance devices coupled to each horizontal and vertical drive line and which requires a source of direct current operating through electronic switching devices associated with each impedance device to form a distributed driver matrix selection scheme for each display element in the panel.
Description (OCR text may contain errors)
United States Patent Mayer et al.
[ PLASMA DISPLAY PANEL DRIVE APPARATUS Primary ExaminerR. V. Rolinec Assistant E.taminer-Lawrence J. Dahl  Inventors: William N. Mayer, White Bear Lake; Richard A. Strom At/orne}, Agent, or Firm William J. McGmnis. Jr. Minneapolis, both of Minn.
 Assignee: Control Data Corporation,  ABSTRACT Minneapolis, Minn.
 Fil d; F b, 25, 1974 A system of driving a plasma display panel is disclosed using a pair of independently driven impedance de [2 1] App! 445754 vices coupled to each horizontal and vertical drive line and which requires a source of direct current operat-  0.5, CI H 315/169 TV; 315/169 R ing through electronic switching devices associated  Int. Cl. HOSB 37/00 with each impedance device to form a distributed  Fi ld f S a h H 315/169 R 169 TV driver matrix selection scheme for each display element in the panel.  References Cited UNITED STATES PATENTS 3 Claims, 7 Drawing Figures 3,573,542 4/l97l Mayer et al 4. 315/169 R yAxls ELECTRODES l0 D\SP|J\Y PANEL 6 1;; 'fi V; c
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X -X Aaus Y Y Axas 5 -SELECTED U -UNSELECTE SHEET \lxs Vxy SELECTED cau.\
Vys c: V ya F1354 ELECTRODE VOLTAGES v \IE Vxs FL U FL V VyS FL FL U Us 02 o VXLl c [L 1 \IE on U ceu. voL-rnees (\Ix-Vy) V Ve/ 0R Vxs- Vyu O "V U \IE/ OR SELECTED CELL 'PARHAL SELE T CON D \T IONS ERASE SUSTMN QICLEW SUSTMN CYCLE FIE. 347
PLASMA DISPLAY PANEL DRIVE APPARATUS BACKGROUND OF THE INVENTION This invention relates to the field of plasma display panels and more specifically to selection and drive systems for such panels.
Generally, present schemes for driving plasma display panels require at least two special purpose sources of drive voltage which is to be applied to the horizontal and vertical drive lines to enable the panel to function in write. sustain. and erase modes. There is an obvious cost saving in plasma panel drive systems using only a direct current drive voltage source to incorporate these three necessary functions in a plasma display. The drive system according to the present invention may be used in a presently preferred embodiment requiring only direct current souces of drive voltage.
In addition, in order to provide unique selection for each individual cell in the display, it typically has been necessary to provide at least three components per drive line to provide this unique selection. Typically, these three components have consisted of a capacitor, a resistor, and a comparatively expensive diode. Considering a panel with a substantial display area and having a substantial number of horizontal and vertical drive lines, a saving of even a single component per drive line would provide significantly reduced cost and a simplified panel structure. A simplified structure is particularly important when considering the comparatively small space within which these components are to be assembled into an operative structure. Although many patents have now been issued relating to various drive systems for plasma display panels or combination plasma display panels and drive systems, US. Pat. No. 3,573,542 is representative of the techniques still commonly in use for driving plasma display panels. One of the purposes of the present invention. therefore, is to produce a drive system having a lower number of components which must be duplicated for each drive line as well as providing a drive system requiring 21 fewer number of different types of parts in the drive system. The present drive system, to be described below, for example, required only switching transistors and capacitors to implement the drive system as opposed to resistors, diodes and capacitors.
US. Pat. No. 3,681,655 shows a proposal for driving a plasma panel display system using coupling capacitors to couple the drive voltage in the display to the drive line electrodes. This patent shows separate drive elements for each line, however, where the present invention is directed to a matrix selection method which reduces the number of switching elements and capacitors. Moreover, the switches disclosed in the referenced patent modulate the amplitude of a drive source generator which is impressed on the drive line electrodes. The present invention differs in that the matrix switching elements, to be described in detail later, actively generate the rectangular pulses to drive the display panel.
One further distinction between the referenced patent and the present disclosure, as will become clear as the invention is explained in more detail, is that the present system employs single pulses, properly timed, for the write and erase functions whereas the patent discloses a system which requires a waiting interval for internal wall charge decay before the erase function can be accomplished.
SUMMARY OF THE INVENTION This invention consists of a matrix selection, voltage dividing, impedance network connected to each of a plurality of orthogonally positioned drive lines in a plasma display panel. This invention may be used in connection with planar plasma display panels where the impedance network can consist of capacitive elements formed on the panel substrate. Of course, other known types of panel, such as the capillary tube panel, may be formed with capacitive elements formed or generated on a substrate for connection to the display grid to provide the impedance devices.
Two capacitors, each with an associated electronic switching device. are provided for each drive-line electrode and may be of generally approximately the same capacitance, which in a specific example might be approximately IUO picofarads. Capacitors of this size could be easily fabricated or deposited and interconnected as an integral part of a panel structure. particu larly the planar plasma panel structure in the pending patent application Ser. No. 292.598. This type of integral construction would greatly cut down or reduce as compared with the prior art the number interconnections required to the display panel itself from the drive system.
Because of the unduly long time constants associated with the use of resistors in a coupling matrix, former display panel drive methods could not be written and erased at a high rate of speed. The present invention, having no resistors in the drive circuitry allows a display panel to be written and erased with high speed pulse trains.
The speed of the display system is therefore limited by the speed with which the plasma discharge matures and the switching speed of the drive transistors. Thus, even though there is capacitance associated with each of the drive line elements in the panel. the operating margins for a display system of the present type is probably limited by the memory margin of individual display elements in the panel as defined by type of gas in the panel, pressure of gas in the panel. inter-electrode spacing within the panel. etc. The use of direct coupled drive elements for both selection of erase and write functions as well as the normal sustain function means that no separate sustain driver is required for a plasma display panel as is typical of the prior art. Typical prior art constructions require switching from a sustain driver to write or erase drivers in order to modify the display on the panel. Thus, a separate electronic sustain driver circuit is not required in the present invention as in the prior art.
In the figures:
FIG. I is a schematic diagram of a plasma display panel incorporating the drive system of the present in vention.
FIG. 2A is a sketch of a four element plasma display panel used to illustrate the write cycle in a plasma display according to the present invention.
FIG. 2B is a graph of the electrode voltages for each of the four electrodes of the panel shown in FIG. 2A to illustrate a write cycle in a plasma display according to the present invention.
FIG. 2C is a graph of the impressed voltages on each of the four display elements of the panel shown in FIG. 2A to illustrate a write cycle with the electrode voltages shown in FIG. 2B.
FIG. 3C is a graph of the impressed voltages on each I of the four display elements of the panel shown in FIG. 3A to illustrate an erase cycle with the electrode voltages shown in FIG. 33.
DESCRIPTION OF THE PREFERRED EMBODIMENT Throughout this application. reference is made to a drive system for a matrix of plasma display elements. This system is generally applicable to any such display element, for example. the elements of the planar panel disclosed in application Ser. No. 292,598, assigned to the same assignee as is the present invention, and including but not limited to display cells such as disclosed in Bitzer et al. US. Pat. No. 3,559,l90.
Referring now to FIG. 1, a plasma display panel is shown diagrammatically as a grid of X axis electrodes I2 and Y axis electrodes 14. Each electrode for the X axis is connected with two capacitors l6 and 18, one, I6, associated with a group driver and the other, 18, associated with a segment driver 22. Similarly each electrode for the Y axis is connected with two capacitors 24 and 26, one, 24, associated with a group driver 28 and the other, 26, with a segment driver 30. The matrix principle employed is that by the selection of one of a plurality of group drivers, an X axis or Y axis electrode may be uniquely selected. Of course, the selection ofa single X axis electrode and a single Y axis electrode results in the unique selection of a display element in the panel.
Referring again to FIG. I, the various drivers are shown as being connected to voltages V1, V2, V3 and V4 through switches 32 shown schematically in each instance. The switches may be, for example, transistor switches which are operated one at a time to pull the electrode voltages either to V1 or to V2. V2 is the lower of the two voltages and may even represent ground potential whereas V1 is a voltage having sufficient magnitude to fire the display element in the plasma display panel. Voltages V3 and V4 may be the same as V1 and V2 except in the case of the write and erase functions to be explained.
Each switch 32 is assumed to operate like a singlepole single throw switch and therefore, the schematic showing is intended to define such a switch without limiting the switch to being necessarily a transistor driver as previously described. The capacitors 24, 26, I6 and 18 will have a capacitance greater than the display element capacitance of the panel so that the voltage at the display elements will be almost the same as if the capacitors were not present.
In operation, the write selection mode of the plasma display panel according to the present invention may be explained by first assuming that the drivers on the X axis are connected to V and ground and the drivers on the Y axis are connected to V/2 and minus V/2. It should be noted that V/2 is a partial select condition. If the selection mode is defined with proper margins. the V/2 voltage will not interfere with the desired operation of the panel.
Referring now to FIG. 2A, a simplified diagram of a four element display panel is shown. For purposes of describing the invention, this panel is subject to all of the drive voltage conditions of a larger panel. The drive electrodes for each display element are labeled according to the key on the figure and the display elements are designated by the pair of drive electrodes associated therewith. For example, the display element or cell which is to be written, and which is designated selected cell in the figure. is denoted by (Vxs, Vys). Cells denoted (Vxs, Vyu) and (Vxy, Vys) each receive a partial select voltage while the cell denoted by (Vxu, Vyu) receives a voltage which will not interfere with the normal sustain voltage pattern. Electrode voltages for the display panel of FIG. 2A are shown in FIG. 2B for a write cycle. Note that the unselected electrodes, Vxu and Vyu, may be impressed with either a V/2 voltage or zero voltage.
Referring to the operation of the panel shown in FIGS. 2A, 2B and 2C, a drive selection scheme similar to that shown in FIG. I may be used to operate between the drive voltage V and ground potential. Each pull-up and pull-down transistor driver for all of the X axis and Y axis electrodes is assumed to operate like a single pole. single throw switch. Each driver, whether group or segment, connects its associated capacitor to the drive voltage V or to ground. Assuming the line capacitors are much larger than the inter-electrode capacitance, the voltage on the display electrodes may be calculated as if the capacitors and drivers are regular voltage dividing, impedance networks. A voltage of W2 is a partial select condition and the voltages in the panels must be adjusted so that this will not provide a false selected condition.
Referring to FIG. 2A, the drivers on the X axis are connected to V3 V and V4 0 potential and the drivers on the Y axis are connected to Vl V/2 and V2 (2/V), for the write mode. A power supply level shifter. which may be of conventional design, is employed to make this change from the normal sustain voltage which is the same as that applied to the X axis. This correlates to voltages V1 and V2 shown with the drivers in FIG. 1. The possible voltages which may be produced on X axis electrodes are: 0, W2 and V. The possible combination of voltages on the Y axis electrodes, in the write mode, will be V/2, 0, and -(V/2)/ The voltage across a particular display cell or display element will be the difference between the voltage on the X electrode and the Y electrode which intersect at that cell. The highest possible potential across a given display cell is 1% V which corresponds with a voltage V on the X electrode and a voltage -V/2 on the Y electrode. This is the voltage which will be used to write in a selected display cell, which operation is defined as causing a cell to produce a visible display when thereaf ter subjected to the sustain voltage wave form where it had not previously produced a display. FIGS. 28 and 2C show in detail the write operation as well as the electrical condition to which the other cells in the display panel are subjected. These conditions represent all possible conditions even for a larger panel.
Referring now to FIGS. 3A, 3B and 3C, similar diagrams are shown for the erase operation in a display panel. The erase operation is defined similarly to the write operation except that a lighted cell no longer produces a display. Erasing a cell which is producing a display is a polarity sensitive operation in which the cell receiving +V will erase the selected cell. However. the cell with V,; will not erase because the preceeding sustain pulse was of the same polarity. Referring to FIG. 1, V1, V2, V3 and V4 are set to provide the voltages shown in FIG. 3B.
The drive system of this invention with the direct coupled drivers requires no separate sustain driver. as in some other drive systems, to drive the display panel. All the drivers for an entire panel will be switched synchronously to perform as a distributed direct coupled driver in the sustain mode for the panel. The write and erase switching will occur on appropriate drive electrode synchronously with the sustain switching. With V Vsmmm V then 1V2 V will be an appropriate write voltage while V/Z can be used as an erase voltage. During the sustain cycle, all the drivers for both axes will be connected to V and ground. The maximum voltage appearing accross the drive transistors would be V For writing the drivers on the Y axis. only, are shifted so that Vl V/2 and V2 -V/2, referring to the notation of FIG. 1. This voltage shift is preferably performed prior to selectively operating the transistor switches in the write mode. but may be performed after initiating the write selection. For operation in the write mode, the transistor will not be required to withstand voltages greater than V Instead of using capacitors. it is also possible to use resistors as the impedance devices. For example, K ohm resistors might be substituted for the capacitors (l6, 18, 24 and 26) shown in FIG. 1, this value being only approximate, as an example, and not intended to be limiting.
What is claimed is:
1. Apparatus for driving a plasma display panel of a type having a plurality of drive lines comprising a first group and a second group of drive lines in generally orthogonal relationship in a matrix arrangement and in which orthogonal pairs of said drive lines uniquely specify all display elements in the panel, said apparatus comprising:
a pair of impedance devices connected to each of said drive lines;
a first direct current voltage source having a first output associated with said first group of drive lines and a second output associated with said second group of drive lines;
a second direct current voltage source having a first output associated with said first group of drive lines and a second output associated with said second group of drive lines;
a plurality of first group drivers, each of said drivers comprising electronic switching means for selectively interconnecting said first voltage source. said second voltage source. or no voltage source to one of said impedance devices, each connected with a drive line of said first group and the first outputs of said first and second voltage sources:
a plurality of first segment drivers, each of said drivers comprising electronic switching means for selectively interconnecting said first voltage source. said second voltage source, or no voltage source to the other of said impedance devices. each connected with a drive line of said first group, and the first outputs of said first and second voltage sources; the interconnections of said first group drivers and said first segment drivers being a matrix inter-connection such that the selection of one of said group drivers and one of said segment drivers uniquely identifies a single drive line from said first group.
a plurality of second group drivers, each of said drivers comprising electronic switching means for selectively interconnecting said first voltage source. said second voltage source, or no voltage source to one of said impedance devices. each connected with a drive line of said second group and the second output of said first and second voltage sources;
a plurality of second segment drivers. each of said drivers comprising electronic switching means for selectively interconnecting said first voltage source, said second voltage source. or no voltage source to the other of said impedance devices each connected with a drive line of said second group and the second output of said first and second voltage sources. the interconnections of said second group drivers and said second segment drivers being such that the selection of one of said group drivers and one of said segment drivers uniquely identifies a single drive line from said second group; and
control means for operating all of said drivers to produce a desired display on said panel.
2. The apparatus of claim 1 in which said impedances are capacitors.
3. The apparatus of claim 1 in which said second voltage source is a ground potential.