US 3899968 A
An "on-the-fly" printer is provided which utilizes an interchangeable print member. The interchangeable print member carries a coded identification tag which is sensed by the printer and compared with a verification code presettably stored in the printer. If the identification and verification codes fail to correspond, printing is inhibited.
Claims available in
Description (OCR text may contain errors)
United States Patent [1 1 McDevitt [451 Aug. 19, 1975 PRINT MEDIA IDENTIFICATION CODE Bernard J. McDevitt, Norristown, Pa.
 Assignee: Sperry Rand Corporation, Blue Bell,
 Filed: Jan. 16, 1974 [21 Appl. No.: 433,624
 US. Cl ..101/111; lOl/93.l4
 Int. Cl. B41J 1/20  Field of Search 101/93 C, 111; 340/1725, 340/1461 [5 6] References Cited UNITED STATES PATENTS 3,303,776 2/1967 Rausch 101/93 C 3,314,360 4/1967 Foster 101/93 C X 9/1971 McDowell et al.,. 101/93 C Guzak lOl/93 C 3,699,884 10/1972 Marsh et a1. 101/93 C OTHER PUBLICATIONS IBM Technical Disclosure Bulletin, Gilborth et al., Vol. 15, No. 10, March 1973, pp. 3113-3114.
Primary Examiner-.1. Reed Fisher Assistant Examiner-Edward M. Coven Attorney, Agent, or FirmCharles C. English; Sheldon Kapustin; William E. Cleaver [5 7] ABSTRACT An on-the-fly printer is provided which utilizes an interchangeable print member. The interchangeable print member carries a coded identification tag which is sensed by the printer and compared with a verification code presettably stored in the printer. If the identification and verification codes fail to correspond, printing is inhibited.
4 Claims, 6 Drawing Figures PATENTEDAUB1 91975 SHEET 2 BF PRINT MEDIA IDENTIFICATION CODE BACKGROUND This invention relates to an on-the-fly printer for a data handling system.
In general, an on-the fly high speed printer system comprises a paper guide and feed mechanism; a constantly moving print member; a print line buffer memory in which the characters comprising a line of data to be printed are stored, usually in binary coded form; a series of print hammers, usually one for each print column; and a code generator for generating binary coded signals representative of the print characters contained on the print member. The print characters contained on the print member are arranged so that during each cycle of print member movement an entire set of characters (a font) will scan past each columnar printing position of a print line. The code generator, which is synchronized with the print member movement, operates to produce binary coded signals representing the characters on the print member that are in a printing position. The coded signals produced by the code generator are compared on a column by column basis with the coded data characters stored in the print line buffer memory and the corresponding columnar print hammers are actuated to effect printing wherever there is a match between the 'character codes generated by the code generator and the character codes being read from the print line buffer memory.
In the prior art, such as is typified by U.S. Pat. No. 3,282,205 which uses an oscillating bar as its print member and U.S. Pat. No. 3,303,776 which uses a constantly moving band as its print member, means are provided to facilitate the use of interchangeable print members. In more particular these patents show the substitution of a code buffer memory for the code generator. The code buffer memory is arranged to be loaded with a set of character codes corresponding to the print characters contained on the print member, and then during the printing cycle the two buffer memories are read out in synchronism during the character comparison operation. With this arrangement it is only necessary to change the code stored in the code buffer memory whenever the print member is replaced by another print member having a different character set. This facility avoids having to replace the code generator each time the print member is replaced by another member having a different character set.
From the foregoing description it will be recognized that the above printer systems can be improved on, if means are provided to enable printing only if the code stored in the code buffer memory is verified to correspond to the character set contained on the print member being used in the printer. Such verification can be used to an advantage where, for example, it is desirable that each customer utilize his own uniquely identifiable print member or more generally, in any situation where the print member is interchangeable with other print members having different character sets.
It is therefore an object of this invention to interlock the code character set stored in the code buffer memory with the character set contained on the print member.
SUMMARY OF THE INVENTION This invention provides a means whereby the character code stored in the code buffer of an on-the-fly high speed printer is interlocked to the character set contained on the print member of the printer. In accordance with the invention, each interchangeable print member carries an identification tag, coded to identify the particular character set carried by the associated print member. A sensing means is located within the printer and is arranged so that as the print member is moved during the operation of the printer the identification tag is sensed. A first storage register is coupled to the sensing means and operates to store the identification tag read from the print member. A second stor age register is added and operates to store a verification tag which is coded to identify the character set stored in the code buffer memory. The identification and verification tags stored in the first and second registers are compared in a comparator, and means are rendered operative in response to an output from the comparator to inhibit printing when the compared tags from the comparator to inhibit printing when the compared tags disagree and to enable printing when the tags agree.
IN THE DRAWINGS FIG. 1 is a block diagram which shows a typical prior art system in which the present invention may be incorporated;
FIG. 2 is a perspective view of the print member included in the present invention;
FIG. 3 is a fragmentary view of the print member 38 shown in FIG. 2;
FIG. 4 is a block diagram of a prior art type of printer control to which a portion of Applicants invention has been added.
FIG. 5 is a block diagram showing the remaining portion of Applicants invention; and
FIG. 6 shows a set of time sequence drawings useful in explaining Applicants invention.
DESCRIPTION Reference is now made to FIG. 1 where a conventional on-the-fly" high speed printer of the type shown in the aforementioned patents is illustrated. As shown, the block 10 represents any suitable data source such as a tape unit if off line printing operations are contemplated or a central processor if on line printing operations are contemplated. U.S. Pat. Nos. 3,400,371, 3,303,476 and 3,508,194 are illustrations of on line I/O systems where the source 10 is a data processor. In either event, both the code characters to be stored in the code buffer and the print data to be stored in the print buffer are supplied from the device 10 to the printer electronics circuity 11 over a data bus 12. Bus 12 may typically comprise eight parallel lines over which the bits of an eight bit binary coded signal byte are transmitted one byte at a time. Each byte represents a data character. Again in the case where the source 10 is a Central Processor, a second data bus 12a similar to bus 12 may be used to send status information from the printer to the Central Processor 10. Included within the printer electronics circuitry at 11a are the print line buffer and code buffer memories. It will be understood that section 11a also includes the usual read/write control and addressing circuits for the code bufier and print line buffer memories. The addressing circuits are operated so that the code characters received from the source 10 are stored in successive address locations of the code buffer and the successively received print data characters are stored in succesive address locations of the print line buffer. Also included in the printer electronics circuitry is a control section 11b which typically may include, inter alia, a command register for storing command signals received from the data source a command decoder for decoding the output of the command register; a number of control flipflops for generating control signals used to govern the operation of the printer; a clock pulse generator for generating a series of timing pulses used to time the operation of the printer circuits; and one or more counters for counting certain repetitive events such as the number of signal bytes of data received from the data source 10. Shown external of the printer electronics component 11 but which may actually be included therein is a comparator 13; a comparator output gate 14, a comparison match counter 15, and a count detection circuit 16. Also included within the organization of FIG. 1 is the printer mechanism 17 which, it will be understood, typically includes the paper and ribbon guide and feed mechanisms; the print hammers and actuators therefor; a hammer selection matrix; and the print member which in this case is assumed to be a print band carrying one or more complete character sets thereon. The printer mechanism 17 further includes means for generating periodic synchronizing pulses on line 19 and periodic sprocket or index pulses on line 22. The synchronizing pulses are developed each time the print band moves into a reference position such as when the first character of a character set comes into alignment with the number one column print hammer. The index pulses, on the other hand, are generated each time the print band moves one columnar position.
The general operation of the printer of FIG. 1 is as follows: At the start of the printer operation and before the print band character code has been stored in the code buffer memory, the data source 10 transmits a control signal over a first one of the lines comprising a control cable 18 to indicate to the printer that the data being transmitted over the bus 12 comprises the print band character codes. In practice the code characters are transmitted over the bus 12 one eight bit character byte at a time, and each successive character is stored in successive address locations of the code buffer mem' ory. The code buffer itself usually has as many character address locations as there are characters on the print band. For instance, assume that the print band in the mechanism 17 uses a 48 character set, repeated eight times on the band, then the code buffer would contain 384 character locations. Following the transmission of the print band code characters, the data source 10 activates a second control line comprising.
the cable 18 to indicate to the printer that the data being transmitted over the data bus 12 comprises the line of data characters to be printed. When this occurs the data appearing on the bus 12 is switched to the print line buffer memory where successive data bytes are stored in successive address locations. The print line buffer may typically include 160 character locations one for each column of a print line. After both the code and print line buffers are loaded and the printer is ready to start a printing operation the control logic 11b activates control line 14b thereby enabling the and gate 14. Thereafter a synchronizing signal appearing on line 19 in combination with an index pulse on line 22 is applied to the control logic section 1 1b to start the synchronized read out of data and code characters from the print line and code buffers to the comparator 13. The read out is cyclic in that each time an index pulse appears on line 22 each character on the print band presently in a printing position has its code read from the code buffer and each of the corresponding columnar data characters stored in the print line buffer are read out synchronously therewith. This read out action is repeated until, at least, all of the print characters comprising a set have scanned past each of the print columns.
The code character being read out of the code buffer appears as eight bits in parallel on an eight bit line represented at 23 while the eight bits comprising a print data character appear as eight bits on eight parallel lines represented at 20. The two sets of parallel lines 23 and 20 serve as the inputs to a conventional comparator 13. The latter component operates to produce an output each time the respective inputs thereto compare or match. Thus whenever, comparator 13 produces an output when line 14b is activated, gate 14 produces a hammer firing signal which is applied to the hammer actuation matrix in the mechanism 17. The hammer actuation matrix routes the firing signal to the columnar hammer whose position produced the output from the comparator 13. At the same time the output of gate 14 is also applied to a comparison match counter 15 which counts the number of matched outputs from the comparator. After the counter 15 has counted a predetermined number of matches, corresponding for instance to a complete line of print, a detection circuit 16 which is coupled to the counter 16, detects the predetermined count registered by counter 15 and sends a print end signal to electronic control section 1 lb via lead 21. The control section 11b responds to the print end signal to stop further printing by deactivating control line 14b. The control section 11b may also respond to the print ending signal to transmit a service request sig nal over one of the control lines 18 to the data source 10 to request the next line of print data or in the alternative it may send a status bit over bus 12a to source 10 to indicate the printer status.
FIGS. 2 and 3, to which reference is now made, show in diagrammatic form the interchangeable print member 38 used in this invention. As indicated heretofore, the print member comprises an endless band 38, typically steel, on which a series of printable characters 45 have been embossed. In practice, each interchangeable band contains its own unique character set (font). The font, for purposes of increasing the printing rate of the printer, is generally repeated a number of times along the band. For example, a 48 character font repeated eight times along the band is typical in a data processing application. For scientific and other applications, a 24 character set repeated 16 times along the band is also typical. The band, which is detachably mounted on a pair of rotatable spindles 39 and 40, is situated in the printer so that as the band is driven by one of the spindles 39 or 40, the characters 45 will sequence past each of the columnar print hammers in the printer.
Formed on the band along one edge thereof are the index or sprocket marks 44, one for each character, while formed along the other edge of the band is a set of synchronizing marks 43. The set of synchronizing marks appear at the beginning of each character font contained on the band. Where the band 38 is formed from a magnetic alloy the marks 43 and 44 may be magnetically recorded or embossed on the band. The synchronizing marks 43, according to this invention, in addition to denoting the start of character font, are coded to identify the band 38 itself. For example, in the present illustration, ten possible marks are used as a synchronizing set. The first and tenth marks, 43a and 43b (FIG. 3) respectively, are, for reasons later to be described, always present while the remaining eight marks are binary coded by their presence or absence to form the band identification tag. For example, in these figures the band code, omitting the first and th marks, is 00100100.
Positioned along the path of travel of the band 38 are a pair of pickup devices 41 and 42, one for each of the tracks defined by the sets of marks 43 and 44. If the marks are embossed, the pickup devices 41 and 42 may be of the variable reluctance type, while if the marks are magnetically recorded, magnetic pickup elements may be used. Similarly, if the marks are optical in nature, then optical sensors can be used for elements 41 and 42.
Reference is now made to FIG. 4 which shows a portion of the printer control circuits 11b of FIG. 1. The circuit of FIG. 4 is conventional, except for flip-flop 32 and gate 35 which have been added to implement my invention. As illustrated in this figure, the eight parallel lines comprising the data bus 12 (FIG. 1) are applied in parallel to a first set of eight and" gates represented at 25 and a second set of eight and gates represented at 26. The parallel outputs of the first set of gates 25 are applied to the respective inputs of an eight stage flipflop command register 27, while the parallel outputs of the second set of eight and gates 26 are applied to the respective inputs of an eight stage data register 28. The command register gates 25 are enabled by the control line 18 from source 10 (FIG. 1) whenever the source 10 transmits a command byte over bus 12 to the printer. Similarly the data register input gates 26 are enabled by the control line 18" from source 10 whenever source 10 transmits a data byte (a code character or a print character) on the bus 12 to the printer. Command bytes are stored in the command register 27 and data bytes, such as code characters or print characters, are stored in register 28. The registers 27 and 28 are conventional and provide temporary storage for the received signal bytes. It will be understood that each register is cleared before an incoming signal byte is stored and that while the clearing circuits for these registers are not shown they are well known. The eight bit output of the command register 27 is applied via an eight bit parallel signal path 50 to the input of a conventional decoder network 29. The decoder 29 decodes the eight bit output from register 27 to activate one of its output lines in dependence on the command stored in register 27. Only two such output lines 46 and 47 labelled print" and load respectively are shown, but it will be understood that other outputs such as advance paper etc. would be provided. The eight line output of the data register 28 is applied via an eight line path 49 in parallel to three sets of eight and" gates represented at 33, 34 and 35. The first set of eight and gates 33 connect the output of the data register 28 to the write input circuits of the print line buffer memory (not shown) while the second set ofand gates represented at 34 connect the output of data register 28 to the write input circuits of the code buffer memory (also not shown). The third set of eight and" gates 35 connect the output of the data register 28 to the input of a verification register 67 shown in FIG. 5 and later described.
Three flip-flops 30, 31 and 32 are used to control the operation of the three sets of and gates 33, 34 and 35. In particular, the set output of flip-flop 30 is connected via line 53 in parallel to the eight and gates represented at 33. The set output of flip-flop 31 is connected via line 54 in parallel to the eight and gates represented at 34 and the eight and gates represented at 35. Finally, the set output of flip-flop 32 is connected via line 55 in parallel to the eight and gates 35 while the reset output of this flip-flop is connected in parallel to the eight and gates 34. A signal strobe line 24 taken from the input data source 10 is connected in parallel to all of the gates represented at 33, 34 and 35.
The flip-flop 32 differs from the flip-flops 30 and 31 in that it includes an edge triggering input terminal (E), a data input terminal (D), and force set (S) and clear (C) input terminals. The edge triggering input terminal (E) of flipflop 32 is, for reasons to be later described, connected to the strobe line 24 through an inverter 1. The flip-flop 32 may be, for example, type SN7474 manufactured by Texas Instruments as advertised in their 1973 catalog.
During printer start up the command sequence issued to the printer from the source 10 over bus 12 includes among other commands, a load command followed by a print command. In FIG. 6, waveform A is representative of the signal byte sequence of each of the load and print commands. In this waveform the first signal byte represents the command itself. For example, in the case of the load command, the first signal byte is coded so that when it is stored in register 27 and decoded by decoder 29 it will activate the load line 47; while in the case of a print command the first byte in waveform A is coded so that it will activate the print line 46 from the decoder 29 when it is stored in register 27. Further, in the case of the load command the data byte No. l of waveform A is the code verification byte for the printer band whose sequence of print characters are represented by the data bytes No. 2 to No. n. In the case of the print command, however, the data bytes designated No. l to No. n in waveform A represent the data characters to be printed on a line of print.
The operation of the circuit of FIG. 4 is as follows: First assume that all of the flip-flops 30, 31 and 32 have been set to their cleared or reset state by an initial clear signal (IC). In this condition, none of the gates 33, 34 or 35 are active. Source 10 activates control line 18' and transmits a load command (first signal byte of waveform A, FIG. 6) over bus-l2 to the printer. Activating the control signal line 18' stores the load command byte in register 27. Decoder 29, in response to the command byte stored in register 27, activates the load line 47 to set flip-flops 31 and 32. Next the source 10 activates control line 18" and transmits the No. 1 data byte of waveform A, FIG. 6, over bus 12 to the printer. This byte is the verification code for the printer band.
The No. I data byte is thus stored in register 28 and the output of this register is applied via path 49 to all three sets of the gates 33, 34 and 35. At this point gate 35 is fully conditioned by the set outputs of flip-flops 31 and 32 and the further input thereto over line 49.
Then at strobe time, source 10 transmits a strobe pulse, as shown by waveform B of FIG. 6, over line 24 to gate the output of register 28 in parallel through gates 35 and the eight bit path 48 to the parallel inputs of the verification register 67 shown in FIG. 5. Register 67 now stores the code verification byte.
The strobe pulse appearing on line 24 is transmitted from the source 10 each time a code or print character is sent to the printer over bus 12 as shown by waveform B of FIG. 6. The trailing edge of the strobe pulse acts to reset flip-flop 32. Thus after the load command has set flip-flop 32, and the verification byte has passed through gates 35, flip-flop 32 is returned to its reset condition where it remains in the absence of any further setting inputs to the set input terminal S. Resetting control flip-flop 32 inhibits gate 35 and conditions gate 34 so that signal byte No. 2 and all succeeding code bytes associated with the load command are gated through gates 34 to the code buffer (not shown). A byte counter 36 receives the buffered output from the gates 34 and counts the code bytes received from the source 10. After a predetermined number of such bytes have been received (one for each print character on the band) counter 36 activates its output 37. Output 37 is applied to the reset input of the load flip-flop 31 to reset this flip-flop and disable gate 34. At this point, the code buffer has been loaded with the character codes from data source 10. While not shown, the output from counter 36 also causes the control circuits 11b to pro duce a service in signal on one of the control lines 18 to signal the data source 10 to transmit the next command word. In this case the next command is assumed to be a print command. The data source 10 responds, if there are no inhibiting contingencies, by activating line 18' and transmitting the print command byte (first byte of waveform A, FIG. 6) over bus 12. The gates 25 being activated by line 18' gate the print command into register 27. The output of register 27 is decoded in decoder 29 to activate the print line 46 and thus set flip-flop 30. The set output of flip-flop 30 conditions gate 33. Following the receipt of the print command, the source 10 activates control line 18 and the data bytes which comprise a line to be printed (bytes No. l to n of FIG. 6) are sequentially stored in register 28 from where they are transmitted through the now conditioned gate 33 to the write inputs of the print buffer memory (not shown), where they are stored. Again, a byte counter such as shown at 50 is connected to receive the buffered output from gates 33. When counter 50 counts a number of characters corresponding to the characters to be printed on a line, it produces an output on terminal 51. Terminal 51 connects to the reset input terminal of flip-flop 30 to reset flip-flop 30 and thereby disable gates 33. The output 51 from counter 50 together with the synchronizing signal on line 19 (FIG. 1) causes the circuits 1 1b, by means not shown, to initiate the production of a signal on .line 14b of FIG. 1 to start the printing operation.
FIG. to which reference is now made shows the remaining portion of the logic comprising my invention. As indicated above, the verification tag provided by the data source is contained in the first code byte following the initiation of the load command. This byte, it will be recalled, is switched through gates 35 and stored via the cable 48 in the verification register 67. The output of register 67 is applied in parallel to a conventional comparator 66 where a comparison between the verification tag and the identification tag of the printer band is effected.
The identification tag, it will be recalled, is derived from the synchronizing track 43 on the printer band 38. To this end the output of the synchronizing track transducer element 41 is applied through an amplifiershaper circuit to the data input terminal of a conventional ten stage shift register 63. At the same time the output of the sprocket pulse track transducer 42 is applied through an amplifier-shaper circuit 61 to the shift input terminal of the shift register 63. The transducers 41 and 42 are relatively positioned along the path of travel of band 38 so that the shift pulses derived from the sprocket pulse track 44 and the synchronizing pulses derived from transducer 42 shift the synchronizing pulses derived from track 43 into the shift register 63 in such a manner that the first synchronizing mark 43a and the last mark 43b of the synchronizing track are stored in the last and first stages of the register 63 when the band is in a reference position. For example, when the first character of the font is in alignment with the first column print hammer.
A conventional coincidence circuit or two input and gate 64 having its inputs connected to the first and tenth stages of the shift register 63 detect when the first and tenth pulse positions on the synchronizing track of the band 38 are stored in the first and tenth stages of the shift register 63. When this occurs, the coincidence circuit 64 produces a synchronizing pulse on its output 19. The synchronizing pulse thus produced acts to strobe the contents of stages 2 through 9 of the shift register 63 into an eight stage storage register 65 which serves as the second input to the comparator 66. If the contents of the registers 67 and 65 match, the comparator 66 activates its output line 66a to set flipflop 68. This flip-flop is assumed to have been initially cleared by the initial clear signal (IC). The set output of flip-flop 68 is connected to the gate 14 (FIG. 1) which receives the print enable signal on line 14b and the output of the comparator 13 (FIG. 1) as its other two inputs. Thus when flip-flop 68 is set, printing will take place, while printing is inhibited if flip-flop 68 is not set. F lip-flop 68 fails to be set when the verification tag stored in register 67 and the identification tag stored in register 65 fail to match. While not shown, an indicator lamp located on the operators console can be connected to the set output of flip-flop 68 to indicate when the verification and identification tags match. When the tags match and printing occurs the output of gate 14 steps the counter 15 (FIG. 1) and detector circuit 16 (FIG. 1) activates its output line 21 when the last character has been printed. Activating line 21 causes the control circuits 1 1b to signal the data source 10 via the control cable 18 that a print cycle has been completed.
When the tags do not match and printing does not occur, it may be desired to notify the data source 10 of this condition. In an on the line type of operation this may be done by generating an intervention bit as de scribed in columns 122 et seq. of U.S. Pat. No. 3,400,371 or by again installing a suitable indicator lamp on theoperators control panel. In either event, typical circuitry for signalling a non print condition to the data source 10 includes flip-flops 69 and 72, and gate 71. Flip-flop 69 which is assumed to be cleared by the initial clear signal (IC) has its set input buffer connected to the eight inputs of the verification register 67 so that this flip-flop is set when the verification register is loaded. The set output of flip-flop 69 is connected to one input of gate 71 while the reset output of flip-flop 68 is connected to a second input of this gate. The third input to gate 71 is derived from the synchronizing terminal l9. Gate 71 thus detects the condition where both the identification and the verification registers 65 and 67 respectively have been loaded but no match has been obtained. When this condition obtains an output is produced from gate 71 and a no print flip-flop 72 is set by the output from gate 71. Flip-flop 72 can as aforedescribed be used to operate a non-print signal lamp on the operators console or to generate the intervention status bit to signal the data source 10 or both.
From the foregoing description it will be seen that a simple yet effective means has been provided to interlock the print code to the print member of a high speed printer using interchangeable print members.
What is claimed is:
1. A high speed printer which utilizes an interchangeable print member and in which each said member carries a unique character set thereon; the improvement which comprises, a set of synchronizing marks disposed on each of said members, said set of synchronizing marks being coded to identify the character set carried by the associated member, each of said print members further containing a series of timing marks, a shift register having a data input terminal and a shift input terminal, first reading means in the printer for reading the coded synchronizing marks contained on the print member utilized by the printer and for applying the marks so read to the data input terminal of said shift register, second reading means in the printer for reading the timing marks on the print member being utilized by the printer and for applying the timing marks so read to the shift terminal of said shift register to thus shift the signal read by said first reading means into said shift register, a first storage register, means transferring the contents of said shift register into said first storage register, a second storage register, means for storing in said second storage register a coded signal representing a preselected print member, and means for enabling a printing operation when the codes stored in said storage registers correspond and for inhibiting a printing operation when the codes stored in said storage registers do not correspond.
2. The system of claim 1 wherein the last-named means comprises a comparator for comparing the codes stored in said storage registers, and means connected to the output of the comparator for enabling printing when said codes correspond and for inhibiting printing when they do not correspond.
3. A high speed printer which utilizes a continuously moving print member on which is disposed at least one set of print characters; the improvement which comprises: a synchronizing track disposed on said print member, said synchronizing track having a set of synchronizing marks located at a reference position thereon, said marks being coded so as to uniquely identify the associated print member and its character set, a sensing means disposed adjacent said synchronizing track for sensing said marks when said print member moves into a reference position, a first storage means the input to which is coupled to said sensing means for storing the sensed marks, a second storage means, means coupled to the input to said second storage means for selectively causing the second storage means to store a coded signal representing one of a plurality of selectable print members, and indicating means being operative to produce a first output signal condition when the coded signals stored by said first and second storage means correspond and a second output signal when the coded signals stored by said first and second storage means differ, whereby the first signal output condition indicates that the associated print member corresponds to the selected print member and the second output signal condition indicates that the associated print member is different from the selected print member. 7
4. A high speed printer as set forth in claim 3 wherein the indicating means includes means responsive to the first output signal condition to permit printing and further responsive to the second output signal condition to inhibit printing.