|Publication number||US3902393 A|
|Publication date||Sep 2, 1975|
|Filing date||May 1, 1974|
|Priority date||May 1, 1974|
|Also published as||CA1023176A, CA1023176A1, DE2512448A1|
|Publication number||US 3902393 A, US 3902393A, US-A-3902393, US3902393 A, US3902393A|
|Inventors||William V Machanian|
|Original Assignee||Wurlitzer Co|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (8), Referenced by (5), Classifications (9), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
Machanian Sept. 2, 1975 AUTOMATIC RHYTHM CONTROL CIRCUIT FOR MUSICAL INSTRUMENT ACCOMPANIMENT Inventor: William V. Machanian, Lewiston,
Assignee: The Wurlitzer Company, Chicago,
Filed: May 1, 1974 Appl. No.: 465,766
 US. Cl 84/1.03; 84/DIG. 12  Int. Cl. G10h 5/06  Field of Search.... 84/10], 1.03, 1.24, DIG. 12
 References Cited UNITED STATES PATENTS 3,358,068 12/1967 Campbell, Jr 84/101 3,629,480 12/1971 Harris 84/103 3,637,914 l/1972 Hiyama 84/1 03 3,760,088 9/1973 Nakada 84/1.03 3,763,305 10/1973 Nakada et al 84/1.03 3,787,601 1/1974 Campbell 84/l.03 3,813,472 5/1974 Hirano 84/1.03 3,828,643 8/1974 Morez 84/1.0l X
Primary ExaminerStephen J. Tomsky Assistant Examiner-Stanley J. Witkowski Attorney, Agent, or Firm-Olson, Trexler, Wolters, Bushnell & Fosse, Ltd.
[ 5 7 ABSTRACT The embodiment of the invention disclosed herein is directed to an automatic rhythm control circuit for musical instrument accompaniment for use with electronic organs, pianos, and other musical instruments of either the keyboard or nonkeyboard type. A large scale integrated circuit chip has a plurality of interconnected different valued divider circuits and a single frequency is applied to an input circuit point thereof to produce a plurality of different frequency signals corresonding to the different instruments to be simulated for musical accompaniment. A memory circuit having a plurality of circuit points which are scanned in a time-frame sequence is preprogrammed to a predetermined configuration and has the output terminal points thereof connected to a gate control circuit which is selectively switched to provide different ones of a plurality of rhythm patterns such as those associated with march, waltz, rock, swing and Latin music. The matrix array has first, second and third groups of circuit points which are formed and interconnected on the large scale integrated circuit chip in a predetermined manner, and which requires only one of the groups of circuit points to be scanned by a tempo scanning circuit which is variable in frequency.
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AUTOMATIC RHYTHM CONTROL CIRCUIT FOR MUSICAL INSTRUMENT ACCOMPANIMIENT BACKGROUND OF THE INVENTION This invention relates generally to electronic musical instruments, and more particularly to automatic rhythm control circuits which can be used in conjunction with electronic organs or pianos and the like. Specifically, the invention is directed to a novel circuit configuration which enables a multitude of circuit functions to be incorporated in a large scale integrated circuit chip.
While the illustrated environment of the rhythm con trol circuit is here shown in conjunction with the keyboard type electronic musical instrument such as organs and pianos, it will be understood that the rhythm control circuit can be used in conjunction with other types of musical Instruments.
Electronic organs have become relatively common in the musical industry and provide means for simulating the sounds produced from larger wind-operated pipe organs and the like. Such electronic organs differ from one another substantially in certain specific respects, such as whether one tone produced from the organ is obtained by a tone generator associated with additive or subtractive circuits. They also differ as to the specific type of generator used to obtain the basic frequencies, as for example, whether they are transistor or tube oscillators, wind-driven reed elements, rotary tone wheels, and the like. However, all of these electronic organs can be distinguished by certain common fea tures. For example, an expensive organ has a plurality of tone generators, there being one tone generator for each note of the keyboard associated with a two manual keyboard organ. However, associated with the less expensive types of electronic organs, there is a single tone generator for operation by two or more keys, these being derived from one or more divider circuits which divide the frequency from the keyboard oscillators.
It will be immediately apparent that there is a rather significant redundancy for tone generators used in prior art types of electronic organs. However, since the maximum number of notes that normally can be played at any one time is twelve, one note for each finger of the two hands and one note for each foot pedal when used, there are a multitude of tone generators that are not in use. In popular organ playing, it is unusual to use more than one pedal note at a time and no more than perhaps five notes will be played at any one time with the fingers of both hands. Some effort has been made to reduce the redundancy of tone generators needed by using tunable oscillators wherein an oscillator is shared with two or three adjacent notes of the keyboard. This is done under the presumption that only one of these notes will be played at any one time. The presumption does not always hold true, however, and it is at best a low cost approach to developing electronic musical instruments of this type. In recent developments for substantially improving the quality and reliability of electronic organs, computerized technology has been used. In present modern organs of the type described, there may be provided a multifrequency generator which utilizes a standard or clock oscillator and a multitude of divider circuits to divide the clock oscillator signal into the desired frequencies for the notes of the keyboard. Also incorporated in some electronic organs is the use of automatic rhythm synthesizers or control circuits which are utilized to accompany the person playing the organ with a given number of percussion instruments or the like.
When incorporating the rhythm accompaniment feature in electronic organs, it is generally treated as a complete separate package added to the electronic organ and, therefore, substantially increases the overall cost as virtually none of the circuitry within the organ, except that of the audio amplifier system, is utilized.
SUMMARY OF THE INVENTION Accordingly, it is an object of this invention to provide a new and improved automatic rhythm control circuit which utilizes substantial portions of electronic organ circuitry to generate the various percussion instrument sounds and rhythm patterns for various styles of music.
Another object of this invention is to provide a new and improved automatic rhythm control circuit which is -formed substantially entirely on large scale integrated circuit chips having a multitude of internal electrical circuit connections and a minimum number of external electrical circuit connections.
Many other objects, features and advantages of this invention will be more fully realized and understood from the following detailed description when taken in conjunction with the accompanying drawings wherein like reference numerals throughout the various views of the drawings are intended to designate similar elements or components.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic block diagram of one portion of the large scale integrated circuit chip of this invention utilized for generating the different frequencies associated with different musical instruments to be used with the automatic rhythm control circuit;
FIG. 2 is a schematic block diagram of the automatic scanning circuit utilized for scanning the plurality of different groups of circuit points within a read-only memory associated with the large scale integrated circuit chip of this invention;
FIG. 3 illustrates one portion of the read-only memory and logic circuitry utilized to obtain selected ones of a plurality of preset rhythm patterns;
FIG. 4 is an additional portion of the read-only memory and logic circuit to obtain the rhythm patterns of this invention; and
FIG. 5 is the final portion of the memory and logic circuit utilized to obtain rhythm patterns in accordance with the principles of this invention.
DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENT Referring now to FIG. 1 there is seen one portion of an automatic rhythm control circuit for musical instrument accompaniment which is formed as part of a large scale integrated circuit chip in accordance with this invention. This portion is the divider circuit arrangement and is designated generally by reference numeral 10. The divider circuit 10 has a single input terminal 1 1 to which is applied a clock frequency in the order of about 500 KHz from which is derived the plurality of different lower frequencies corresponding to a plurality of difi'erent kinds of musical instrument sounds or voices. In the embodiment illustrated herein, the 500 KHz input signal is utilized as this signal already exists in many modern solid state organ circuits. However, the frequency is divided by a 150 divider circuit 12 to obtain a base frequency of 3,333 at an output terminal point 13. Accordingly, it will be understood that a starting frequency of 3,333 may be utilized, thereby eliminating the need of the divideby-l50 circuit.
The frequency at terminal point 13 is divided by a divide-by-2 circuit 14 and applied to an output terminal point 16 for deriving a 1,667 Hz signal. This signal may be used as a clave voice and connected to certain ones of a plurality of circuit points in a read-only memory to be delivered to an audio output circuit at predetermined selected time intervals along a given rhythm pattern being produced. The output signal from divider 14 is delivered to a divideby-2 divider 17 which has the output thereof connected to a terminal 18. This frequency is 833 and corresponds to a musical block voice. The output of divider circuit 17 is delivered to the input of a pair of divider circuits 20 and 21, they being a divide-by-3 and a divide-by-4 divider, respectively. The output of the divider circuit 21 is connected to a terminal point 22 to apply thereto a 208 Hz signal which corresponds to a part of the snare drum voice. However, the divider circuit 20 also passes through a divide-by-2 circuit 23 thereby making the total division six from divider 17 to apply a 138 Hz signal to a ROM programmable switch terminal 24. This 138 Hz signal is also applied to a divide-by-6 reset circuit 26 which may be utilized to provide a one-sixth duty cycle signal, which is a 23 Hz signal, at the output line 27 to gate certain ones of the logic circuits at a one-sixth duty cycle rate. An input line 28 is connected to the divideby-6 circuit 26 to hold the circuit at reset until the readonly memory circuits, to be described, are released. This will then synchronize the output at terminal 27 to occur on the first input pulse and every sixth pulse thereafter.
The output of the divide-by-lSO circuit 12 is also delivered to a divide-by-9 circuit 30 which, in turn, has its output connected to a divide-by-2 circuit 31 to make the total division of this frequency 18 at the second terminal point 32 of a selector switch 33. This frequency at terminal point 32 is 185. The frequencies at terminal points 24 and 32 will correspond to different tom-tom drum voices and, when used, may be selected with the internal integrated circuit ROM program. The output of divide-by-Z circuit 31 passes through a divide-by-S circuit 33 and to the input of a pair of divider circuits 34 and 36. The divider circuit 34 is a divide-by-3 circuit and is connected to a divide-by-2 circuit 37 connected in series therewith. The output frequency at terminal point 38 to 6 Hz and is utilized to provide a vibrato frequency to be added to the output of the audio signals as desired. The divide-by-2 circuit 36, on the other hand, is connected to a second divide-by-Z circuit 39 and to a switch terminal point 40 of a program selector switch 41. The output of the divide-by-2 circuit 39 is also connected to a terminal point 42 of the selector switch 41. This then provides either a 9 Hz or 18 Hz signal at the output terminal 43. The 9 Hz signal may be used for the organ banjo repeat signal while the 18 Hz signal preferably is used as a shimmer on the cymbal rhythm voice.
Referring back to the divide-by-4 circuit 21, the output thereof is also delivered to a divide-by-Z circuit 44 connected to output terminal 46 for producing the bass drum frequency of I04 Hz. This divider circuit is connected to a one-shot multivibrator circuit 47 which is reset whenever the input terminal 48 thereof receives a predetermined signal from the logic circuit which may be used to provide a sharp start/stop characteristic of a bass drum.
From a single input frequency of 500 kilocycles, the first usable audio frequency of 1,667 is obtained by dividing the base frequency by 300. A second usable audio frequency signal of 833 is obtained by dividing the base frequency by 600. The audio frequency of 208 Hz obtained at terminal 22 for the snare drum configuration is obtained by dividing the base frequency by 2,400. The audio frequency signal of I04 Hz provided at terminal 46 is obtained by dividing the base frequency by 4,800. The tom-tom signal of 138 Hz is obtained by dividing the base frequency by 3,600 while the tom-tom frequency of Hz is obtained by dividing the base frequency by 2,700. The 6 Hz signal obtained at terminal 38 is obtained by dividing the base frequency by 81,000 while the 9 Hz signal obtained at terminal 42 is obtained by dividing the base frequency by 54,000. Other combinations may be utilized, if desired.
Referring now to FIG. 2 there is seen a simplified schematic block diagram of a counter and decoder circuit utilized for the tempo scanning of the matrix array read-only memory of this circuit arrangement. This scanning is done in a sequential manner. A terminal point 50 is adapted to receive a test signal which passes through an inverter circuit 51 to one input of an AND gate 52. The output lead 53 of the AND gate is used to reset all of the dividers of FIG. 1 for test purposes only. A tempo frequency input of between 4 Hz and 50 Hz is applied to terminal 56 which, in turn, is connected to the input of a divide-by-24 counter 57. The divide-by- 24 counter 57 has a reset line 58 connected thereto for resetting of the counters to an initial condition at the end of the count. This reset line may be connected to other circuits for resetting the same. For each complete cycle of the counter an output signal is received over a line 59 to the toggle input of a flip-flop circuit 60. This then will place the Q output of flip-flop 60 at a logic one value. The output of the flip-flop circuit 60 is delivered to a pair of lines 61 and 62 for utilization in other parts of the circuit. The divide-by-24 counter is delivered to a one-of-24 decoder circuit 63 which has 24 output lines, designated generally by reference numeral 64. The output lines 64 are connected to the scanning group of terminals of the read-only matrix to be described in greater detail hereinbelow.
In the illustrated embodiment, the read-only memory is constructed to have substantially a matrix array which may be an X-Y arrangement to have 24 input terminals along the Y axis and 73 output terminals along the X axis. The cross over points of each of the lines thus provides 1,752 bit storage which can be used in a preprogrammed manner. Each bit in this matrix can be preprogrammed to be either a 1 level or a 0 level. Thus, if the count one input on the Y axis is active then the 73 outputs on the X axis will all be 1 or 0 determined by the first preprogrammed bit in each of the 73 rows. If the count two input on the Y axis is active, then the 73 outputs on the X axis will be determined by the preprogrammed second bit of each of the 73 rows. Each of the 73 outputs will, therefore, have a 1 level output for whichever of the 24 counts that a 1 has been preprogrammed.
For a better understanding of the matrix array of this invention, reference is now made to FIGS. 3, 4 and 5 which are to be taken in conjunction one with the other with FIG. 3 placed above FIG. 4 and FIG. 5 placed below FIG. 4. It will be noted that the matrix array has 73 output terminal lines which are connected to various ones of a plurality of AND logic circuits. While AND logic circuits are illustrated, it will be understood that other logic circuits may be incorporated as well.
For purposes of simplicity, the 73 output terminals of the read-only memory are divided into a plurality of different sub-groups, each of which may be associated with different voice characteristics produced by the plurality of divider circuits of FIG. 1. The read-only memory circuit is designated generally by reference numeral 70 and includes a first sub-group of memory elements 71 here illustrated as being associated with the bass drum voice. It will be understood, however, that the particular voice characteristic associated with the group of memory elements 71 may be altered as desired. Furthermore, any of the subsequent sub-groups of the memory disclosed hereinbelow can be associated with any particular voice characteristic desired. The memory group 71 has five output terminals connected to individual ones of a plurality of AND gate circuits 72, 73, 74, 75 and 76. The AND gate 72-76 have a second input terminal connected to the output of inverter circuit 77, 78, 79, 80 and 81, respectively, to enable the desired AND gate during a particular rhythm pattern. The inverter circuits 77-81 are connected to selector switch means, preferably of the manually selectable type, connected to input terminals 82, 83, 84, 85 and 86, respectively. When any one of the plurality of switching terminals 82-86 are energized, an output signal is obtained on line 87 from the NAND gate circuit 88 which, in turn, is utilized to produce a signal to indicate that the automatic rhythm circuit is on.
In the illustrated embodiment, the switching terminal 82 is associated with the march rhythm while the switching terminal 83 is associated with the waltz rhythm. The rhythm associated with rock music will correspond to the selector terminal switch 84 and the rhythm associated with swing music will be associated with switch terminal 85. Finally, the rhythm associated with Latin music is obtained by switching in terminal point 86.
During a predetermined timeframe interval of one of the above-mentioned rhythms, scanning pulses from the counter and decoder circuit 57 and 63, FIG. 2, are connected to the read-only memory 70 as indicated by the 24 lines labeled 64. These 24 lines or inputs always have one input active one at a time and the actual count is determined by the count position of the 24 count counter and decoder of FIG. 2. Whenever a rhythm is turned on, then one of the inputs of one of the AND gates 72-76 is active so any preprogrammcd 1 level on that particular ROM output will pass through the AND gate to deliver the rhythm signal to an OR gate 92 which, in turn, has its output connected to an AND gate 92. The AND gate 92 has a second input line 93 which is also connected in common with the input line 56, FIG. 2, to receive the 4 to 50 Hz rate or tempo signal. This input tempo signal has a fixed width on its 1 level of about 8 ms while the 0 level varies to obtain the desired frequency or tempo rate. Thus, for each count that there is an output from OR gate 91 to AND gate 92 then there will be an 8 ms output signal on ter minal 94 which will activate the bass drum signal of this rhythm pattern. This 8 ms output signal will occur for each count out of the 24 counts that is preprogrammcd with l for that particular rhythm pattern.
The read-only memory has a second group of memory elements designated generally by reference numeral 96 and is here associated with the cymbal sound of the percussion section. The output terminals of memory group 96 are five in number and are connected to a corresponding number of AND gates 97, 98, 99, lOO and 101. These AND gates have second input terminals also connected to the output of the inverter circuits 77-81 and are enabled substantially in the same manner as the AND gates 72-76 and with the same time-frame of the scanning sequence but with a different preprogrammcd ROM. The output of the AND gates 97-101 are connected to OR gate 103 which, in turn, has its output connected to an AND gate 104. AND gate 104 has a second input line 106 which also receives the 8 ms pulse width 4 Hz to 50 Hz signal corresponding to the rhythm rate of the percussion system. This then will produce an 8 ms cymbal voice output signal at terminal 107.
The read-only memory 70 has still another group of memory terminal connections designated generally by reference numeral 108 and which may be used to pass the brush sound or voice produced by the divider circuits 10 of FIG. 1. The group 108 has five output lines connected to five AND gates 109, 110, 111, 112 and 113 which have their second input lines connected to the inverter circuits 778l. The output of the AND gates 109-113 are connected to an OR gate 114 which, in turn, is connected to one input line of an AND gate 116. The brush voice is then delivered to an output terminal 117 when a line 118 of AND gate 116 is in the proper logic state and which line is also associated with the 4 Hz to 50 Hz rhythm tempo signal associated with terminal 56 of FIG. 2.
The read-only memory circuit 70 has still another group of memory terminals 120 which has five output terminals connected to AND gates 121, 122, 123, 124 and 125. The AND gates l21125 also have input lines connected to inverters 77-81 for controlling which rhythm signal or tempo will be utilized. The output of AND gates 121125 are connected to OR gate 126 which, in turn, passes through an AND gate 127 into a second OR gate 128. The signal passes through AND gate 127 when the second input line 129 is in the proper logic state and which logic state again corre sponds to the signal at terminal 56 of FIG. 2. Also connected to the OR gate 128 is the one-sixth duty cycle signal at output terminal 27 of FIG. 1. This is applied to line 130 of the OR gate. The output from AND gate 127 and thus OR gate 128 to output 102 represents the 8 ms. snare drum signal delivered from the ROM. The 7 ms. signal at 23 Hz which results from line 130 through OR gate 128 to output 102 is the snare drum roll.
A two element memory group designated generally by reference numeral 131 is utilized to pass the snare drum roll signals to a pair of AND gates 132 and 133 in the proper time sequencing. To achieve the rapid roll, AND gates 132 and 133 are alternately enabled by input lines 134 and 135, respectively, which are coupled to the lines 61 and 62 of the flip-flop circuit 60,
FIG. 2. The output of AND gates 132 and 133 pass through OR gate 136 which is connected to a reset terminal of a flip-flop circuit 137. The snare drum roll signal is used only on the march rhythm associated with terminal 82 and which terminal also is connected to an inverter circuit 139 which has its output connected to the set input terminal of the flip-flop circuit 137 through OR gate 140. OR gate 140 has a second input line 141 which is connected to output line designated by the count one of the one-of-twenty-four decoder circuit 63. The snare roll signal is delivered to the system when the flipflop is reset by having the O output to the inverter circuit 142 to allow the divide-by-o circuit to operate by releasing the reset line 28 of FIG. 1.
The read-only memory has a six terminal memory group designated generally by reference numeral 144 which are connected to six AND gates 146, 147, 148, 149, 150 and 151. This group of memory elements is associated with the block voice and is utilized on the waltz, rock, swing and Latin rhythms. it should be noted that any five rhythms can be preprogrammed in this chip and any voice output can also be changed to any other voice. This can be the block for this chip and a clave for another chip. In some instances, it may be desired to have the block voice having a different pattern during two successive measures and, therefore, two AND gates are utilized. For example, during rhythm number four AND gates 148 and 149 are enabled and during rhythm number five AND gates 150 and 151 are enabled. The signals from the AND gates 146-151 pass through an OR gate 153 which, in turn, has its output connected to AND gate 154 to apply the voice number five signal to output terminal 156. Also connected to AND gate 154 is an input line 157 which is associated with the 4 Hz to 50 Hz signal connected to terminal 56 of FIG. 2.
In the illustrated embodiment, some of the memory groups and AND logic circuits are not utilized and are incorporated in the large scale integrated circuit chip in case of a requirement for additional voices at a later date. These particular circuit arrangements are here designated in their entirety by reference numerals 158, 159, I60 and 161.
A group of memory elements 162 has five output terminals connected to a group of AND gates 163, 164, 165, I66 and 167 which, in turn, are connected to an OR gate 168. The output of the OR gate 168 is connected to AND gate 169 which has three input lines associated therewith. One input line 170 is connected to the tempo terminal 56 to receive the 4 Hz to 50 Hz gating signal. Another input line 171 is connected to inverter circuit 172 from output terminal 300 to receive a gating signal to pass the piano chord voice through AND gate 169 and OR gate 173 to an AND gate 174. Output control terminal 300 can go to an external piano chord voice on/off switch which will control whether to allow an output for this voice. The OR gate 173 also has a second input from line 301 through inverter 302. Input line 301 represents the output line 87 of FIG. 3 which is a I level whenever a rhythm switch is turned on. Therefore, the signal path through OR gate 173 is from AND gate 169 when a rhythm switch is turned on and becomes a continuous signal from 302 when no rhythm is turned on. The AND gate 174 also has one input line 176 which is a 1 level whenever the keyboard source of the piano chord is being keyed while another input line 177 is connected to a preprogrammed internal selection switch 178. This circuit, therefore, provides a gating circuit for allowing the rhythm to control the piano chord voice pattern for the electronic musical instrument such as a keyboard and- /or chord button organ.
The read-only memory includes a five terminal group designated generally by reference numeral 179 which has output terminals thereof connected to AND gates 180, 181, 182, 183 and 184 which, in turn, have ouput terminals connected to an OR gate 186. The OR gate 186 is coupled through an AND gate 187, an OR gate 188 to the input of a second AND gate 189. Also connected to the AND gate 189 is an inverter circuit 190 which also has the output terminal thereof connected to the AND gate 187. Coupled between the inverter circuit 190 and the AND gate 189 is a preprogrammed internal selector switch 191. The selector switch 191 is an internal preprogrammed optional feature to allow the user to select between different voice gating arrangements. The read-only memory group 179 and the associated gate control circuitry described above will produce a guitar chord voice at output terminal 193 similar to the piano chord voice above.
FIG. 5 illustrates the remainder of the logic circuitry and the read-only memory which is the gating control circuitry for keying the bass or pedal patterns. This large scale integrated circuit chip further includes circuit means for providing various musical effects such as, for example, swing bass (rysel), walking bass, and bass riff (auto bass) associated with terminals 260, 261 and 262, respectively. These terminals are active or on with a low input. Line 87 from FIG. 3 is high if a rhythm pattern switch is on and low if no rhythm is on. This line passes through inverter 266 and becomes line 58 (reset for the counters in FIG. 2) and is the second input to OR gates 263, 264 and 265. Thus, if no rhythm pattern switch is on then the inputs 260, 26] and 262 are inactive because the OR gates are off due to their second input line 58. If a rhythm switch is on and input 260 is low then the output of OR gate 263 is low resulting in the outputs of both NAND gates 269 and 270 to be high. Input terminal 267 is an input that goes high whenever a bass pedal (or chord button with bass) is keyed. AND gate 271 has one input from NAND gate 270, one input from 267 and the third input is line 56, the tempo oscillator input from FIG. 2. Thus, output line 279 of AND gate 271 will pulse on with the tempo oscillator input whenever a rhythm is on, a pedal is being keyed (or bass chord button) and either the (swing bass) input 260 or the (walking bass) input 261 is on. This will result in this same output on line 203 through AND gate 273 or on line 204 through AND gate 274. Line 204 (swing bass) will be the active line if 260 is on or signal line 202 is on". Line 203 is active if only input 261 is on. If both 260 and 261 are off or no rhythm is on then the output of NAND gate 270 is low thus AND gates 271, 273 and 274 are all off however this signal passes through inverter 275 to AND gate 276 which turns on line 206 when input 267 is high resulting in a continuous bass root keyer signal as seen later. If input 262 is active (low) and a rhythm is on then the output of NOR gate 277 is high whenever input 267 if low. Thus the output line 205 (bass riff control line) of AND gate 278 is high with the tempo oscillator input line 56 whenever input 262 is low, a rhythm is on and the pedal is not keyed. This is the bass riff (auto-bass) control line.
Next we see a four element memory cell group 196 that has output terminals thereof connected to AND gates 197, 198, 199 and 200. The output of these AND gates pass through an OR gate 201 along with the signal R, from inverter 77 of FIG. 3 showing that the march rhythm is on. The output of NOR gate 201 is line 202 as shown above. Thus rhythm 1 and any of the other four rhythms can be programmed to obtain a low input on line 202 thus reverting a walking bass input 261 and control output 203 into the swing bass control output 204.
The read-only memory has a six terminal memory group designated generally by reference numeral 210 and has six output lines thereof connected to AND gates 211, 212, 213, 214, 215 and 216. Only AND gates 211, 212, 213 and 214 are connected to an OR gate 217 while AND gates 215 and 216 are connected to an OR gate 218. The output of OR gate 217 passes to OR gate when an AND gate 219 is enabled as a result of logic signal line 203 which is the walking bass control line. This will produce the walking bass root signal at the output terminal 220. This bass root signal will be continuous if line 206 is active. This output will follow the preset swing bass pattern if line 204 to AND gate 214 is active and will result in the bass riff pattern through line 205 and AND gate 216.
The bass third keyer output is developed at output pin 221 which is connected to an OR gate 222. The read-only memory group 223 is connected to five AND gates 224, 225, 226, 227 and 228 of which all except 228 pass through OR gate 229 and AND gate 230. AND gate 230 also has input control line 203 for the walking bass. AND gate 228 has input control line 205 for the bass riff as its second input. Bass third does not appear in the swing bass pattern.
The bass fifth keyer output is developed at output pin 231 which is connected to OR gate 232. The read-only memory group 233 has six AND gates 234, 235, 236, 237, 238 and 239 at its ouput. AND gates 234, 235, 236 and 237 pass through OR gate 240 and AND gate 241 which has the walking bass input control line 203 as its second input. AND gate 238 has the swing bass input control line 204 as its second input and AND gate 239 has the bass riff input control line 205 as its other input.
The bass fourth keyer output is pin 242 which is connected to OR gate 250. The read-only memory group 243 has five AND gates 244, 245, 246, 247 and 248 at its output. All these AND gates except 248 pass through OR gate 249 and AND gate 251 to OR gate 250. AND gate 251 has the walking bass control line 203 as its other input. AND gate 248 to OR gate 250 has the base riff control line 205 as the other input. Again the bass fourth is not part of the swing bass pattern.
For a basic understanding of how the rhythm circuit produces the particular output signals, a description of the bass drum output signals will be given with regard to the five different types of rhythms associated with terminals 82, 83, 84, 85 and 86 of FIG. 3. Furthermore, this description is given in conjunction with a 48 count cycle so that the length between repeatable rhythm patterns is extended substantially but for this voice only a 24 count repeatable pattern can be programmed. For example, when terminal 82 is energized for the march rhythm pattern, a bass drum signal output will be developed at the l, 13, 25 and 37 counts of the counter and decoder. With regard to the bass drum signal. the same is true when the waltz terminal 83 is activated. That is, output signals will occur at the 1st, 13th, 25th and 37th counts of the tempo cycle counter. However, with regard to the rock signal, bass drum voices will be heard at the lst, 10th, 13th, 25th, 34th and 37th counts of the counter. With the swing music, bass drum voices will be heard at the lst, 13th, 25th and 37th counts of the counter. Finally, with regard to Latin music, the bass voice rhythm will be heard at the 1st, 13th, 19th, 25th, 37th and 43rd counts. Similar variations for the various rhythms associated with terminals 82, 83, 84, and 86 occur for the cymbal, brush, snare drum and block. The block as seen in FIG. 4 has two pairs of three input gates where the third input on each pair of gates on the same rhythm terminal (85 and 86) has line 61 on the one gate and line 62 on the other gate. Thus, the one gate is allowed for the first 24 counts and every other 24 after that and the second gate the second 24 counts and every other. Thus, a 48 count pattern can be programmed with two rows of the 24 count ROM. Also, output signals for the piano and guitar are selected to coincide at different time intervals along the output pulse train for the different kinds of rhythm incorporated.
What has been described is a circuit arrangement for a large scale printed circuit configuration to achieve both generation of the various percussion voices utilized for musical accompaniment and for providing memory circuits, of the read-only type, to be programmed to pass these percussion voices at the appropriate time intervals. Also associated with the large scale integrated circuit chip is the scanning or decoding circuit which may incorporate a one-to-twenty-four pulse decoder or a one-to-forty-eight pulse decoder utilizing a 48 count decoder. Accordingly, variations and modifications of this invention may be effected without departing from the spirit and scope of the novel concepts disclosed and claimed herein.
The invention is claimed as follows:
1. An automatic rhythm control circuit for musical instrument accompaniment comprising in combination: a matrix array having a first group of circuit points to receive frequency signals corresponding to the various voices of the instruments to tbe reproduced for musical accompaniment, a second group of circuit points for connection to gate control circuits, and a third group of circuit points for connection to a tempo control scanning circuit repeatedly to sequentially scan said first group of circuit points in predetermined subgroups to provide the desired rhythm pattern, a variable frequency tempo control scanning circuit connected to said third group of circuit points for scanning said matrix array, and gate control circuit means connected to said second group of circuit points for passing said desired rhythm pattern to audio-amplifier means.
2. In the automatic rhythm control circuit as set forth in claim 1 wherein said matrix array, variable fre quency tempo control scanning circuit and said gate control circuit means are all formed on a large scale integrated circuit chip.
3. In the automatic rhythm control circuit as set forth in claim 1 further including rhythm selector switch means connected to said gate control circuit means se- I ll lectively to change the rhythm pattern produced thereby.
4. In the automatic rhythm control circuit as set forth in claim 3 wherein said selector switch means is arranged for selection between march, waltz, rock, swing and Latin rhythm patterns.
5. In the automatic rhythm control circuit as set forth in claim 1 wherein said large scale integrated circuit chip further includes a plurality of interconnected different value divider circuits. to receive a single frequency at an input terminal thereof and to produce a plurality of different frequency signals corresponding to different instruments to be generated for musical accompaniment, said different value frequencies being connected to said first group of circuit points of said matrix array.
6. 1n the automatic rhythm control circuit as set forth in claim I wherein one of said plurality of divider cir cuits receives a frequency of 3,333 Hz which is divided to provide 1,667 Hz, 833 Hz, 208 Hz, 138 Hz, 104 Hz, 9 Hz and 6 Hz signals corresponding to the frequencies of different instruments to be reproduced.
7. In the automatic rhythm control circuit as set forth in claim 6 wherein said plurality of divider circuits further includes output terminals to provide 185 Hz, 138 Hz and 18 Hz signals.
8. In the automatic rhythm control circuit as set forth in claim 6 wherein said plurality of divider circuits includes a divide-by-l50 divider circuit to receive an input frequency of 500 KHz to produce said 3,333 Hz.
9. In the automatic rhythm control circuit as set forth in claim 1 wherein said memory circuit means is a readonly memory which is programmed in a predetermined manner to provide various rhythm pattern outputs therefrom.
10. An automatic rhythm control circuit for musical instrument accompaniment comprising in combination: a plurality of interconnected different value divider circuits to receive a single frequency at an input terminal thereof and to provide a plurality of different frequency signals corresponding to the different voices of the instruments to be generated for musical accompaniment, memory circuit means having a plurality of first circuit points to be programmed to pass predetermined ones of said plurality of different voice frequencies at preset time intervals during timeframe scanning, gate circuit means having first and second input circuits, said first input circuits of said gate circuit means being connected to selected ones of said plurality of first circuit points, selector circuit means including switch means coupled to said second input circuits of said gate circuit means for enabling selected ones thereof in a predetermined rhythm pattern to pass the various different frequencies of the instruments used for accompaniment at the desired time-frame intervals.
11. In the automatic rhythm control circuit as set forth in claim wherein one of said plurality of divider circuits receives a frequency of 3,333 Hz which is divided to provide 1,667 Hz, 833 Hz, 208 Hz, 138 Hz, 104 Hz, 9 Hz and 6 Hz signals corresponding to the frequencies of different instruments to be reproduced.
12. In the automatic rhythm control circuit as set forth in claim 11 wherein said plurality of divider circuits further includes output terminals to provide Hz, 138 HZ and 18 Hz signals.
13. In the automatic rhythm control circuit as set forth in claim 11 wherein said plurality of divider circuits includes a divide-by- 1 5O divider circuit to receive an input frequency of 500 KHz to produce said 3,333 Hz.
14. In the automatic rhythm control circuit as set forth in claim 10 wherein said memory circuit means is a read-only memory which is programmed in a predetermined manner to provide various rhythm pattern outputs therefrom.
15. In the automatic rhythm control circuit as set forth in claim 14 wherein said read-only memory is formed by an X-Y matrix array having preset circuit points thereof providing an output of the frequencies to be reproduced in a predetermined rhythm pattern within said time-frame intervals.
16. In the automatic rhythm control circuit as set forth in claim 15 wherein said X-Y matrix array circuit is formed by at least 24 scanned input lines and 73 fixed output lines to provide at least 1,752 scanning points within the read-only memory.
17. In the automatic rhythm control circuit as set forth in claim 10 wherein said gate circuit means are AND gate circuits.
18. In the automatic rhythm control circuits as set forth in claim 10 wherein said selector means is manually selectable to vary the rhythm pattern of the timeframe sequence between a march rhythm, a waltz rhythm, a rock rhythm, a swing rhythm and a Latin rhythm.
19. In the automatic rhythm control circuit as set forth in claim 10 further including scanning circuit means for scanning the plurality of time-frame circuit points on said memory means, said scanning circuit means having an input terminal adapted to receive a variable frequency signal to vary the tempo of the rhythm output signals produced by said memory means and said gate circuit means.
20. In the automatic rhythm control circuit as set forth in claim 10 wherein the variable frequency input to said scanning circuit means varies from between 4 Hz to 50 Hz.
21. In the automatic rhythm control circuit as set forth in claim 10 wherein said divider circuits, memory circuit means, gate circuit means and said selector circuit means are all formed on a large scale integrated circuit chip.
UNITED STATES PATENT AND TRADEMARK OFFICE CERTIFICATE OF CORRECTION PATENT NO. 3,902,393 DATED September 2, 1975 INVENTOMS) I William V. Machanian It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:
Column 3, line 49, "33" should be --35-- Column 11, line 18, "claim 1" should be -claim 5-- Column ll, line 32, "memory circuit means" should be --matrix array-- Column 12, line 49, "claim 10" should be --claim 19-- Signed and Scaled this Twenty-first D8) 0f June 1977 [SEAL] A rtest:
RUTH C. MASON C. MARSHALL DANN Arresting Officer Commissioner of Parents and Trademarks Patent Inventor(s) UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION No. 3, 902 393 Dated SEPTEMBER 2 1975 WILLIAM V. MACHANIAN It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:
Col. 3, line 53,
[SEAL] 5, line 61,
7, line 12,
9, line 11, line 8,
(second line of claim 5) "claim 1" should be -claim 2-- ,Signal and Scalccl this second Day of Deoember1975 A He!!! RUTH C. MASON Arresting Officer C. MARSHALL DANN (ommissiuner ufPalenls and. Tmdemuks
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|U.S. Classification||84/668, 84/714, 84/DIG.120, 984/351|
|Cooperative Classification||Y10S84/12, G10H2210/361, G10H1/40|
|Nov 15, 2001||AS||Assignment|
Owner name: GENERAL ELECTRIC CAPITAL CORPORATION, CONNECTICUT
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|Nov 14, 2001||AS||Assignment|
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|Sep 29, 1988||AS||Assignment|
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