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Publication numberUS3905267 A
Publication typeGrant
Publication dateSep 16, 1975
Filing dateFeb 4, 1974
Priority dateFeb 4, 1974
Publication numberUS 3905267 A, US 3905267A, US-A-3905267, US3905267 A, US3905267A
InventorsRaymond A Vincent
Original AssigneeRaymond A Vincent
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electronic player piano with record and playback feature
US 3905267 A
Abstract
An electronic data storage system including a magnetic type recorder/replayer for recording spontaneous musical presentations for replay through a similar instrument. Key depression signals are recorded in a serial, self-clocking code where data is represented by flux transitions rather than signal amplitude. Recorded data includes bits for word display and other auxiliary functions. Expression control is provided.
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Description  (OCR text may contain errors)

United States Patent Vincent Sept. 16, 1975 [54] ELECTRONIC PLAYER PIANO WITH 3,697,661 10/1972 Deutsch 84/1.01

RECORD AND PLAYBACK 3,763,364 lO/l973 Deutsch 6t 3].. I 84/l.03 X

3,771,406 11 1973 Wheelwright... 84/464 [76] Inventor: Raymond A. Vincen 9307 M n 3,781,452 12/1973 Vauclain 84/1.28

Cres., Detroit, Mich. 48239 3,789,719 2 1974 Maillet..... 84/115 3,865,002 2/197-5 Shimizu et a1. 84/115 [22] Hedi 1974 3,868,882 3 1975 Fukui et al 84 462 pp 439,147 OTHER PUBLICATIONS Ex parte S (Board of Appeals), Aug. 4, 1943, (Case [52] US. Cl. 84/115; 84/l.O3; 84/462; NO. 109); 25 JPOS 904.

84/464; 84/DIG. 29 v [51] Int. Cl. G10 F l/OO; GlOF 5/00 Primary Examiner-Stephen J. Tomsky [58] Field of Search 84/ l .Ol-l .03, Assistant ExaminerStanley J. Witkowski 84/1.l5, 1.18, 1.28, US, 464, DIG. 29, 461, Attorney, Agent, or FirmThomas N. Young 462, DIG. 6

[57] ABSTRACT [56] References Cited An electronic data storage system including a mag- UNITED STATES PATENTS netic type recorder/replayer for recording spontane- 3,007,362 11/1961 OlSOn et al 84/1.03 OHS musical Presentatiws for p y through a Similar 3,484,530 12/1969 Rupert 84/1.18 instrument. Key depression signals are recorded in a 3, 84.53() 2/196 Rup rt 1 4 /l-l8 serial, self-clocking code where data is represented by $594,487 7/ 1971 Jones,

X flux transitions rather than signal amplitude. Recorded 3 lg; ay data includes bits for word display and other auxiliary atson 3,647,929 3 1972 Milde, Jr 84 1.01 funcnons' Expresslon control provlded' 3,683,096 8/1972 Petersen et a1. 84/115 13 Claims, 20 Drawing Figures 7 BITS 7 BI TIMING FIG- [9 l l M SYNC- 56 M CLOCK H614) u STORAGE a? 5 if L DAM CARD b T 1122351118 DECODER I l. SW'TCHES ENCO wENER DATA 0.00 T SOLENO'DS E L ZFIG-8 MEDIUM F/lG-IO ll AUXILIARY E Z6 SINCHRONIZER Z 8 Egg F1615 L :7

R A E E R /Z0 2 974 E S CLOCK FIG f R -%7 5 5 TAPE 7 I 115 VAC. POWER EXPRESSIQN g SUPPLY PATENTED S 3.905267 SIEEI 1 OF 5 'iBlTS TBITs TIMING L SIG-IE2 I /4 SYNC.

7 5 W M K CLOCK H614) ED 7 E STORAGE 52% r DA M f OR DECODER u KEYBOARD T SWTCHES -EIIconm Q-W PECEIVER DATA zxun l T SOLENO'DS F|G.8 MEDIUM FIG-l0 [I AUXILIARY E I am /Z x ,5 [Z (TAPE 6% EE g 5 E CLOCK F fe /ZQ A A 5 4? s S 5 TAPE Z6 EXPRESSION new I H5 vAc. ,gsggg N 300 (E) BlTI 8,9 so s9 90 lol I02 l|3,ll4 I28 FSYNC l KEYS I. IEXPPESSIONIVLDEO IAUXILLARY 1 SUSTAINJ 54 f 55 2 A NCHANNEL NBIT LOW LEVEL AMP A/D I- MUX OWER CONVERTER 50 i DETECTOR A BIT ADDRESS I a I I CLOCK 70 60 7 AMP/ RECTIFIER 45 V2 SN7400 L 55 up we 4 BIT UP/ 00m :MBJ SN74|93 aro gz 66 DOWN 0 1/6 SW04 4 MICRO- MSB PHONES LADDER L38 NETWORK M PA ENTE SETT ems 905,267

' SHEET 2 0F 5 TYP TYE KEY SW.

96 CLOCK 60 1 Di PHASE W DATA 2x CLOCK CLOCK a? D 1N QBI PHASE CL M A DENSITY NR2 DATA /2-, SN7474 I/4SN7486 5 2x CLOCK LrmJwmnmLruu-mmwm CLOCK WW NRZ DATA m Bi PHASE DATA W DOUBLE DENSITY W R2 RESTORED 3 0; DATA SWITC H l NG DATA Cl RI DATA cou;P- 'FIL.

INPUT NRZ DATA m SHEET 3 UP 5 I VCC H IDATA D NR2 DATA ff 4 y e SN7404 R3 55} EXT CLK z SN7474 R2 //0 R XT o BSN74I2I a 4 cLOCK Bl PHASE I V M DATA k B PHASE DATA CLOCKTJWLILILIFLIUT NRZDATA m 3.! CLOCK 0 6 --NRZ CL /52 64 BI PHASE 0 D I 3 SN 65 SN7474 DATA CL s CL 7420 7474 CLEAR Q CLOCK 2x CLOCK FROM PLL CL Q A'JA'IEMEESEPIBIQTS 3 905 267 SHEET u (If 5 Bl PHASE DATA W 2x CLOCK Wm CLOCK W NAZ DATA I V.I I II 2x CLOCK w I 62 SN 0% DOUBLE POINTS '7 CL 6 Q CL 0 4 Ag DATA A I B C D ABCD A565 1 1 1 ssNmIo SN74|0 0 D ABC AEEBcD E65 7420 NRZ 3 l 0 CL 0 L CLEAR CLOCK y SN SN '(4I92 74|92 CLEAR CLOCK CLhAR CLOCK CARRY COUNT UP //7Z A A A A A A A 7 TIMING BITS U6 #4 T I L CLEARD DCLEAR INHIBIT SYNC. CL CL 5 /2 SN7474 l/2 SN74T4 ELECTRONIC PLAYER PIANO WITH RECORD AND PLAYBACK FEATURE INTRODUCTION This invention relates to data recording and retrieval systems for use in connection with musical instruments whereby data defining a musical performance may be spontaneously recorded for later reproduction via the same or another instrument.

BACKGROUND OF THE INVENTION It is well known that musical instruments, such as pianos and organs, may be controlled for the reproduction of a musical presentation by way of prerecorded data. The best known form of prerecorded data is the so-called piano roll" which is'essentially a punched paper tape having at least 88 channels which are read in parallel to control the actuation of the piano keys. The preparation of the prior art piano roll is a painstaking and expensive process and is not susceptible to spontaneous generation or modification to any significant extent.

A more recent development in apparatus for recording a musical performance for subsequent reproduction involves the use of a tape recorder and a system for recording key depression data on the tape in a single or double channel time-multiplexed sequence thereby to permit the tape to be' replayed and demultiplexed to reproduce the musical presentation. This system has the advantage of eliminating the tedious preparation of the piano roll and permitting both carefully and elaborately prerecorded performances as well as spontaneously prerecorded performances to be reproduced as often as is desired.

The prior art tape recorder system involves the production of a relatively fixed frequency sinusoidal waveform which is broken up into scan frames of predetermined length. Each scan frame comprises the serialcombination of eighty or more data units represented by sinusoid cycles, each unit being assigned a count and each count representing a piano or organ key or some auxiliary function, such as expression. The prior art systern comprises an elaborate mechanism including circuitry for amplitude modulating the sinusoidal waveform within each data unit of the scan frame such that a high amplitude level represents a sync pulse, an intermediate amplitude represents a key-on signal, while a low amplitude signal represents a clock quantity. In short, the count of the sinusoidal excursion identifies the particular key within a scan frame and the amplitude level of the waveform excursion represents the particular function to be performed with respect to that key or, in the absence of a key function code, the excursion is used to resynchronize during the decode operation.

The use of such precise amplitude modulation as is described above within a tape recorder system is extremely difficult and typically calls for high-cost, precision recording equipment so as to minimize output signal amplitude variations due to such error causing factors as tape speed changes, tape stretching, circuit drift, and other factors. In brief, the accurate encoding and decoding of data using no less than three distinct amplitude levels in extremely short, serial data units is an extremely difficult task, giving rise to prohibitive cost factors where a commercial unit for home entertainment is concerned.

BRIEF DESCRIPTION OF THE INVENTION The present invention provides a data recording and retrieval system especially for use in combination with musical instruments such as pianos whereby musical performances may be spontaneously recorded and reproduced and, moreover, wherein the system is well adapted for implementation using low cost home entertainment type tape recording equipment, such as cassette tape recorders and tape decks. In general, this is accomplished by means of a system for recording a stream of data in a serial recording medium, such as a magnetic tape, using a binary code wherein the recorded waveform comprises only first and second relative signal levels and relatively abrupt coded transitions between said levels thereby to render the code and the demodulation system completely independent of absolute amplitude levels and the need for analog amplitude detection, threshold detection, or other absolute monitoring devices. In the preferred form the data is recorded in a self-clocking binary waveform wherein the key depression signals as well as the clock signal are represented by the positions of transitions between the binary levels and the levels or amplitudes themselves have no significance whatever. Accordingly, a single channel tape may be employed for the recording of self-clocking data from which both key depression data and clocking data may be readily retrieved.

A further feature of the present invention is the expanded data encoding efficiency which results from the use of transition encoding and the consequent capability of the recorded waveform to actuate or control auxiliary devices such. as rhythm accompaniments and video displays in synchronism with the reproduction of the musical performance. In general, this is accomplished by allocating certain data units within a scan frame to the recording of the auxiliary drive data in the same transition code between binary signal levels as the musical data itself and, during demodulation, segregating such signals and using such signals for the direct excitation and control of the auxiliary devices.

Further features and advantages of the present invention will become apparent upon reading the following specification. It is to be noted that while the invention is described with reference to a system for both recording and reproducing data defining a musical performance, the invention contemplates the possibility of recording musical performance data at one location and facility and replaying or reproducing the performance at another location and facility. Thus, the advantages of the present invention may be realized within a reproduction system having no spontaneous recording capability. For a thorough understanding of the invention reference should be taken to the accompanying specification and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of the data recording and reproduction system;

FIG. 2 is a diagram of data recording format within a scan frame;

FIG. 3 is a block diagram of an expression control system;

FIG. 4 is a circuit diagram of a second automatic expression control system;

FIG. 5 is a block diagram of a multiplexing system;

FIG. 6 is a bi-phase encoder;

FIG. 7 is a wave diagram illustrating the operation of the encoder of FIG. 6;

FIG. 8 is a second encoder;

FIG. 9 is a wave diagram for the encoder of FIG. 8;

FIG. 10 is a schematic circuit diagram of a receiver;

FIG. 11 is a circuit diagram of a bi-phase decoder;

FIG. 12 is a waveform diagram for the decoder of FIG. 11;

FIG. 13 is a circuit diagram of a phase-locked loop synchronizer;

FIG. 14 is a bi-phase decoder using aphaselocked loop;

FIG. 15 is a waveform diagram for the decoder of FIG. 14;

FIG. 16 is a circuit diagram of a double density decoder for use in combination with the encoder of FIG.

FIG. 17 is a waveform diagram for the decoder of FIG. 16;

FIG. 18 is a circuit diagram for the timing unit of FIG. 1;

FIG. l9is a demultiplexer; and

FIG. 20 is a perspective drawing of a piano key data generating and actuating apparatus.

DETAILEDDESCRIPTION OF THE SPECIFIC EMBODIMENT Looking to FIG. I, a system 10 for recording and reproducing a spontaneously generated piano presentation is shown. System 10 is especially adapted for use in combination with a conventional piano (not shown) modified only to include key closure contacts forming switches 12 which are closed to produce data in digital binary form each time any given key is depressed. This is more fully described with reference to FIG. 20. The piano further comprises a pedal switch 14 indicating the use of the sustain pedal and a binary source 16 of expression signals created incident to the playing of a musical presentation on the piano in the conventional fashion. Sources 12, 14 and 16 are all useable by a player in the course of playing a musical presentation to generate input signals which occur in various combinations according to a sequence, the timing of which is determined by the player. The combinations of signals include single key depression signals as single notes are played in the course of a musical presentation, and simultaneous combinations of key depression signals as chords or other note combinations are struck during the musical performance.

The system 10 comprises a multiplexer 20 the function of which is to establish scan frames of a predetermined serial bit length (in this case 128 bits in length) and to serialize the parallel input data from the input data sources 12, 14 and 16 within the scan frames; i.e. the multiplexer 20 lines up the parallel input data from all of the sources in a predetermined numbered sequence of 128 data cells or bits as best shown in FIG. 2. The data format which is selected includes the allocation of 8 bits for a sync word, 72 bits for piano keyboard switches 12, 1 bit for sustained data, 12 bits for expression data, 12 bits for data to drive a CRT display of words, musical notes, etc., and 15 bits for auxiliary functions such as rhythm accompaniments and other miscellaneous operations.

The serialized data from multiplexer 20 is in a code format known as non-return to zero (NRZ) wherein a positive transition between binary signal levels repre sents a l and negative transitions represents binary 0. Those familiar with data and coding principles will recognize that the NRZ code is 'not inherently selfclocking since a long string of bits of the same binary value is characterized by the absence of any transitions at all. This can create several problems including (1) that the frequency responses of the receiver network must go from DC. to the bit rate and, (2) a separate clock signal must be encoded or recorded on a second recorder track so as to synchronize the readout operation with the actual location of data cells in the data train or scan frame. On the other hand, the NRZ code does have the advantage of high data density and, therefore, it is desirable to preserve the high density advantage to the extent possible. The encoder 26 preferably takes such form as hereinafter described with reference to FIG. 8 as will combine clock information from timing unit 22 with the serialized NRZ data from multiplexer 20 and present to storage medium 24 the data in such code or format as to produce a guaranteed transition between the binary signal levels for most or all of the data cells in each scan frame. This code format has at least two advantages: (1) the data stream is selfclocking and, thus, requires no separate clock signal on a second recording medium channel, and (2) the data in the scan frame is contained in the transitions rather than in the amplitude or level of the signal. The result of these two advantages is the realization of high data decoding accuracy, high density data storage and the substantial reduction in performance requirements of the recording equipment employed. The storage medium 24 preferably takes the form of a standard singletrack magnetic tape recorder-player of the type using standard reel-to-reel tape cassettes. Other recording devices may, however, be employed. Power supply 28 provides electrical excitation to all of thesystem elements in FIG. 1 requiring same as will be apparent to those skilled in the art.

FIG. 1 further discloses the means for retrieving the stored data from medium 24 and demultiplexing the data for use in reproducing the musical production represented by the data from input sources 12, 14, and 16, as previously described. The reproduction system comprises a conventional read head arrangement for presenting the data defining the musical production and the auxiliary functions along with the inherent clocking data to a receiver 30, a decoder 32, and synchronizer 34 which extracts the clock signal from the scan frames. The reconstructed clock is applied to the decoder 32 as shown to restore bi-phase data to NRZ form for application to the demultiplexer 36. The demultiplexer 36 performs an operation which is substantially the reverse as the multiplexer 20; i.e., it reorganizes the serialized data from each scan frame into parallel form for presentation via output bus 38 to the key drive solenoids of a piano or organ or other musical instrumentality as may be employed. The expression data is simultaneously applied to the power supply 28 by way of bus 40 to modulate the amplitude of the drive voltage which is supplied to the key drive solenoids to accomplish the expression function. As also shown in FIG. 1, the reconstructed clock signal from decoder 32 is applied to the timing unit 22 which synchronizes the demultiplex function. It will also be observed that the eight-bit sync signal in the scan frame of FIG. 2 is extracted during the demultiplex function and applied to the timing unit 22 to restart or synchronize the strobe clock for each scan frame to ensure that the read strobe signal does not drift outside of the data cell boundaries with the result of signal degradation and possibly a loss of data cell sync.

FIG. 1 also shows output bus 42 from the demultiplexer 37 for transmitting the auxiliary drive signals to an auxiliary unit such as a CRT display for word pictorialization, color display or to perform some other auxiliary function such as controlling house lights to a desired level of brightness, operating a rhythm unit, operating other accessories and appliances, any of these functions either being related or unrelated to the reproduction of music.

Expressioncontrol may be provided in various ways. One expression control system is shown in FIG. 3. In this system transducers 50 are mounted to sense the intensity with which the keys are struck. This information is serialized by way of N-channel multiplexer 52 and amplified at 54. The amplified signal is applied to a power detector 56 which may be a simple threshold detector having several levels of discrimination. The output of detector 56 is applied to the analog digital converter 58 which generates a digital signal suitable for recording within the system of FIG. 1.

The transducers 50 may take any of several forms, for example, they may be microphones, simple accelerometers, or magnetic pickups. Whatever the form, the transducers are voltage generating devices which produce signals that are then multiplexed at 52 to form a single analog voltage stream; The analog-to-digital converter 58 does, of course, operate under the control of the clock signal from the timing unit 22 since each of the transducers 1 through N must be sampled at the appropriate time.

In FIGS. 4-19 many of the elements otherwise identified by reference characters also contain numbers which are indicative of industrially standardized integrated circuits, such circuits being commercially available and hence no specific description will be given herein. These circuits are available as pre-packaged devices from various manufacturers including Texas Instruments, Inc., Signetics, Fairchild, and Harris. Accordin g to catalogs published by or for these companies in 1972 and 1973, the following specifically identified integrated circuit units are available from the indicated companies. Signetics: NE565 (phase locked loop); Fairchild: 741,710, 37002, 7400, 7404, 74193, 74150, 74151, 7486, 7474, 74121, 7420, 74192, and 74164.

FIG. 4 illustrates an alternative system for expression control in the piano and comprises four microphone sensors 60 spaced at uniform intervals behind the keyboard. The microphone outputs are serially multiplexed together at 62, this unit preferably taking the form of a Fairchild 37022 dc unit, a four-bit analog multiplexer. The serial output from the multiplexer 62 is amplified at 64 and applied to a low-pass filter 66. The filtered output is then digitized by means of the comparator 68, counter 70, and ladder network 72. The ladder network is a well known device, easily constructed using discrete components or available as a prepackaged circuit device from Angstrohm Precision, Inc. as part of their DIP series of binary circuits. The frequency response to the low-pass filter is centered about approximately 30 Hz. The output of the low-pass filters 66 is converted to digital form and the least sig nificant bit of the analog digital converter switches back and forth from a 1 to a 0 and the three most significant bits are used as an output to give as much as eight levels of control over the intensity or volume by varying voltage to solenoids that strike the keys in the respective quarter of the piano keyboard. The three bits of data may be added to the data format, stored or transmitted, and reconverted back into parallel information. After being converted from digital to analog form, the voltage at which the solenoid is operated is adjusted in response to the analog signal, thus, to control the force with which the key is struck. I

Other forms of expression control including manual expression control can, of course, be employed.

FIG. 5 illustrates the details of a typical implementation for the multiplexer 20 of FIG. 1. Multiplexer 20 includes a seven-bit counter providing 2 combinations for the 128 multiplex function. The circuit of FIG. 5 is a mo -level multiplexing scheme, the first level of which assembles the data into eight parts of 16 bits each and the second level of which further assembles the eight parts into one scan frame having 128 or more data units. The first level utilizes four bits from timing unit 22 to accomplish a sixteen-bit multiplex function. In circuit 80, for example, the four bits of timing information and the 16 bits of input data generate a serial output from the 16 input information bits, bit 1 being the first out and bit ,16 being the last out. Running parallel with this multiplexer unit are seven other multiplexers of substantially identical construction generating output bits at the same rate and controlled by the same four input timing bits. The outputs of these eight multiplexer units are, however, fed into the eight-bit multi plexer 82 the timing of which is controlled by the subsequent three timing bits from unit 22 shown in FIG. 1; i.e., the least significant bits of the timing sequence. The output of multiplexer unit 82 samples each of the other eight multiplexers once for each of their output bit times, thus, generating the 128 bit serial NRZ data stream with bit 1 of multiplexer A1 out first and bit 16 of mulitplexer g coming out last.

The sync word illustrated as the beginning of the scan frame in FIG. 2 may comprise, for example, a series of eight ones (ls), thus, to present a distinct data form which is not likely to be generated during random musical data production and which can be distributed and recognized as a sync word by the synchronizer 34. The sync word can be hard wired with the first eight bits wired to zero if all ones (ls) are required for the sync word. The SN 74150 suggested for units 80 produces an inversion between input and output; therefore, all zeross would be wired for an all one sync word. The switches 12 from the piano keyboard as Well as for the sync word are wired directly to the inputs of the multiplexer units 80 and, when the key is closed, the switch grounds to common providing an input signal. The output data is, thus, inverted to convert the ground or binary zero to a binary one.

In reproducing music, the sample rate is of substantial significance in order to ensure the complicated compositions as well as the auxiliary functions can be suitably reproduced using conventional recording equipment. The sample period for each data cell is about 250 microseconds for both multiplexers to ensure that the sample rate is much faster than the playing speed. Thus, a sample time is negligible compared to the time a key is actually depressed in normal operation of a piano or an organ or another instrument. Any key switches that close in the middle of a bit time or other erratic operation of the keys would be undetectable because the sample rate is very high.

Referring now to FIG. 6, there is shown a bi-phase encoder for implementation of unit 26 in FIG. 1. Encoder 26 is responsive to the NRZ data from the multiplexer 20 to produce a code which has the self-clocking feature and which exhibits no significant dc component. The basic bi-phase level code is that zero information is the inverted clock and the one information is a true clock. This code is a simple exclusive/OR of the NRZ data and the inverted clock information. It is provided by the gates 90 and 92, implemented and connected as shown. In the timing diagram of FIG. 7, the bi-phase data is the clock for binary ones (1s) and the inverted clock for binary zeros (Os). The maximum time between transitions in the data is the bit time. There is always a transition in the data in the middle of the bit; it is a transition from high to low to represent a 1 and from low to high to represent 0. In utilizing the exclusive/OR gates 90 and 92 to generate the bi-phase data, spikes or transients generated in the data which are of high frequency or narrow pulse width are filtered out by the fairly low frequency response tape recorder system. Thus, the bi-phase data encoder of FIGS. 6 and 7 is especially well adapted for tape recorder use but may call for some alternative approaches for other transmission medias such as radio or hardwire transmission.

Where correct data phase is a requirement of the storage or transmission system and the system has good signal-to-noise ratios, a double-density encoding scheme may be employed using the implementation of FIG. 8. This results in a code format as represented in FIG. 9. The double-density code of FIG. 9 has a transition in the middle of a one and a transition at the end of zero. However, when a single zero with a one on either side occurs, there is no transition at all. To generate the double-density code, a bi-phase level code is generated utilizing a clock and NRZ data as applied to exclusive/OR gate 96. The output of gate 96 is stored in a buffer flip-flop 98 to eliminate voltage spikes. The not output of the flip-flop is applied to the clock input of flip-flop unit 100 which toggles the flip-flop on the negative edges. The flip-flop, thus, generates a doubledensity code which does not require the phase of the code be maintained by the storage or transmission medium 24. The bandwidth may be half of the bandwidth required for the bi-phase data. The double-density code does exhibit some do component and requires randomness of the data or an offset due to the dc component may be generated. Other code formats including return to zero (RZ) can, of course, be employed. This may be of a distinct advantage where the storage or transmission medium 24 requires the clock as well as the data; for example, the use of a telephone line transmission means requires clock and NRZ data but other media may require RZ data.

Receiver 30 may take any of several forms, one form being illustrated in FIG. 10. The input to receiver 10 is ac coupled from the tape read head to a zero crossing detector comprising transistor 102. A resistor R1 which loads the input to the correct load, R2 or R3 bias the transistor 102 to zero crossing. Capacitor C1 is a coupling capacitor. Capacitor C2 is a low-pass filtered capacitor to filter out noise. Resistor R4 is purely a load for the transistor 102 and the output is the restored data in the original format. Most tape recorders and other transmission systems may employ the receiver of FIG. 10.

A bi-phase decoder implementation unit for unit 32 is shown in FIGS. 11 and 12. The bi-phase decoder 32 of FIG. 11 utilizes a one-shot which extracts transitions from the bi-phase data by delaying the bi-phase data through the transitor Q1 with R1 and C1 as the delay network. Circuit 32 then exclusive ORs the output of Q1 which is inverted and delayed bi-phase data with the input bi-phase data. The output of the exclusive/OR 1 10 is a positive going spike on the edges of the incoming data and trigger a one-shot unit 112 with the timing set by R3 and C2. The output of the one-shot 112 is a three-quarter bit period clock; the first time the oneshot sees a transition from one to zero or a zero to one in the bi-phase data, the one-shot will synchronize with the incoming data train. This clock is then utilized to clock into the data flip-flop 114 the inverted bi-phase data. The output of the data flip-flop 1 14 is the reconstructive NRZ data and the output of 112 is the clock that is utilized in the demultiplexing of the data.

FIG. 13 shows a phase-lock loop synchronizer suitable for the implementation of unit 34 of FIG. 1. Where the data storage and transmission unit has a low signalto-noise ratio or where tape speed varies or other factors result in a degradation of the data, the clock information may be regenerated by the utilization of a phase-locked loop of the type shown in FIG. 13. In either a bi-phase or double density code, a clock signal related to two times the clock frequency is obtained from the data by extracting the edges of the transition of the data utilizing a delay network R, C transitor 116, and exlusive/OR gate 118, a-fiip-flop 119, and a one-shot unit 120. The output of the one-shot is approximately one-quarter the bit time of the clock rate use. This pulse fed to a phase-locked loop including transistor 121 that generates an output clock which is at twice the bit rate. The decode scheme can then divide the clock by two and phase it correctly with the data. In the circuit of FIG. 13, the output of the oneshot is fed to the phase-locked loop utilizing a Signetics NE 565 or equivalent which is running at a center frequency of two times the bit rate. The Signetics NE565 is a self-contained adaptable filter and demodulator for the frequency range 0.001I-IZ to 500 KHz. The circuit comprises a voltage controlled oscillator of exceptional stability and linearity, a phase comparator, an amplifier and a low pass filter as is more fully described in the Signetics Linear Integrated Circuit catalog, pages 6-72 through 6-76. The VCO output is allowed to track over a large range of variations in input frequency and flutter or track through noise. The output of the phaselocked loop is buffered providing two times the bit rate clock. The phase-locked loop is a simple circuit utilizing standard, integrated circuits.

Looking to FIG. 14, a bi-phase decoder using a phase-locked loop is illustrated. The 2X clock from the phase-locked loop is utilized to shift the bi-phase data into data flip-flops 132 and 134 operating as a shift register to store two half bits in a shift register. Upon obtaining ones in both flip-flops or zeros in both flip-flops and decoding this condition along with a clock, an output flip-flop 136, 138 is cleared to phase the clock with the incoming data. In the circuit shown in FIG. 14, a zero-to-one transition in the data syncs the clock flipflop 132, 134 to the correct phase of the data. The biphase data is loaded into the data flip-flop 136, 138 utilizing the bit rate clock flip-flop and is then decoded with the timing diagram, shown in FIG. 15, to provide the NRZ data.

A double-density decoder utilizing the phase-locked loop as a clock is shown in FIG. 16. The double-density input data is shifted into a four-bit shift register utilizing data flip-flops 150, 152, 154, and 156. The output from these four data flip-flops is decoded to sync the clock and to set the outputdata to zero. From the timing diagram of FIG. 17, it is apparent that when all four data flip-flops have ones or all four data flip-flops have zeros, the clock and the data should both be zero at this time. By decoding that state, all ones or all zeros in all four flip-flops clearing the clock flip-flop and clearing the data flip-flop are properly phased together. The output data flip-flop is toggled to reconstruct the N RZ data.

FIG. 18 illustrates suitable implementation for the timing unit 22 of FIG. 1. The timing unit in both the multiplexed modes and the demultiplexed modes utilizes the same counters. Whether the system is operating in a multiplexed mode or a demultiplexed mode can be determined in several ways. The ideal way is to have a command input from the tape recorder 24. Commands to operate the clock to be used in the timing net work 22 may be obtained from timing reference oscillator 160 by command or sensed from incoming data. This clock whether obtained from oscillator by enabling gates 162 and 164 or from data via gate 166, is then fed via gate 168 to'a synchronous counter 170, 172 implemented with two SN 74 192s as a 128 pulse per count cycle. The sync that synchronizes the counter during a receive mode comes from the demultiplexer which senses the syncword. The sync pulse is then counted and after obtaining two sync pulses in a row, the inhibit signal is released to allow the output data from the multiplexer to be utilized. The sync counter 174, 176 is implemented using two since SN 74 74 data flip-flops. The clock from an internal oscillator which oscillates the bit rate clock or the clock from the receiver synchronizer is gated through the gates using an SN 74 00, also marked 178, with the command to select the required clock (see FIG. 19).

Looking to FIG. 19, a demultiplexer 37 is shown. In FIG. 19 the seven timing bits from timing unit 22 control an output demultiplexer consisting of one eightchannel demultiplexer 180 feeding eight sixteenchannel demultiplexers 182 for a two-stage demultiplex operation. The output from the demultiplexer exists for only 250 microseconds which is not sufficient to drive a solenoid and, accordingly, a pulse stretcher 184 is required to extend the output to the required 30 milliseconds. A suitable pulse stretcher is disclosed in FIG. 9B of the patent to Wheelwright US. Pat. No. 3,771,406; see reference character 290 and the description in column 6 of the patent beginning at line 33. Other devices such as one-shots may also be employed. The stretched pulse is applied to driver switch 186. The multiplexer of FIG. 19 employs no storage unit. A demultiplexer utilizing storage for time bits may also be employed.

FIG. illustrates apparatus which is required in some form in the piano itself. Key 188 operates through conventional mechanism 190 to move hammer 192 to strike string 194. When key 188 is manually struck and depressed, nonconductive trip 196 pushes spring wire 198 into contact with conductor 202, making an electircal circuit from excitation plate 200 to conductor 202 which is connected to the multiplexer 20. A similar arrangement is provided for each key. For playback, solenoid 204 may be energized with a voltage pulse to raise plunger head 206 to pivot key 188 just as if it were struck manually.

The auxiliary and video signals from demultiplexer 37 may be employed for a variety of operations including those which are not musical in character. A video word display may be provided by means of a CRT device of the type described in the Radio-Electronics article published in 1973 by Gerusback Publications of New York and entitled TV Typewriter. That device comprises a CRT (television) set 300 which can be programmed via a typewriter to display words at a selected rate. To employ such a system in combination with the player piano system described herein, a first operator types words in synchronism with the simultaneous rendition of a musical member by a second operator and all information is input to the encoder 26 via the multiplexer 20. The unit g of FIG. 5 may be allocated to the TV typewriter input. On playback, the channel 182f of demultiplexer 36 may be allocated exclusively to the TV set control.

It will be understood that the foregoing description is merely illustrative of the invention and is not to be construed in a limiting sense.

I claim:

1. An electronic data storage and retrieval system for use in operating an electronic player piano having se lectively actuable key depression devices comprising: storage means containing a self-clocking data signal comprising a series of time frames each containing a serial waveform comprising first and second signal levels and relatively abrupt coded transitions between said levels wherein the pattern of said transitions in a given frame represent the status of individual keys at a given instant in time during the production of a musical presentation, means for decoding the data signal in a first decoding process to a square waveform characterized by only two discrete signal levels and being divisible into clock times wherein the levels at the individual clock times represent the key conditions at the sample time; means for producing a second decoding step for cyclically reconverting the serial data into parallel form, and means for applying the data as reconverted to said key depression devices to reproduce the recorded musical production.

2. Apparatus as defined in claim 1 wherein the coded waveform comprises key depression data and clock data thereby to be self'clocking during retrieval and reproduction.

3. Apparatus as defined in claim 1 wherein said medium is a magnetic tape.

4. Apparatus as defined in claim 1 wherein said waveform comprises expression data representing the intensity with which individual notes are to be played, means for controlling the intensity with which said key depression devices are actuated, and means for applying the intensity signals as reconverted into parallel form to said control means.

5. Apparatus as defined in claim 1 wherein said data includes a periodically occurring sync word comprising a plurality of bits of predetermined value.

6. A method of producing a musical presentation comprising the steps of playing a musical production using an instrument having selectively actuable keys, generating discrete key depression signals for the depression of the instrument keys, repeatedly but individually sampling all of the key depression signals in series during recurring scan times and generating a serial binary coded waveform of a fixed length related to the scan times and containing a fixed serial arrangement of the key depression signals, said serial binary coded waveform being characterized by a continuous square waveform having only first and second discrete signal levels and being divisible into clock times such that the level of the signal at any clock time represents the condition of a key at the sample time, encoding said signal by combining said signal with a high frequency clock signal to produce an encoded waveform having transitions which occur at substantially a predetermined clock rate irrespective of data content, recording said further encoded waveform on magnetic tape and thereafter reading the magnetic tape to reproduce the waveform and reconverting the serially arranged scan frames into sequentially occurring groups of parallel key actuation data and applying said data to key actuation devices for the reactuation of the keys.

7. An electronic data storage and retrieval system for use in operating an electronic player piano having selectively actuable key depression devices comprising: a plurality of input signal generating means disposed on the piano and interconnected with the piano keys for producing data representing the depressed and nondepressed condition of discrete piano keys at discrete times for the production of music; said data comprising simultaneous as well as time-spaced combinations of key-depression signals; scanner means for individually, progressively sampling said input signal generating means during a fixed length scan frame at a rate higher than the rate of occurrence of said key depression sig nals, and encoder means connected to the scanner means for receiving the scanned data signals in a time sequence and producing a square waveform characterized by only first and second discrete voltage levels and being divisible into first clock times, the voltage level at any given clock time representing the condition of a given key at the sample time, the transitions between said levels being abrupt and substantially straightsided, said encoder further comprising means for generating a second clock signal and logic means for combining the clock signal with the square waveform to produce a coded data waveform characterized by abrupt voltage transitions between only two fixed signal levels and wherein the sense and location of each transition represents data, said waveform having transitions which occur at substantially a predetermined clock rate irrespective of data content; means for recording said coded data waveform in a recording medium; means for retrieving said waveform from said medium, means for cyclically reconverting the retrieved discrete serialized data signals into parallel form; and means for applying the data signals as reconverted to said key depression devices to reproduce the recorded musical production.

8. Apparatus as defined in claim 7 wherein said means for converting comprises a bi-phase encoder wherein transitions of opposite senses both occur in the center of the date units.

9. Apparatus as defined in claim 7 wherein said means for converting comprises a double density data encoder wherein transitions of one sense occur in the center of the data units and transitions of the opposite sense occur at the edge of the data units.

10. Apparatus as defined in claim 7 wherein said means for recording comprises a magnetic tape recorder having at least one channel for recording data.

1 1. Apparatus as defined in claim 7 including means for generating signals relating to the intensity with which a key is depressed during the production of music and means for inputing said intensity signals to said means for sampling and converting thereby to encode said intensity signals as part of said waveform, and means responsive to the retrieved and reconverted intensity signals for controlling the intensity with which a note is played during the reproduction of the musical production. 7

12. Apparatus as defined in claim 7 wherein said waveform includes a word for synchronizing the cyclical reconversion means with the clock times in the coded waveform and comprising a predetermined number of amplitude level transitions representing bits of predetermined data value.

13. Apparatus as defined in claim 7 including input means for generating word data synchronously with the production of music, means for inputing said word data to said means for sampling and convening, word display means and means for applying the word data signals as reconverted to said word display means to display words synchronously with the reproduction of music.

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Classifications
U.S. Classification84/115, 84/462, 84/464.00R, 84/DIG.290, 84/642
International ClassificationG10H1/00
Cooperative ClassificationY10S84/29, G10H1/005
European ClassificationG10H1/00R2B
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