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Publication numberUS3925777 A
Publication typeGrant
Publication dateDec 9, 1975
Filing dateSep 23, 1974
Priority dateSep 23, 1974
Publication numberUS 3925777 A, US 3925777A, US-A-3925777, US3925777 A, US3925777A
InventorsClark Lloyd Douglas
Original AssigneePressman D R
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electronic clock employing repeating sequential single digit display
US 3925777 A
A single character matrix display system in which plural associated characters which constitute a word representing time, temperature, or other information are displayed sequentially, one at a time. The words are generated in electronic form by known means. Individual characters are sequentially selected and then supplied to a single character matrix display station in the order in which they would normally be read by an observer. The plural character word can be repetitively displayed, with the display being de-energized (blanked) for an interval before the word is repeated. Alternatively, if the information to be displayed represents time or some other changing data or words, a new word will be displayed, character by character, after the end-of-word blanking interval. The single character display station comprises a matrix of character component parts (strokes or dots) which are selectively illuminated or actuated in predetermined patterns to represent the characters to be displayed.
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United States Patent 1191 Clark Dec. 9, 1975 [54] ELECTRONIC CLOCK EMPLOYING 3,894,389 7/1975 Miura et al. 58/50 R REPEATING SEQUENTIAL SINGLE DIGIT DISPLAY Zrzmary Egammer-fiawd l'gralfton E t: t, [75] Inventor: Lloyd Douglas Clark, Palo Alto, omey gen or lrm ressman Sq Cahf- [57 ABSTRACT [73] Assignee: D. R. Pressman, San Francisco, A single character matrix display system in which plu- Calif. a part interest ral associated characters which constitute a word representing time, temperature, or other information are [22] Flled' Sept 1974 displayed sequentially, one at a time. The words are [21] Appl. No.: 508,248 generated in electronic form by known means. Individual characters are sequentially selected and then supplied to a single character matrix display station in [52] US. Cl 340/336, 58/23 5141503435221; the order in which they Wouldnormally be read by an 2 observer. The plural character word can be repeti- [51] Int. Cl. G08B 5/36 tivel dis la ed with the dis la bein de ener ized 58 Field of Search 340/336, 325; 58/23 R, (bl t lb f P d 5850 R an e or an in erva eore e wo r 1s repea e Alternatively, if the information to be dlsplayed repre- [561 Cm 221 :11 2 siizrdziztzt' sssi$117,111,111: UNITED STATES PATENTS after the end-of-word blanking interval. The single 3,401,385 9/1968 .Iaffe 340/339 chara ter displaystation comprises a matrix of characgrookswg ter component parts (strokes or dots) which are selecamaguc 1 tively illuminated or actuated in predetermined pat- 3,698,012 10/1972 Ensminger et a]. 340/336 X 3,788,058 1/1974 ldei et a1. 58/23 R term to represent the characters to be d'splayed' 3,846,784 11/1974 Sinclair 340/336 8 Claims, 4 Drawing Figures J DATA ROM CHARACTER COMMAND ONE-SHOT U.S. Patent Dec. 9, 1975 Sheet 1 of2 3,925,777

6 mm m A 2 x A I H M D m 0 II EL R I 2 D X .1 TI 3 MB III 0 I \J H M I m u D s H :I 7, .II I I W W m .1 vP||u k W C I Dn N X II III E D 0. m P n I I m w E I .Y m m u M m U M X I III EL m. I .T II III T M M Y H mm III .LLPNVE L R I I M w W I W H. D HF-Lw U D R M .Ll III PRIOR ART ELECTRONIC DIGITAL CLOCK F IG.2 SUCCESSIVE VIEWS OF SINGLE MATRIX DISPLAY PRESENTING TIME U.S. Patent Dec.9, 1975 Sheet2of2 3,925,777



SYSTEM FOR DISPLAY OF GDNTINUOUSLY CHANGING DATA ELECTRONIC CLOCK EMPLOYING REPEATING SEQUENTIAL SINGLE DIGIT DISPLAY BACKGROUND l. Field of Invention This invention relates to a display system in which information represented by plural character words can be presented by a single character display system.

2. Prior Art Multiple character matrix displays have long been used to display sets or quanta of characters which in association present information such asv time, temperature, or alphabetic messages. The characters are displayed several at a time. Each such character is formed by selective energization of predetermined elements of a matrix or array of such elements. The plural character display may change from time to time or the characters may form a text which is displayed in dynamic or moving sign fashion where the message appears to move in a horizontal direction. In the case of numeric characters representing time, temperature or other phenomena, the display generally consists of two or more digits forming a static display which changes from time to time as the information changes. Frequently the display of the digits is multiplexed at a high rate of speed so that one digit is energized at one instant, an adjacent digit is energized at the next instant, and so on. This is generally done to conserve operating current and circuit components. However, because of the persistence of the viewers eye and the high multiplexing speed, the characters are refreshed at a sufficiently high rate so that all the characters appear to be energized simultaneously.

A known logic scheme for displaying six digits of horological data is shown in FIG. 1. By dividing down the output of a stable frequency source 10, which can be a power line or a stable oscillator, a frequency divider circuit 12 (which includes suitable output registers and reset circuits) continuously supplies digits representing time at three outputs which represent, respectively, seconds, minutes, and hours, as indicated. At each output" (which is actually a plurality of leads as indicated) the numbers are supplied in the form of a plurality of binary representative (ONE or ZERO) simultaneous voltage levels which are in turn supplied to a multiplex switch or distributor 14. Switch 14 connects the outputs of divider l2 sequentially to the inputs of a decoder 18. The rate at which the switching or distribution operation of switch 14 occurs is controlled by a multiplex driver 16, or may be controlled from an external source.

Decoder 18 changes the received binary coded signals to address codes for a Read Only Memory (ROM) 20. ROM 20 is programmed to contain electronic character images (each a seven element signal) for the number through 9. Each of these images is stored at a given address in ROM 20. Thus, when decoder 18 presents a number corresponding to a given address to the input of ROM 20, the resultant output of ROM will be a fully decoded seven element signal suitable for connection directly to the respective segments of a standard seven segment numeric display. The segment outputs 22 of ROM 20 thus are connected directly in parallel to the respective segments of each seven segment numeric display, such as 24, on a six number display panel 26.

Multiplex driver 16 also drives a multiplex decoder 28 in synchronism with multiplex switch 14. Decoder 28 has six digit enable lines 30 which are connected to respective character displays 24. Each display will operate only when its digit'enable line 30 and one or more of its segment lines 22 are appropriately energized. Under control of multiplex driver 16 and decoder 28, lines 30 are sequentially energized at appropriate times in synchronism with the output of ROM 20 such that when the outputs 22 of ROM 20 represent the digit to be presented at a predetermined display, all segments of every display will be energized in parallel by lines 22 to represent the digit, but only the predetermined display will be illuminated to show the digit since only its line 30'will have been energized by decoder 28. The matrix displays shown represent, from left to right, tens of hours, hours, tens of minutes, minutes, tens of seconds, and seconds. Panel 26 is shown as it would be seen by the eye representing the time l2:37:08 oclock, although, as stated, due to multiplex operation, only one display of panel 26 is on at any instant.

Horological systems similar or identical to FIG. 1 are widely available commercially in the form of electronic digital clocks or in wristwatch form, e.g. those sold under the trademark Pulsar by HMW Industries, Inc., Lancaster, Pennsylvania. The electronic circuit components and character displays are also separately available. A typical integrated ciruit (IC) digital clock containing all of the electronic components shown is type MM5311 manufactured by National Semiconductor Corporation, Santa Clara, Calif. The character displays are individually available as seven segment numeric display matrices in the form of direct current gas discharge tubes, electroluminescent panels', liquid crystal displays, light emitting diode arrays, etc. The character displays are also available in forms (such as alternating current plasma displays, projection character displays, etc.) which require additional driver circuitry to be provided after or substituted for ROM 20. Such circuitry is well known to those skilled in the art. Any type of matrix or other selectable number or character display can be used according to the invention.

A plural character display panel, such as 26, represents asignific ant fraction of the cost, space, and weight of the overall system. The cost of the six digit panel shown is usually more than that of the electronic components shown. The cost, space, and weight problems become especially acute if the individual characters are large, say one-half inch high or larger. If the display is reduced in size in order to reduce its cost, bulk, and weight, the characters become too small to read conveniently, especially if more than six characters are included.

OBJECTS Accordingly, several objects of the invention are to provide a matrix display system capable of presenting plural character words, but wherein the cost is significantly reduced, to provide such a system wherein the volume and weight of the display is also significantly reduced, and to provide such a system in which the size of the display, and hence its readability, is greatly improved. Additional objects and advantages will become apparent from a consideration of the ensuing description and attached drawings.

DRAWINGS FIG. 1 is a logic diagram of a known system for generating and displaying horological data.

FIG. 2 shows six sequential views of a display according to the invention presenting the time at 12:37:08 oclock.

FIG. 3 is a block diagram of a display system according to the present invention. This system is based upon the prior art system of FIG. 1 and is especially suitable for displaying data which changes relatively slowly and is continuously available, such as horological data.

FIG. 4 is a block diagram of a modified display system according to the present invention. This system is especially suitable for displaying data which changes more rapidly and continuously, such as written text.

LIST OF REFERENCE NUMERALS l stable frequency source 12 frequency divider 14 multiplex switch '16 multiplex driver DESCRIPTION OF THE PREFERRED EMBODIMENTS-FIG. 2

According to the present invention a system for displaying plural character words employs a single character display and means for causing said display to present the characters of said word in sequential form. After the word is thusly displayed, a pause is provided and the word may be redisplayed in similar fashion or with one or more characters changed, if appropriate, e.g. in the case of horological data where the word is a series of numbers representing time, which continuously changes.

FIG. 2 illustrates six successive views of the same seven segment matrix display presenting a horological word, i.e., the time of day, in accordance with the invention. A single matrix display shows the time at 12:37:08 oclock by presenting the characters singly in the order in which they would normally be read. First (FIG. 2A) the two right hand segments are energized to display a l for a short period of time. Then the display is blank for a short period (not illustrated). Then (FIG. 2B) the appropriate segments for displaying a 2 are energized'for a short period, followed by a similar short pause, and so forth (FIG. 2C-F) until all six digits have been displayed in sequence, as illustrated. Then a long pause is provided to separate different horological words and the sequence is then repeated, this time with new seconds digits, according to the actual time when the next word is displayed. Eventually the minutes and hours digits will also change.

The short pauses between characters can be omitted, but they are preferred as they have been found to increase the ease of readability by providing a demarcation between characters. The longer pauses between repetitions of the sequence prevent confusion of characters of one word with those of the next. An alternative to the shorter pause in this application would be the presentation of a colon after the hours digits and again after the minutes digits. This has not been found to be desirable or necessary in practice, however.

FIG. 3-DESCRIPTION FIG. 3 shows a system according to the present invention for causing a single digit display to operate in the fashion shown in FIG. 2. The system of FIG. 3 is especially suitable for presenting horological or other slowly varying, continuously available data.

All of the circuitry of FIG. 1 is provided in the form of an IC 40, which may be the National type MM5311 digital clock aforenoted. To this is added a BCD (binary coded decimal) counter or divider circuit 42, a second multiplex switch 44, and an inverter 46. Display panel 26 of FIG. 1 is replaced by a single digit character matrix display 24, i.e. five of the displays of panel 26 of FIG. 1 are eliminated.

The segment enable outputs 22 from IC 40 are connected to display 24 in the same manner as in FIG. 1. The digit enable input of display 24 is permanently activated by connection to one terminal (ground) of the potential source (not shown) which biases IC 40. Digit enable lines 30 are connected to the inputs of multiplex switch 44, which may be an RCA CD4051 analog multiplexer. One of digit enable lines 30 is also connected to input 48 of counter 42, which may be a National MM74Cl6O BCD counter. The outputs of counter 42 supply a plurality of binary representative simultaneous voltage levels to address inputs 50 of multiplex switch 44. Output 52 of multiplex switch 44 is connected to an inverter 46 whose output voltage level is the logical opposite of the input voltage level, i.e. when a binary ONE is present at its input, a binary ZERO will be present at its output, and vice-versa. The output of inverter 46 is connected to an output enable terminal 54 of IC 40. When a logical ONE is present at terminal 54, any segment enable outputs 22 which have been selected by the internal circuitry of IC 40 will be energized. The unused inputs 56 of multiplex switch 44 are permanently connected to a voltage source 58 (shown as positive for illustrative purposes) which is representative of a binary ONE.

Counter 42 provides a binary-coded decimal output number which advances one count when clock input 48 makes a transition from one logical state to the other and back again. l.e., when input 48 goes from ONE to ZERO to ONE (or vice-versa), the binary output number on address inputs 50 will advance.

Multiplex switch 44 acts as a single-pole, eight-throw switc'h under control of the binary number presented to its address inputs 50. Le, its output 52 will be connected directly to a different, sequential one of digit enable lines 30 each time the number on address inputs 50 of switch 44 advances. If output 52 is connected to a digit enable line 30 which is at logical ZERO, inverter 46 will provide a logical ONE on output enable terminal 54 of IC 40, thereby causing the segment enable outputs 22 which have been selected by the logic circuitry within IC 40 to be energized. The first input of multiplex switch 44 to be selected by address inputs 50 is connected to the tens of hours digit enable line 30. Similarly, the second, third, fourth, fifth, and sixth inputs of multiplex switch 44 to be selected by address inputs 50 are connected to the hours, tens of minutes, minutes, tens of seconds, and seconds digit enable lines 30, respectively. Multiplex switch 44 will then select the digits of time and cause them to be shown on display 24 in the sequence in which they would normally be read if seen all at once in a horizontal row.

FIG. 3OPERATION The logic circuitry within IC 40 will continuously generate internal signals which, if supplied to segment enable outputs 22, would present rapidly changing (multiplexed) seconds, minutes, and hours digits information to matrix display 24. However, as stated, such digits are supplied to outputs 22 only when a ONE is present at output enable terminal .54.

At a given point in time one of digit enable lines 30 will be connected through multiplex switch 44 under the control of address inputs 50 to the input of inverter 46. Each digit line will be at ZERO when its associated digit is to be displayed. This digit will then be shown on matrix display 24 if the ZERO is connected through switch 44 and inverted to a ONE in inverter 46.

When the multiplexer within 1C 40 advances to a new digit after one has been displayed, display 24 will be blanked since an enabled digit line is no longer connected to output 52 of multiplex switch 44. The blanked display will continue for at least six more digits (assuming hours, minutes, and seconds are all to'be displayed) until the digit enable line 30 connected to clock input 48 of counter 42 causes counter 42 to advance one count. Then a new address will be presented "to multiplex switch 44 and its output 52 will be connected to the enabled digit line 30 of the next character to be displayed. The input to inverter 46 will again be ZERO and its output will cause that digit to be shown on matrix display 24, and so forth. This sequence will then be repeated. Since counter 42 advances one count per complete clock cycle at clock input 48, a blank interval between characters will be provided.

A convenient rate of speed for presenting this data is approximately one sequence of six digits per eight seconds. Thus, in the case described above clock input 48 of counter 42 will be presented with one pulse per second. Digit enable lines 30 therefore will be selected at the rate of eight per second. This provides a ONE at output enable terminal 54 for one-eighth second, followed by a ZERO of seven-eighths second, and so on. The short (la-second) enable signal followed by the ha-second pause has been found to increase the readability of display 24 by providing demarcation in time between characters. The extra pause obtained when the output of multiplex switch 44 is connected to ONE- energized inputs 56 provides a longer interval between character sequences.

V with one which has additional inputs to be selected and also connecting the additional inputs to voltage source v 58. Alternatively, the pauses may be lengthened by replacing BCD counter 42 with one capable of counting to higher numbers and connecting the address inputs of multiplex switch 44 to the most significant output bits. Other connections of digit lines 30, multiplex switch 44, and a decremental, rather than incremental counter 42 will provide other combinations of output enable signals and pauses. The seconds digits may be omitted in this application when the sequence is repeated every several seconds. In this situation they are of doubtless value and the display will be more easily read with the additional pause between sequences. The two additional inputs of multiplex switch 44 thus gained will be connected in parallel with inputs 56 and thus to a ONE in order to blank the display when their turn is reached.

FIG. 4DESCRlPTlON vFIG. 4 shows a system according to the presentinvention for causing a single character display to present alphanumeric information which is continuously changing, e.g. written text. This embodiment is most suitable for presentation of text in which the characters are presented in the order in which they would normally be read, e.g. the informational readout of a computer or data processor.

The system of FIG. 4 consists of a data source 68 which supplies single or multiple-character words in individual sequence and in coded form on lines 74. Data source 68 is preferably a digital computer which contains controllable output buffer registers. Source 68 also supplies a Display Character pulse to one-shot 66 and to the input of a second one-shot 62 which in turn supplies a delayed output to a Display New Character input of source 68. This input advances the output buffer registers of source 68 in well known fashion.

Source 68 can operate independently of the display system by supplying characters at some predetermined rate of speed, or it can supply characters on demand, the demand signal being an output pulse from one-shot 62. Display 66 operates in a fashion similar to that described above in FIGS. 1 through 3. If the digit enable input 70 is at ONE, then an input to any of the segment enable lines 72 will cause that segment to be energized.

Otherwise the display will be blanked.

FIG. 4-OPEQRATION Display decoder 64 receives alphabetic, numeric, or alphanumeric words one character at a time from input lines 74. The information is preferably coded in parallel binary form, but may be in serial binary form in which case only one line 74 is required. Decode circuit 64 contains a ROM which, when presented with suitable address codes from input lines 74, produces a plurality of binary coded output voltages on lines 72 which are suitable for driving multi-segment alphanumeric display 66. The output of one-shot 60 is connected to digit enable line 70 of display 66. When this one-shot is in the active state, i.e. its output is a ONE, display 66 will be enabled and any segments enabled by inputs from decoder 64 will be energized. The duration of the display is controlled by the length of time one-shot 60 is in the active state. When one-shot 60 returns to the inactive state, display 66 will be blanked. One-shot 60 is switched to the active state by a pulse from data source 68 each time a character is to be displayed.

One-shot 62 signals data source 68 that a character has been displayed and that a new character should be sent to the display system. Without the addition of oneshot 62, the character display rate is controlled by oneshot 60 if the data source senses the logical output transition of one-shot 62 from inactive to active. Otherwise, if data source 68 senses the active to inactive transition of one-shot 62, then the character display rate is controlled by the sum of the delays introduced by both one-shots 60 and 62.

OTHER EMBODIMENTS While the above description contains many specificities, these should not be construed as limitations upon the scope of the invention, but rather as an exemplification of several preferred embodiments thereof. Many other embodiments are possible. For example, those skilled in the art will be able to devise many alternative logic systems for driving the single character display with multiple character words in the manner aforedescribed. In another example a timepiece suitable for use by blind persons or which can be read in the dark can be provided. In this embodiment, an aural output station is substituted for a visual display. The numbers are read out either in some code, such as I Morse code, or with a series of short tonal beeps corresponding to the numbers of time. For example, 12:37 oclock would sound like: BEEP, pause, BEEP-BEEP, pause, BEEP-BEEP-BEEP, pause, BEEP-BEEP-BEEP- BEEP-BEEP-BEEP-BEEP. The tone sequence would be initiated on demand by the user at the push of a button. In yet another embodiment, the readout could be tactile, with the segments or elements of the display consisting of piezoelectric elements or solenoid-controlled pins whose positions indicate an ON or OFF state. Another form of tactile display would be analogous to the sequential BEEP embodiment above noted, except that sequential palpable manifestations would be substituted for aural BEEPS. Therefore the full scope of the invention should be construed only according to the appended claims and their legal equivalents.

I claim: 1. A single digit, repetitive sequential display electronic clock, comprising, in combination:

a. a character display matrix for selectively displaying any one of a predetermined plurality of characters in a single, fixed position, said matrix comprising an array of elements which are selectively actuable in predetermined combinations to display said respective characters,

b. driver means for supplying a signal to said display matrix to cause it to display repetitively plural character elapsed time indications, each such indication consisting of a plurality of characters indicative of the number of time units which have elapsed from a predetermined starting time, said plurality of characters being displayed in individual sequence by said character display matrix in the order which they would be read by an observer if all of said plurality of characters were simultaneously presented in a horizontal row, each plural character time indication repeating continuously until at least the least significant portion thereof should change due to the passage of time, whereupon a new time indication, consisting of a new sequence of a plurality of characters indicative of the next higher number of time units which have elapsed from said predetermined starting time, will be repetitively displayed.

2. The clock of claim 1 wherein said driver means is arranged to cause said display matrix to display time units which consist of an indication of the number of hours followed by the number of minutes which have elapsed from said predetermined starting time.

3. The clock of claim 1 wherein said driver means is arranged to cause said display matrix to display an increasing quantity of time units until a predetermined quantity is reached, and thereupon to start over from a new starting time.

4. The clock of claim 1 wherein said character display matrix is arranged to display selectively only any of the numerical digits, 0 to 9, and said driver means is arranged to supply plural sequential digit time indications.

5. The clock of claim 1 wherein said driver means comprises a digital clock arranged to supply continuous binary output representative of multidigit time indications, the binary output changing only when the elapsed time has changed, and means for converting said binary output to a signal output for repetitively activating said display matrix, one digit at a time.

. 6. The clock of claim 4 wherein said character 'display matrix comprises an array of elements which, when all actuated, will display the Arabic number 8.

7. The clock of claim 6 wherein said elements are seven in number, each consisting of a single bar.

8. The clock of claim 1 wherein said driver means is arranged to supply said signal in time division multiplexed form, said means including enabling means for connecting said output signal to said display means in synchronism with the time division multiplex rate.

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U.S. Classification368/155, 340/815.44, 340/815.62, 968/968, 368/223, 968/936, 968/957, 968/955, 345/34
International ClassificationG09G3/04, G04G9/08, G04G9/00, G04G13/00
Cooperative ClassificationG04G9/082, G09G3/04, G04G9/087, G04G9/0064, G04G13/00
European ClassificationG04G9/00F, G04G9/08D, G04G9/08B, G09G3/04, G04G13/00