|Publication number||US4129090 A|
|Application number||US 05/673,535|
|Publication date||Dec 12, 1978|
|Filing date||Apr 5, 1976|
|Priority date||Feb 28, 1973|
|Publication number||05673535, 673535, US 4129090 A, US 4129090A, US-A-4129090, US4129090 A, US4129090A|
|Inventors||Keizo Inaniwa, Noboru Ryugo|
|Original Assignee||Hitachi, Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (13), Referenced by (22), Classifications (18)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This is a division of application Ser. No. 446,791 filed Feb. 28, 1974 now U.S. Pat. No. 3,948,696.
1. Field of the Invention
The present invention relates to an apparatus for diffusing an impurity into a semiconductor wafer.
2. Description of the Prior Art
In diffusing an impurity into semiconductor wafers, for example, in diffusing a P-type impurity into silicon wafers by the use of boron nitride (BN), the following is a description of a known method. Wafers (partially oxidized to some extent) of boron nitride (which is a P-type impurity source) and wafers of silicon are alternately arranged on a boat. In this arrangement, the boat is inserted into a silica tube. Thereafter, the silica tube is heated from an outer periphery, to form a boron oxide atmosphere inside the silica tube. In this manner, boron oxide is deposited on the silicon wafers, and besides, the impurity oxide is diffused into them. In this case, an inert gas (N2) is fed in through one end of the silica tube, so as to prevent the surfaces of the silicon wafers from being oxidized.
With this known method, however, the silica tube is in the open state during the heating and the inert gas is fed in through one end of the silica tube, so that the temperature distribution within the silica tube is not uniform in its lengthwise direction. For this reason, the quantity of impurity introduced into the silicon wafers lined up on the boat is dispersed, i.e., varied, and accordingly, surface specific resistance of the silicon wafers depends on the lined-up position of each wafer.
This point will now be described in detail. As stated above, the inert gas is caused to flow in through one end of the silica tube. Even when the inflowing inert gas reaches a uniformly heated portion within the tube, it does not yet arrive at the uniform heating temperature. Therefore, the inert gas lowers the temperature of the boron nitride and silicon wafers at the uniformly heated portion of the tube. In addition, the inert gas disturbs the flow of a boron oxide impurity gas produced from the boron nitride. Further, the other end of the silica tube is open in the foregoing boron deposition and diffusion process. Consequently, the air intrudes into the tube from the open end, oxidizes the surfaces of the silicon wafers and locally checks the deposition of impurity. Due to such various factors, the quantity of impurity introduction into the silicon wafers varies in dependence on the lined-up position of the wafers on the boat, and a variation in the surface specific resistance arises.
As a method for compensating for the drawbacks described above, the so-called ampoule diffusion procedure is contemplated in which silicon wafers and an impurity are sealed in a vacuum ampoule, the ampoule is inserted into a silica tube, and the tube is heated to directly vaporize atoms of the impurity and to diffuse them into the semiconductor wafers. With this method, however, the semiconductor surface becomes rough. In addition, it is necessary to especially fabricate the ampoule and to break it after completion of the diffusion. Thus, the method is uneconomical and is troublesome in procedure.
It is therefore the principal object of the present invention to provide a method of impurity diffusion into semiconductor wafers which diminishes a variation in the surface concentrations of the diffused layers in the case of an impurity deposition or diffusion for the silicon wafers.
Another object of the present invention is to provide a method of impurity of diffusion into semiconductor wafers which eliminates the want of economy and the troublesome procedure as in the ampoule diffusion and by which the diffusion treatment can be carried out within a silica tube many times.
In order to accomplish these objects, the present invention contemplates a process wherein a diffusion apparatus comprising a diffusion furnace composed of a furnace core tube and a heater is used, semiconductor wafers are inserted from an inlet of the furnace core tube, the inlet is sealed by a cap, the interior of the furnace core tube is placed under vacuum, an atmosphere of an impurity is formed within the tube, e.g., by heating an impurity source within the core tube or by introducing the atmosphere into the tube, and the impurity is diffused into the semiconductor wafers.
FIG. 1 is an elevational view illustrating an embodiment of the apparatus and the diffusion method of the invention for diffusing an impurity into semiconductor wafers;
FIG. 2 is a diagram illustrating the results of comparative experiments by the method of the present invention and a prior-art method; and
FIGS. 3 and 4 are elevational views each showing other embodiments of the present invention.
FIG. 1 shows a diffusion apparatus illustrative of the type in which an embodiment of the method of impurity diffusion into semiconductor wafers is practiced according to the present invention. In the diffusion apparatus shown, a furnace core tube 2 made of silica tube is fitted in an electric furnace 1 including an electric resistance heater. At one end of the furnace core tube 2, a detachable cap 3 is fitted, e.g. the cap 3 has the structure of a cap nut that is screwed onto the tube 2. This cap is made of a metal such as aluminum or of a ceramic. At a part of the cap 3, there is provided a passage 5 for passing a drawer rod 4 therethrough. The drawer rod 4 serves to move a boat for positioning semiconductor wafers which will be described in greater detail. At the other end of the furnace core tube 2, an evacuating port 6 is formed which serves to make the interior of the furnace core tube 2 vacuum and which is connected to a vacuum pump not shown. In this case, the hole or passage 5 is so constructed that the air may not enter even when the interior of the furnace core tube 2 is made vacuum. For example, rod 4 may be threaded within passage 5.
With such construction, boron nitride wafers 8 and silicon wafers 9 to be diffused are arranged on the boat 10 so that the silicon wafers can oppose both faces of the former wafers. The boat 10 is placed at an open end 7 of the furnace core tube 2. Thereafter, the open end 7 is sealed by the cap 3. The interior of the furnace core tube 2 is placed under vacuum through the evacuating port 6 opposite to the open end 7 by the use of the vacuum pump not shown. With the vacuum state held, the boat 10 is moved to the central part 1a of the furnace core tube 2 by the drawer rod 4, and the deposition and diffusion of impurity are carried out by the application of heat. After the treatment, the boat 10 is pulled back towards the cap 3 of the furnace core tube 2 by the drawer rod 4, the cap 3 is detached, and the boat 10 is taken out.
With this process, the deposition is effected in the vacuum, so that the non-uniformity in temperature, as caused by the current of an inert gas differing in temperature from the furnace core tube 2, does not arise. Since only the boron oxide (B2 O3) impurity gas vaporizing from the boron nitride (BN) is used, the non-uniformity in the atmosphere of the boron impurity gas in the vicinity of the silicon wafers caused by the inflow of the inert gas such as N2 gas can be avoided. Consequently, uniformity is achieved in the concentration of the boron impurity to be diffused into the silicon wafers, and no variation occurs in the surface specific resistance.
Since the air is perfectly shut out, the oxidation of the silicon wafers is prevented, and the semiconductor wafer surfaces are uniformly covered with deposition layers of boron oxide.
After the deposition treatment stated above, the boron oxide formed on the surfaces of the semiconductor wafers is etched and removed with the diffused impurity left behind. Then, diffusion is carried out in an oxidizing atmosphere again.
FIG. 2 illustrates the results when the method of the present invention and the prior-art method were experimentally studied. The axis of abscissas represents the position of each silicon wafer arranged on the boat, while the axis of ordinates represents the surface specific resistances of the silicon wafer after the deposition and after the rediffusion. As understood from the graph, the prior-art method, indicated at 2a and 2b, exhibits U-shaped characteristics, and the silicon wafers have great differences in the surface specific resistance between the central part of the boat and both end parts thereof. In contrast, according to the method of the present invention, the surface specific resistances of the silicon wafers become substantially horizontal and rectilinear as shown by curves 2c and 2d, and the resistance is not very different between the central part of the boat and the end parts thereof.
In this embodiment, the boron nitride wafers and the silicon wafers are oppositely arranged on the boat. Since, however, the diffusion length of molecules (here, B2 O3) is extended in the vacuum, the boron vapor spreads sufficiently within the vacuum system, and it is therefore unnecessary to oppose the boron nitride wafers and the silicon wafers. Accordingly, boron nitride may be in any desired form and may be located at any desired position within the furnace core tube. By way of example, as shown in FIG. 3, a tunnel b of boron nitride is made by a cylinder thereof within the furnace core tube, and the boat 10 on which only the silicon wafers 9 are erected is inserted therein.
Although, in the foregoing embodiment, boron nitride is used as the impurity, the boron oxide gas may also be employed. The oxide gas may be introduced after the interior of the furnace core tube with only the silicon wafers inserted therein has been made vacuum.
Although, in the foregoing embodiment, the boat is inserted from one end of the furnace core tube and is taken out from the same end after the deposition, it is also possible that, as illustrated in FIG. 4, that a similar cap 3a is also provided at the other end so as to take out the boat therefrom. It is a matter of course that, in this case, the evacuating port for the vacuum may be provided in the outer periphery of the furnace core tube or in either of the caps at both the ends.
Although, in the foregoing embodiments, the interior of the furnace core tube is evacuated by means of the vacuum pump, there will be the possibility that a slight amount of air will remain to oxidize the silicon wafers. In this respect, the prevention of the oxidation is increased in reliability by conducting the evacuating operation after the tube has been once filled with an enert gas such as N2.
With the method of diffusion into semiconductor wafers according to the present invention as described above, the variation in the surface concentrations of the impurity diffused layers can be reduced to approximately one-fifth. Since the impurity concentrations at the central part and both the end parts of the boat have substantially no difference, large quantities of semiconductor wafers can be received by increasing the length of the boat. The number of the semiconductor wafers to be treated at one time of deposition can therefore be increased to be 2 - 3 times as large as that treated in the prior art.
It will be understood, that the pressure of the tube may be reduced to not more than 100 torr and that furnace temperatures on the order of from 850 to 1150° C. may be employed to effect diffusion of the impurity. Also, other impurities such as phosphorus and antimony may be deposited by this method. For example, phosphorus nitride (P3 N5) and antimony oxide (Sb2 O3) may be used as impurity sources. The conditions and results of such impurity deposition under vacuum are further described in U.S. patent application Ser. No. 440,358 filed on Feb. 7, 1974, now U.S. Pat. No. 3,948,695.
In general, the furance is heated to the required temperatures for a predetermined time of from 10 to about 120 minutes to promote diffusion of the impurity into the silicon wafers. Also, the silicon wafers are usually from about 30 to 100 mm in diameter and are spaced from about 1 to 1.5 mm from each other on the supporting jig, i.e., boat 10. Also, as previously mentioned, the pressure in the furnace core tube is reduced to not more than 100 torr. or is placed under a vacuum of approximately 10-6 mmHg. A preferred reduced pressure range for an embodiment of the type illustrated in FIG. 3 is from 0.1 to 1 torr.
While the novel embodiments of the invention have been described, it will be understood that various omissions, modifications and changes in these embodiments may be made by one skilled in the art without departing from the spirit and scope of the invention.
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|U.S. Classification||118/728, 432/253, 118/900, 118/733, 438/568|
|International Classification||C30B31/06, C30B31/12, C30B31/02, H01L21/00|
|Cooperative Classification||H01L21/00, C30B31/12, C30B31/06, Y10S118/90, C30B31/02|
|European Classification||H01L21/00, C30B31/06, C30B31/12, C30B31/02|