|Publication number||US4399375 A|
|Application number||US 06/238,295|
|Publication date||Aug 16, 1983|
|Filing date||Feb 25, 1981|
|Priority date||Mar 17, 1980|
|Also published as||CA1171457A, CA1171457A1, DE3110038A1|
|Publication number||06238295, 238295, US 4399375 A, US 4399375A, US-A-4399375, US4399375 A, US4399375A|
|Original Assignee||U.S. Philips Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (3), Referenced by (8), Classifications (14), Legal Events (5)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The invention relates to a current stabilizer comprising enhancement field-effect transistors in which a first and a second parallel current path are current-coupled to each other via a first and a second current coupling circuit which define a different relationship between the currents in the first and the second current paths, and with one common point (value) unequal to zero at which the currents in the first and the second current paths stabilise themselves.
Such circuits are used on a large scale in bipolar versions (see inter alia DT-OS No. 21 57 756). The first current coupling circuit is then a current mirror which defines a linear relationship between the currents in the first and the second current paths and the second current coupling circuit is a current mirror with a resistor included in the emitter circuit of one of the transistors of the current mirror to provide degeneration in order to obtain a non-linear relationship between the currents in the two current paths.
Current stabilisers are also frequently required in integrated circuits equipped with field-effect transistors. Using transistors of the depletion type presents no problem because a field-effect transistor of the depletion type can be operated as a current source by means of a connection between the gate electrode and the source electrode. However, this is not possible when field-effect transistors of the enhancement type are used.
It is possible and known per se to "translate" said bipolar stabiliser into a version with field-effect transistors by replacing the transistors by field-effect transistors. However, the use of said resistor is then less attractive because the current at which the circuit stabilises itself has a square-law relationship with the value of said resistor so that the stabiliser is very sensitive to variations in the spread of the resistance value and such a resistor generally occupies much space in the integrated circuit. These problems may be avoided by replacing said resistor by a field-effect transistor (of the enhancement type) operated as a resistor, but this merely shifts the problem because the gate electrode of this field-effect transistor should then be biased by means of a stable voltage source, which again demands a voltage stabiliser which may also be subject to spread.
It is an object of the invention to provide a circuit of the type mentioned in the preamble which is subject to minimal spread and which can simply be realised without the use of a resistor as a stabilising element. To this end the invention is characterized in that the first current coupling circuit comprises field-effect transistors of a first conductivity type and that the second current coupling circuit comprises a first field-effect transistor of a second conductivity type opposite to that of the first one, whose channel is included in the first current path, and a second field effect transistor of the second conductivity type, whose channel is included in the second current path, of which first and second field effect transistors the source electrodes are connected to a first common terminal, the current stabiliser comprising means for defining a substantially constant difference between the gate-source voltage of the first field-effect transistor and the gate-source voltage of the second field-effect transistor.
The stabiliser in accordance with the invention does not present the said problems because the use of a resistor as a stabilising element is avoided.
The principle of the circuit in accordance with the invention is that the difference between the gate-source voltage of the one transistor and the gate-source voltage of the other transistor is substantially constant so that the voltage-current characteristics, if related to the source-gate voltage of the first or the second transistor, will have a different zero point and that owing to the different dimensioning of the first and the second transistor and/or of the transistor of the first current coupling circuit a stabilising point is obtained.
The invention may further be characterized in that said means comprise a bipolar semiconductor junction.
A preferred embodiment of such a current stabiliser is further characterized in that the bipolar semiconductor junction is the base-emitter junction of a bipolar transistor, whose base electrode is connected to the gate electrode of the second field-effect transistor and whose emitter electrode is connected to the gate electrode of the first field-effect transistor and to a bias-current source, the gate electrode of the second transistor being coupled to the drain electrode of the first transistor in a regenerative sense.
In this respect it is advantageous that the bias-current source be a third field-effect transistor of the second conductivity type, which is arranged as a current mirror together with a transistor of the current stabiliser.
Furthermore, this embodiment is characterized in that the gate electrode of the third field-effect transistor is connected to the gate electrode of the second field-effect transistor, the source electrode to the source electrode of said second field-effect transistor and the drain electrode to the emitter electrode of the bipolar transistor.
Such a current stabiliser, in which the first current coupling circuit is a current mirror arrangement, may further be characterized in that the input circuit of said current mirror arrangement is included in the drain circuit of the first transistor and the output circuit in the drain circuit of the second transistor, that the gate electrode of a fourth transistor of the first conductivity type is connected to a point between the output circuit of the current mirror and the drain circuit of the second transistor. The drain circuit of the fourth transistor is connected via the channel of a fifth transistor of the second conductivity type to a power-supply terminal, which fifth transistor, together with the third transistor and a sixth transistor, is arranged as a current mirror and constitutes the input circuit of this current mirror, the drain electrode of the sixth transistor being connected to the first common terminal and the drain electrode of the third transistor to the emitter of the bipolar transistor.
In this respect it is advantageous that the collector electrode of the bipolar transistor be connected directly to a power supply terminal.
In this way the bipolar transistor can simply be realised in an integrated circuit with field-effect transistors. For this purpose the current stabiliser is further characterized in that the field-effect transistors are formed in a semiconductor layer of a first type which is deposited on a substrate of the second type, by forming source and drain diffusions of the second type in said layer of said first type and that the bipolar transistor is constituted by a diffusion to be formed in an insulated portion of said layer of the first type, said diffusion of the second type constituting the emitter of said bipolar transistor, the said insulated portion of the layer of the first type constituting the base, and the substrate constituting the collector.
The invention will now be described in more detail with reference to the drawing, in which:
FIG. 1 represents a known current stabiliser with a field-effect transistor,
FIG. 2 shows a diagram illustrating the operation of the circuit arrangement of FIG. 1,
FIG. 3 is a circuit diagram of a current stabiliser in accordance with the invention,
FIG. 4 is a diagram illustrating the operation of the circuit arrangement of FIG. 3,
FIG. 5 represents a first embodiment of a circuit arrangement in accordance with the invention,
FIG. 6 represents a second embodiment of a circuit arrangement in accordance with the invention, and
FIG. 7 is a cross-sectional view of a part of an integrated circuit with field-effect transistors, illustrating how a bipolar transistor is realised in such an integrated circuit.
FIG. 1 shows a version of a current stabiliser with field-effect transistors which is frequently used in bipolar form. It comprises a current mirror with p-channel transistors 4 and 5, which current mirror is coupled to a current mirror comprising n-channel transistors 1 and 2, which is rendered non-linear by the inclusion of a resistor R in the source circuit of transistor 1.
FIG. 2 represents the currents I1 and I2, which flow in the current paths constituted by the series connection of the channels of transistors 1 and 4 and the series connection of the channels of transistors 2 and 5 respectively, as a function of the gate-source voltage Vgs2 of transistor 2. Transistors 1 and 2 are both turned on when Vgs2 =VT, which is the threshold voltage of the n-channel transistors 1 and 2 being used. The current I1 as a function of Vgs initially varies more gradually owing to the presence of the resistor R. By selecting the β, which is a constant which is proportional to the ratio of width and length of the channel of a field-effect transistor, of transistor 1 to be greater than the β of transistor 2, the two curves will intersect in point A, where I1 =I2. If the current mirror comprising transistors 4 and 5 defines said relationship I1 =I2 between these currents, the circuit will stabilise in point A. If the factor β of transistor 1 is equal to that of transistor 2, the curves will not intersect. However, a stabilisation point can still be obtained if the β of transistor 5 is made n times as great as that of transistor 4, so that the operating point becomes I2 =nI1. A combination of the two inequalities in β is also possible.
A drawback of the circuit arrangement of FIG. 1 is the use of the resistor R.
FIG. 3 shows an embodiment of the circuit of FIG. 1 in which the resistor R is replaced by a source 3 of constant voltage VO.
FIG. 4 represents the currents I1 and I2 as a function of the gate-source voltage Vgs2 of transistor 2. The current I2 will flow for Vgs2 >VT and the current I1 for Vgs2 >VT +VO. I2 as a function of Vgs2 is selected to vary more gradually by selecting said factor β of transistor 1 to be greater than that of transistor 2. The curves I1 and I2 then intersect in point A, which is the stabilising point if the current mirror comprising transistors 4 and 5 imposes a unity ratio on the currents I1 and I2. In the circuit of FIG. 3, in a similar way to the circuit of FIG. 1, it is possible to select the β's of the transistors 1 and 2 to be equal, so that the functions I1 and I2 in the diagram of FIG. 4 do not intersect. Stabilisation is then possible if transistor 5 has a β which is n times as great as that of transistor 4, so that the circuit stabilises at I1 =nI2. Again it is possible to employ a combination of the two possibilities.
The voltage source 3 may simply be constituted by a diode. The voltage VO then corresponds to the diode voltage Vd at the stabilised value of the current I1, which voltage Vd is then substantially constant near the stabilisation point A (see FIG. 4). For very small currents the voltage Vd decreases, which in the diagram shown in this Figure means a correction of the curve for the current I1 in accordance with the dashed line. In practice such a voltage source in conjunction with field-effect transistors may be regarded as a constant-voltage source because, even at comparatively small currents, the voltage across the diode is hardly current dependent in comparison with the dependence of the current (I1) on the source-gate voltage of a field-effect transistor (1).
Instead of a constant-voltage source in the source circuit of transistor 1, the voltage source may also be included between the gate electrodes of the transistors 1 and 2. If, for this purpose the base-emitter junction of a transistor is employed, this enables said junction to be biased with a current source so that the said slight current dependence does not exist. Since in practice said dependence presents no problems and since the stabilizer itself supplies a constant current, this may be utilised by deriving the bias for the bipolar transistor from the stabiliser itself. By deriving said current from transistor 2, i.e. having it follow the current I2, the dashed correction in FIG. 4 becomes even smaller because, directly after starting of the current stabilising arrangement, the voltage across the base-emitter junction of said transistor increases rapidly to a fairly constant value.
FIG. 5 shows a first embodiment of a current stabiliser thus designed. In comparison with the circuit of FIG. 3, the voltage source 3, connected in the source circuit of transistor 1 in FIG. 3, is replaced by a bipolar transistor 9, whose base electrode is connected to the gate electrode of the transistor 2, whose emitter electrode is connected to the gate electrode of transistor 1, and whose collector electrode is connected to a positive power supply terminal +VDD. As an emitter-current source for the bipolar transistor 8, an n-channel field-effect transistor 6 is employed whose source and gate electrodes are respectively connected to the source and gate electrodes of transistor 2 so that, together with transistor 2, it functions as a current mirror for the current I2. The drain electrode of transistor 1 is connected to the gate electrode of transistor 2 instead of to the gate electrode of transistor 1--which in principal is also possible--in order that the bipolar transistor 9 can derive base current from the drain current of transistor 1. If the gate electrode of transistor 1 were coupled to the drain electrode of the same transistor, this should be effected via for example a source-follower in order to ensure that the emitter current of transistor 9 is not mixed with the drain current I1 of transistor 1 and steps should be taken to provide transistor 9 with base current. Further, the operation is identical to that of the circuit of FIG. 3, where VO is the base-emitter voltage of the bipolar transistor 9. An advantage of the connection of the collector of transistor 9 to the positive supply voltage is that in an integrated circuit in which the channels of the n-channel field-effect transistors are formed in a p-type layer on an n-channel substrate, which is connected to the positive supply voltage VDD, the bipolar transistor 9 can be obtained very simply by forming an n-type source diffusion in the p-layer, so that said p-layer functions as the base, said n-type diffusion as the emitter and the substrate as the collector, which is thus automatically connected to the positive supply voltage. Thus, it is very simple to realise a vertical npn transistor in an integrated circuit with field-effect transistors.
FIG. 6 shows a modification of the circuit of FIG. 5 in which the emitter-current source transistor 6 is not connected to the common terminal 7 with its source electrode, but to a ground terminal, the gate electrode being connected to the gate electrode of transistor 11. In the present example point 8 is connected to the positive supply voltage +VDD. The common gate electrodes of transistors 4 and 5 are not connected to the drain electrode of the transistor 5, but to that of transistor 4. Instead of driving transistors 4 and 5 with the drain current of transistor 2, the drain electrode of transistor 5 is connected to the gate electrode of a p-channel transistor 10, whose source electrode is connected to the positive supply voltage VDD and whose drain electrode is connected to the drain electrode and the gate electrode of transistor 11, which together with transistor 6 supplies the emitter current for transistor 9, and a transistor 12 is arranged as a current mirror. The drain electrode of transistor 12 is connected to terminal 7.
The circuit operates as follows: if transistor 2 draws current, transistor 10 is turned on so that via transistor 11 and transistor 12 current is applied to terminal 7, as a result of which transistor 5 is driven via transistor 1 and transistor 4, so that ultimately transistor 2 and 5 carry the current I2 (the gate electrode of transistor 10 draws no current♭) and transistors 1 and 4 draw the current I1, the circuit stabilising itself at point A in the characteristic in accordance with FIG. 4, where VO is the base-emitter voltage of transistor 9.
In order to start the circuit--for I1 =I2 =0 is also stable situation--a reverse-biased diode 13 may be included between the gate electrode of transistor 11 and the positive supply terminal +VDD, the leakage current of said diode being sufficiently high to assure that the circuit is started, so that it operates at the desired stable point.
In the embodiment of FIG. 6 the stabilised current I1 or I2 cannot be taken from terminals 7 and 8. These stabilised currents, however, can always be coupled out via current mirror techniques--also in the circuits of FIGS. 3 and 5--for example by connecting a field-effect transistor with its source-gate electrode in parallel with the source-gate electrode of transistor 1, 2, 4 or 11.
FIG. 7 shows a part of a cross-sectional view of an integrated circuit to illustrate how the bipolar transistor 9 is realised in an integrated circuit with field-effect transistors having an n-type substrate 14. On said substrate a p-type epitaxial layer 15 is deposited, which is divided into individual regions (15a, 15b) by regions 16. In another type of process, instead of by means of the use of an epitaxial layer 15, the p-type regions 15a and 15b may also be realised by forming deep p-type diffusions ("pocket") in the substrate 14. By means of an n-type diffusion 16 with a terminal 18 a source-electrode terminal of an n-channel field-effect transistor is obtained in the region 15a. A drain electrode is obtained by forming an n-type diffusion 17 with a terminal 20, and a gate electrode by forming an electrode 19 on an insulating intermediate layer 23 between the drain and source electrodes. A vertical npn-transistor is formed by the substrate 14, the p-type region 15b, which is provided with a terminal 22, and an n-type diffusion 17, which is provided with a terminal 21, which in this order constitute the collector, base and emitter of an npn-transistor.
|Cited Patent||Filing date||Publication date||Applicant||Title|
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|US4300091 *||Jul 11, 1980||Nov 10, 1981||Rca Corporation||Current regulating circuitry|
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|Citing Patent||Filing date||Publication date||Applicant||Title|
|US4471292 *||Nov 10, 1982||Sep 11, 1984||Texas Instruments Incorporated||MOS Current mirror with high impedance output|
|US4482824 *||Jul 12, 1982||Nov 13, 1984||Rockwell International Corporation||Tracking ROM drive and sense circuit|
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|US5739719 *||Mar 3, 1997||Apr 14, 1998||Oki Electric Industry Co., Ltd.||Bias circuit with low sensitivity to threshold variations|
|US6087821 *||Oct 6, 1999||Jul 11, 2000||Ricoh Company, Ltd.||Reference-voltage generating circuit|
|U.S. Classification||327/538, 323/315, 330/257, 327/542, 257/E27.015|
|International Classification||H03F3/345, H03K17/687, H03F3/34, H01L27/06, G05F3/26|
|Cooperative Classification||G05F3/262, H01L27/0623|
|European Classification||H01L27/06D4T, G05F3/26A|
|Mar 7, 1983||AS||Assignment|
Owner name: U.S. PHILIPS CORPORATION, 100 EAST 42ND ST., NEW Y
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:SEMPEL, ADRIANUS;REEL/FRAME:004102/0237
Effective date: 19810126
|Dec 29, 1986||FPAY||Fee payment|
Year of fee payment: 4
|Mar 19, 1991||REMI||Maintenance fee reminder mailed|
|Aug 18, 1991||LAPS||Lapse for failure to pay maintenance fees|
|Oct 29, 1991||FP||Expired due to failure to pay maintenance fee|
Effective date: 19910818