|Publication number||US4499524 A|
|Application number||US 06/549,112|
|Publication date||Feb 12, 1985|
|Filing date||Nov 7, 1983|
|Priority date||Nov 7, 1983|
|Publication number||06549112, 549112, US 4499524 A, US 4499524A, US-A-4499524, US4499524 A, US4499524A|
|Inventors||Lewis J. Shioleno|
|Original Assignee||North American Philips Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (6), Referenced by (20), Classifications (25), Legal Events (5)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
This invention pertains to the assembly of a plurality of base metal multilayer ceramic chip capacitors ganged to provide a single large capacitance or high value capacitor for high frequency applications. The capacitor is constructed with ceramic chip capacitors to perform with high reliability, and to provide high yield, low cost production. The impedance and ESR characteristics of such a capacitor should be superior to aluminum electrolytic capacitors of the same value at frequencies over 50 kilohertz.
2. Description of the Prior Art
For a variety of reasons it has become desirable to replace aluminum electrolytic capacitors with capacitors which have a higher reliability, a longer life and a lower cost. With the rapid progress of the electronics industry, electronic equipment has been making various demands of passive components for miniaturization, high performance, high reliability and long life. Multilayer ceramic capacitors have matured with the development of contemporary electronics and can meet all of these demands. The one drawback to multilayer ceramic capacitors has been the limited capacitance which can be achieved within a given size device. It is very difficult to produce a large capacitance capacitor with a single large chip component due to the higher probability of physical defects causing poor electrical performance. Significant increases in the physical size of multilayer ceramic chip capacitors are almost impossible to achieve because of very low production yield and very expensive costs.
Consequently, high capacitance in multilayer ceramic capacitors is achieved by constructing a single capacitor from a plurality of ganged chip capacitors. This technique provides high reliability, high production yield and low production costs. It further permits the manufacturer to utilize the fully automated production processes which have been built for conventional multilayer ceramic capacitors. Such large capacitance multilayer ceramic capacitors are constructed with ganged chip capacitors with a common terminal, leads and resin encapsulation. The dimensions of the constituent chip components are frequently standardized into a single size and capacitance value is also standardized into a single value at each working voltage. Various sizes of capacitor cases may be provided. The maximum capacitance value and the number of chip components may be varied. Copper terminations are frequently used for the various case sizes. Such large capacitance multilayer ceramic capacitors are commercially available from Murata Manufacturing Company and NEC Inc.
The principal object of the present invention is to create a high value, low profile, surface mountable ceramic capacitor for use in high frequency applications such as switch mode power supplies.
It is a further object of the invention to provide such a ceramic capacitor which is more rugged than prior art devices, which is non-polar and which has a longer useful life.
A further important object of the invention is to provide such a high capacitance multilayer ceramic capacitor which is surface mountable to lower the cost of circuit construction and which may also be conventionally mounted by means of pins to a circuit board through hole mounting technique without changing the basic construction of the device itself.
The high value surface mounted capacitor of the present invention, also known as a modular capacitor system, is a ganged assembly of a plurality of multilayer ceramic capacitors adapted to fit a novel package, which package is in turn adapted for use with automatic placement equipment for mounting surface mounted devices or conventional pin-type devices in an alternate embodiment. The modular capacitor system assembly utilizes a PC board having terminal footprints with plated through holes. The system permits a variety of capacitance values within a given package size by allowing one or more chip capacitors to be utilized, up to the maximum internal volume of the housing, chosen to achieve the desired capacitance values. Usually a plurality of multilayer ceramic capacitors are glued to each other and to the PC board such that the terminations overlie the terminal footprints. After curing the glue a solder paste is applied, a vapor phase reflow occurs, parts are degreased and the assembly is then placed in a housing. The housing is a hollow hexahedron made of high temperature thermoplastic. The housing is basically a six-sided structure, open at one end such that the PC board which forms the base of the ganged capacitor assembly is adapted to fit within the housing to form the sixth side of the hexahedron. The finished assembly, hexahedral in shape, has plated through contacts coming from the capacitor bus on the PC board to the opposite side of the PC board, which is the base of the housing. The present invention allows for a plurality of layouts for ganged capacitors on the PC board. Capacitors may be positioned thereon edgewise or they may be positioned along the width of the chip, then can be stacked in one or more rows depending upon the configuration of the layout of the ganged capacitors on the PC board, the footprints or capacitor busses.
FIG. 1 is an exploded perspective view of a high value surface mounted capacitor according to the present invention.
FIGS. 2A and 2B are perspective views of the capacitor housing shown in FIG. 1.
FIGS. 3A and 3B are top and bottom views of the circuit board used in the capacitor of FIG. 1.
FIG. 4 is an exploded view of an alternate embodiment of the capacitor of FIG. 1.
FIG. 5 is a top plan view of an alternate embodiment of the capacitor of FIG. 1.
The assembly of a plurality of base metal multilayer ceramic capacitors to provide a large single capacitance or high valued capacitor for high frequency applications is illustrated in FIG. 1 and FIGS. 2A and 2B. For purposes of this description and without any intent of limitation, the description will refer to specific types and values of chip capacitors. Referring now to the figures, a sixty microfarad, fifty volt unit 10 with a Z5U temperature characteristic is illustrated in its surface mount version in FIGS. 1, 2A and 2B. The chips 12 are of the size, 11.8 millimeters long ×10.0 millimeters wide. The terminations 13 of these chips 12 to be used in a solder reflow application may be any of the conventional terminations for use with base metal electrodes. As shown in FIG. 2, the chips 12 are placed side to side in a ganged configuration and held together by an adhesive. The ganged capacitors 12 are then placed in a package assembly which is adapted for use with automatic placement equipment, said equipment being either of the type used for mounting surface mounted components or conventional pin type devices as in the alternate embodiment. One feature of the package is that the number of ganged capacitors may vary from one up to the maximum which can be fitted into a given size package. The modular capacitor system of the present invention permits a variety of capacitance values within a given package size by allowing one or more chip capacitors to be utilized, up to the maximum internal volume of the package, chosen to achieve the desired capacitance values.
The package for the multiple capacitor system 10 of the present invention includes a PC board 14 with conductive terminal footprints 16 plated on the PC board 14 such that the one or more multilayer ceramic capacitors 12 which are ganged and glued to each other may also be glued to the PC board 14 such that their terminations 13 will overlie the conductive terminal footprints 16. The terminal footprints 16 in effect serve as a bus for the ganged capacitors 12. The layout of the terminal footprints 16 is shown in FIG. 3a. There it wi11 be noted that the terminal footprints 16 are electrically connected to the opposite side of the substrate PC board 14 via plated through holes 22 terminating in mounting pads 25 at each corner of the PC board 14. This feature is also shown in FIGS. 1 and 2A. In an alternate embodiment these holes 22 would serve as a means for positioning leads in the event that the modular capacitor 10 of the present invention is used as a leaded device. If the modular capacitor 10 of the present invention is intended to be used as a surface mounted device, these holes 22 are filled with solder, (not shown in FIGS. 1 and 2A). The mounting pads 25 shown on FIG. 3B are all that is necessary to connect the modular capacitor 10 to a printed circuit board as a surface mounted device. Thus a plurality of multilayer ceramic capacitors 12 are glued to the PC board 14 such that the terminations 13 overlie the terminal footprints 16. After curing the glue a solder paste is applied, a vapor phase reflow occurs, parts are degreased and then the ganged assembly of multilayer capacitors 12 secured to the substrate 14 is placed in a housing 20. The housing 20 is a six sided hollow hexahedron made of high temperature thermoplastic. This housing 20 is basically a five-sided box-like structure in which the PC board 14 with multiple capacitor assembly 12 is inserted such that the base of the PC board 14 forms the sixth side of a hexahedron. The housing 20 is initially formed in a single cavity mold, but two or more cavities could be used. When the PC board 14 is placed in position to form the sixth side of housing 20, it is secured thereto by a sealing adhesive (not shown).
The process of assembling a modular capacitor 10 is as follows. A number of capacitors 12 are selected and their capacitance measured. Given the individual variations, an assembly can be made up of a range of individual capacitors which would yield the total desired capacitance. The capacitor chips 12 are then fastened together using an adhesive (not shown). This adhesive is then cured and the assembly of ganged capacitors 12 is then glued to the substrate 14 having conductive paths or footprints 16 by an adhesive. This adhesive is then cured, the assembly is then cleaned. A solder paste (not shown) is applied and it is also applied to plated through holes 22. A vapor phase reflow step then takes place to secure the chips 12 to the conductive footprints 16. The assemblies are then cleaned to remove solder flux and various other impurities. After testing and inspecting the assemblies, they are ready to be enclosed in housing 20. Housing 20 includes a recessed interior edge 24 to which a bead of sealing adhesive is applied. With housing 20 positioned opened end up the capacitor substrate assemblies are dropped in and pushed down to ensure adequate sealing of the substrate 14 against the case ledge 24. The adhesive is then cured, the final device 10 is tested and it is then ready for use.
FIGS. 4 and 5 show alternate arrangements of ganged capacitors which may be used to achieve a modular capacitor system 10 as disclosed in this application. Note that in FIG. 5 the conductive termination footprints 16 are a stylized Z shaped deposition.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US1577195 *||Oct 10, 1925||Mar 16, 1926||Rose Richard C||Condenser|
|US2229694 *||Oct 29, 1937||Jan 28, 1941||Radio Patents Corp||Electrical capacitor|
|US3395318 *||Feb 13, 1967||Jul 30, 1968||Gen Precision Inc||Circuit board card arrangement for the interconnection of electronic components|
|US3612963 *||Mar 11, 1970||Oct 12, 1971||Union Carbide Corp||Multilayer ceramic capacitor and process|
|US4423468 *||May 4, 1982||Dec 27, 1983||Motorola, Inc.||Dual electronic component assembly|
|AT126288B *||Title not available|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US5041696 *||Apr 21, 1989||Aug 20, 1991||Siemens Aktiengesellschaft||Chip component for fastening to a circuit board, comprising an electrical or electronic function member|
|US5113314 *||Jan 24, 1991||May 12, 1992||Hewlett-Packard Company||High-speed, high-density chip mounting|
|US5812365 *||Jan 26, 1995||Sep 22, 1998||Jakoubovitch; Albert||Mounting device for power capacitor banks|
|US5953201 *||Feb 6, 1997||Sep 14, 1999||Jakoubovitch; Albert||Capacitors with through-bores for fastening means|
|US6058004 *||Apr 8, 1998||May 2, 2000||Delaware Capital Formation, Inc.||Unitized discrete electronic component arrays|
|US6933805 *||Aug 6, 2003||Aug 23, 2005||Avaya Technology Corp.||High density capacitor filter bank with embedded faraday cage|
|US7053728 *||Mar 19, 2004||May 30, 2006||Avago Technologies General Ip Pte. Ltd.||Impedance transformation network, power amplifier and method for efficiently transmitting output signal using a series varactor device|
|US7054136||May 28, 2003||May 30, 2006||Avx Corporation||Controlled ESR low inductance multilayer ceramic capacitor|
|US7292429 *||Jan 18, 2006||Nov 6, 2007||Kemet Electronics Corporation||Low inductance capacitor|
|US7350281 *||Jul 26, 2004||Apr 1, 2008||Hamilton Sundstrand Corporation||Method of protecting a capacitor|
|US20050206472 *||Mar 19, 2004||Sep 22, 2005||Park Chul H||Impedance transformation network, power amplifier and method for efficiently transmitting output signal using a series varactor device|
|US20060018080 *||Jul 26, 2004||Jan 26, 2006||Schnetker Ted R||Use of parylene coating in an electric device|
|US20070165360 *||Jan 18, 2006||Jul 19, 2007||Randall Michael S||Low inductance capacitor|
|US20160020031 *||Mar 2, 2015||Jan 21, 2016||Samsung Electro-Mechanics Co., Ltd.||Composite electronic component and board having the same|
|US20160020033 *||Mar 3, 2015||Jan 21, 2016||Samsung Electro-Mechanics Co., Ltd.||Composite electronic component and board having the same|
|EP0338490A1 *||Apr 18, 1989||Oct 25, 1989||Siemens Aktiengesellschaft||Chip component with electrical or electronic function to be mounted on a circuit board|
|EP0423433A1 *||Jul 17, 1990||Apr 24, 1991||International Business Machines Corporation||Method and apparatus for bonding component leads to pads located on a non-rigid substrate|
|EP1047291A1 *||Apr 7, 2000||Oct 25, 2000||Diehl AKO Stiftung & Co. KG||Solder bridge|
|EP1215690A2 *||Nov 26, 2001||Jun 19, 2002||Murata Manufacturing Co., Ltd.||Ceramic condenser module|
|WO2000055875A1 *||Sep 28, 1999||Sep 21, 2000||Maxwell Energy Products||Low inductance four terminal capacitor lead frame|
|U.S. Classification||361/772, 361/782|
|International Classification||H05K3/36, H05K3/34, H05K1/02, H05K1/14, H01G2/06, H01G4/38|
|Cooperative Classification||H05K3/368, H05K1/141, H05K2201/10636, H05K2201/049, H05K2201/10522, Y02P70/611, H01G4/38, H05K3/3442, H01G2/065, H05K2201/10666, H01G2/06, H05K2201/10515, H05K1/0231|
|European Classification||H01G2/06B, H01G2/06, H01G4/38, H05K1/14B|
|Nov 7, 1983||AS||Assignment|
Owner name: NORTH AMERICAN PHILIPS CORPORATION 100 E 42ND ST S
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:SHIOLENO, LEWIS J.;REEL/FRAME:004194/0719
Effective date: 19831103
|Jul 8, 1988||FPAY||Fee payment|
Year of fee payment: 4
|Sep 17, 1992||REMI||Maintenance fee reminder mailed|
|Feb 14, 1993||LAPS||Lapse for failure to pay maintenance fees|
|Apr 27, 1993||FP||Expired due to failure to pay maintenance fee|
Effective date: 19930212