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Publication numberUS4539491 A
Publication typeGrant
Application numberUS 06/399,048
Publication dateSep 3, 1985
Filing dateJul 16, 1982
Priority dateJul 20, 1981
Fee statusLapsed
Publication number06399048, 399048, US 4539491 A, US 4539491A, US-A-4539491, US4539491 A, US4539491A
InventorsAkira Nishioka, Yoshihiro Kawanabe, Hiroyuki Takahori, Hideki Fujimoto
Original AssigneePioneer Electronic Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Voltage/current conversion circuit
US 4539491 A
Abstract
A voltage/current conversion circuit giving an output current which is proportional to an input voltage. The circuit includes an operational amplifier to one input of which the input voltage is applied, first and second transistors, to the commonly connected bases of which the output of the operational amplifier is applied, and a feed-back path connecting the collector of the first transistor to the other input of the operational amplifier. With the circuit thus constructed, the output derived from the collector of the second transistor is in proportion to the input voltage.
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Claims(3)
What is claimed is:
1. A voltage/current conversion circuit comprising:
an operational amplifier having first and second input terminals;
a first NPN transistor having an emitter connected through a first emitter resistor to a first power supply, a base connected to an output terminal of said operational amplifier, and a collector connected through a resistor to a second power supply;
a second NPN transistor having an emitter connected through a second emitter resistor, to said first power supply, a base commonly connected to the base of said first transistor, and a collector, the ends of said first and second emitter resistors away from said transistors being connected together;
a negative feed-back loop for feeding back a collector output of said first transistor to the first input of said operational amplifier;
means for applying a predetermined input voltage to the second input terminal of said operational amplifier;
a lead connected to the collector of said second transistor for deriving an output current therefrom; and
wherein said output current is proportional to said input voltage.
2. The circuit as claimed in claim 1 wherein said first and said second transistors are of equivalent characteristics.
3. The circuit as claimed in claim 1 or 2 wherein the collector voltage of said first transistor is equal to the predetermined input voltage.
Description
BACKGROUND OF THE INVENTION

The present invention relates to a voltage/current conversion circuit in which an output current is taken out which is proportional to an input voltage.

Shown in FIG. 1 is a prior art voltage/current conversion circuit in which an input voltage Vi is applied to a non-inverting input terminal of an operational amplifier 11 and the output of the latter is applied to the base of a transistor Q1 constituting a current converting stage. The emitter of the transistor Q1 is connected both to a power supply Vcc through a resistor R1 and to the inverting input terminal of the operational amplifier 11. The collector of the transistor Q1 is connected to the collector connected as a transistor Q2 of a diode. The transistor Q2, together with a transistor Q3 having a base commonly connected to the base of the transistor Q2, and emitter resistors R2 and R3 of the transistors Q2 and Q3, respectively, constitutes a current mirror circuit 12.

With such a circuit arrangement where a PNP transistor (Q1) is employed in the current converting stage, it is a usual practice to use a lateral PNP transistor due to the fact that a monolithic IC is relatively simple to fabricate in a IC manufacturing process. The lateral PNP is, however, disadvantageous in that transition frequency fT is low and is degraded in linearity of the current amplification factor hFE in a large current flow region, resulting that a preferrable characteristic has not been obtained.

Although the foregoing disadvantage can be resolved if a vertical PNP transistor is employed, it is disadvantageous in another aspects such that the IC manufacturing process becomes complicated involving a number of manufacturing steps, and therefore the cost for manufacturing the same becomes expensive.

SUMMARY OF THE INVENTION

Accordingly, an object of this invention is to provide a voltage/current conversion circuit giving an output current linearly proportional to an input voltage, which circuit is easy to fabricate in forming an IC.

In accordance with the invention, the foregoing and other objects are accomplished by applying an output of an operational amplifier, to one input of which a predetermined input voltage is applied, to bases of first and second transistors, each of the transistors having an emitter resistor, and feeding back the collector output of the first transistor to the other input of the operational amplifier, wherein the output current is taken out from the collector of the second transistor.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:

FIG. 1 is a circuit diagram illustrating a prior art voltage/current conversion circuit;

FIG. 2 is a circuit diagram illustrating a preferred embodiment of a voltage/current conversion circuit according to the invention; and

FIG. 3 is a specific circuit diagram of the embodiment shown in FIG. 2.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment according to the invention will now be described with reference to the accompanying drawings. FIG. 2 is a circuit diagram showing one preferred embodiment according to the invention, in which a predetermined input voltage Vi is applied to a non-inverting input terminal of an operational amplifier 21. To an output terminal of the operational amplifier 21, bases of first and second transistors Q4 and Q5 are commonly connected. The collector of the transistor Q4 is connected both to a power supply Vcc through a resistor R4 and to a non-inverting input terminal of the operational amplifier 21 to thereby form a negative feedback loop. The respective emitters of the transistors Q4 and Q5 are connected to another power supply VEE through emitter resistors R5 and R6, respectively. With the circuit thus arranged, an output current IO is derived from the collector of the transistor Q5. The voltage VA at point A is set to be in phase with the input voltage Vi, and it is assumed that the transistors Q4 and Q5 have equivalent characteristics and the resistance values of the resistors R5 and R6 are equal to each other.

With such a circuit arrangement, the collector current IA of the transistor Q4 must comply with the following condition in order that the voltage VA at point A can be equal to the input voltage Vi.

IA =(Vcc -Vi)/R4                       (1)

Here, provided that the current amplification factor hFE of the transistor Q4 is large and the linearity of hFE with respect to the variation in current is good, the emitter current IE of the transistor Q4 becomes equal to IA.

Furthermore, since the transistors Q4 and Q5 have equivalent characteristics and R5 is equal to R6, the collector current IO of the transistor Q5 is expressed as follows:

IO =IA =(Vcc -Vi)/R4              (2)

As is apparent from equation (2), it is possible to derive the output current IO which is in proportional to the input voltage Vi from the collector of the transistor Q5.

A specific circuit diagram of the embodiment shown in FIG. 2 is shown in FIG. 3. The operational amplifier 21 includes transistors Q6 and Q7, the emitters of which are commonly connected so as to effect differential operations. A constant current source 22 is connected to the common juncture point of the aforementioned transistors. Transistors Q8 and Q9 constituting a current mirror circuit in which the collectors of the transistors Q6 and Q7 are commonly connected to the collectors of the transistors Q8 and Q9, respectively, and the bases of the transistors Q8 and Q9 are commonly connected to each other. The base of the transistor Q7 is connected to the collector of the transistor Q4. The input voltage Vi is applied to the base of the transistor Q6 and the output current is derived from the collector of the transistor Q5.

As described, in accordance with the invention, neither lateral PNP transistors nor vertical PNP transistors are employed, the former being low in transition frequency fT and undesirable in linearity of current amplification factor hFE in the large current flowing region, and the latter being complicated in forming with an IC.

Accordingly, the output current which is linear or in proportional to the input voltage is obtainable and furthermore the IC formation can be easily performed according to this invention.

The voltage/current conversion circuits according in the invention is usable to a VCA voltage/current conversion circuit, FM multiplex multiplier circuits, or the like.

Patent Citations
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Reference
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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US4766415 *Sep 29, 1986Aug 23, 1988Siemens AktiengesellschaftDigital-to-analog converter with temperature compensation
US4835421 *Mar 18, 1988May 30, 1989American Telephone And Telegraph Company, At&T Bell LaboratoriesSquaring circuits in MOS integrated circuit technology
US4896333 *Aug 4, 1987Jan 23, 1990Signetics CorporationCircuit for generating a trapezoidal current waveform with matched rise and fall times
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Classifications
U.S. Classification330/260, 330/293, 327/103
International ClassificationH03F3/34, H03F3/347, G05F1/56, G08C19/02, G01D5/14
Cooperative ClassificationG05F1/561, H03F3/347
European ClassificationG05F1/56C, H03F3/347
Legal Events
DateCodeEventDescription
Jun 27, 1985ASAssignment
Owner name: PIONEER ELECTRONIC CORPORATION, NO. 4-1, MEGURO 1-
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:NISHIOKA, AKIRA;KAWANABE, YOSHIHIRO;TAKAHORI, HIROYUKI;AND OTHERS;REEL/FRAME:004418/0290
Effective date: 19820709
Owner name: PIONEER ELECTRONIC CORPORATION,JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:NISHIOKA, AKIRA;KAWANABE, YOSHIHIRO;TAKAHORI, HIROYUKI;AND OTHERS;REEL/FRAME:004418/0290
Effective date: 19820709
Feb 3, 1989FPAYFee payment
Year of fee payment: 4
Feb 16, 1993FPAYFee payment
Year of fee payment: 8
Apr 8, 1997REMIMaintenance fee reminder mailed
Aug 31, 1997LAPSLapse for failure to pay maintenance fees
Nov 11, 1997FPExpired due to failure to pay maintenance fee
Effective date: 19970903