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Publication numberUS4827325 A
Publication typeGrant
Application numberUS 07/046,523
Publication dateMay 2, 1989
Filing dateMay 4, 1987
Priority dateMay 8, 1986
Fee statusLapsed
Publication number046523, 07046523, US 4827325 A, US 4827325A, US-A-4827325, US4827325 A, US4827325A
InventorsZvi Or-Bach, Joseph Salzman
Original AssigneeOr Bach Zvi, Joseph Salzman
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Protective optical coating and method for use thereof
US 4827325 A
Abstract
A multilayer optical coating for semiconductor substrates characterized in that it is etchable by conventional techniques used for fabrication of integrated circuits and has high reflectivity.
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Claims(11)
We claim:
1. A semiconductor device comprising:
a substrate
a fusible conductor disposed on said substrate;
a multilayer protective optical coating disposed underlying said fusible conductor and characterized in that it is etchable and has high reflectivity and has more than two layers sufficient to prevent damage to underlying coatings from impinging laser radiation.
2. A semiconductor device according to claim 1 and wherein said optical coating is characterized by high reflectivity to electromagnetic radiation of a wavelength useful for fusing of conductors in semiconductor applications.
3. A semiconductor device according to claim 1 and wherein said multilayer protective optical coating is further characterized in that it has substantially zero phase shift characteristics for the reflected field.
4. A semiconductor device according to claim 1 and wherein said multilayer protective optical coating is further characterized in that it comprises silicon nitride.
5. A semiconductor device according to claim 1 and wherein said multilayer protective optical coating is further characterized in that it comprises alternating layers of silicon dioxide and Si3 N4.
6. A semiconductor device according to claim 1 and wherein said multilayer protective optical coating comprises the following layers:
______________________________________Layer                Material______________________________________1.                   SiO22.                   Si3 N43.                   SiO24.                   Si3 N45.                   SiO26.                   Si3 N47.                   SiO2______________________________________
where the lowest numbered layer is closest to the substrate.
7. A semiconductor device according to claim 1 and wherein said multilayer protective optical coating comprises the following layers:
______________________________________Layer       Material Thickness (microns)______________________________________1.          SiO2                0.084462.          Si3 N4                0.062503.          SiO2                0.084464.          Si3 N4                0.062505.          SiO2                0.084466.          Si3 N4                0.062507.          SiO2                0.08446______________________________________
where the lowest numbered layer is closest to the substrate.
8. A semiconductor device according to claim 6 and wherein said multilayer protective optical coating also comprises the following layers:
______________________________________Layer                Material______________________________________8.                   Si3 N49.                   SiO2______________________________________
where the lowest numbered layer is closest to the substrate.
9. A semiconductor device according to claim 7 and wherein said multilayer protective optical coating also comprises the following layers:
______________________________________Layer       Material Thickness (microns)______________________________________8.          Si3 N4                0.06250______________________________________
where the lowest numbered layer is closest to the substrate.
10. A semiconductor device according to claim 1 and wherein said multilayer protective optical coating is applied generally over the substrate.
11. A semiconductor device according to claim 1 and wherein said multilayer coating is applied at predetermined discrete locations over the substrate.
Description
FIELD OF THE INVENTION

The present invention relates to electronic circuitry generally and more particularly to the manufacture of integrated circuits.

BACKGROUND OF THE INVENTION

There exist various techniques for manufacture of integrated circuits using laser radiation to fuse conductive links. Examples of such techniques appear in U.S. Pat. No. 4,387,503 to Aswell et al, U.S. Pat. No. 4,238,839 to Redfern et al, and U.S. Pat. No. 3,740,523 to Cohen et al.

There is described in applicant's pending Israel Patent Application No. 74108, filed Jan. 20, 1985, semiconductor devices including a collection of semiconductor elements and having fusible links interconnecting the collection of semiconductor elements, whereby selective fusing of the fusible links, as by a laser, defines the electronic function provided by the collection of semiconductor elements.

Laser etching of the type envisioned in the above mentioned examples must be highly specific and must enable etching of a conductor on a given layer without damaging the substrate or underlying conductors in different layers of the semiconductor device.

This requirement has been approached by optimization of dielectric layer thicknesses. Such optimization is described in Application Report 150 entitled "Optimization of Semiconductor Layer Thicknesses for Repair of RAMs" by Don Smart of Teradyne Inc. of Boston, Mass., U.S.A.

A detailed study of the optical interference in dielectric layers which separate metal films appears in "Laser vaporization of metal films-Effect of optical interference in underlying dielectric layers" by J. C. North, Journal of Applied Physics, Vol. 48, No. 6, June 1977, pages 2419-2423.

Silicon nitride has been used in connection with microelectronic fabrication for insulation and surface protection. It has not heretofore been identified for use in optical coating.

SUMMARY OF THE INVENTION

The present invention seeks to provide an etchable dielectric coating for substrates on which are formed semi-conductor devices to enable precise high density laser trimming and fusing functions.

There is thus provided in accordance with a preferred embodiment of the invention, a multilayer optical coating for semiconductor substrates characterized in that it is etchable by conventional techniques used for fabrication of integrated circuits and has high reflectivity.

Additionally in accordance with an embodiment of the invention, the optical coating is further characterized in that it has substantially zero phase shift characteristics for the reflected field, enhancing the fusing function.

In accordance with a preferred embodiment of the invention, the multilayer coating produces high reflectivity in the range of 0.7 or higher for a wavelength centered at 500 nanometers.

Further in accordance with a preferred embodiment of the present invention, the optical coating is further characterized in that it comprises silicon nitride, Si3 N4.

Additionally in accordance with a preferred embodiment of the present invention, the multilayer coating comprises alternating layers of silicon dioxide SiO2 and Si3 N4.

In accordance with a preferred embodiment of the invention, the multilayer coating comprises the following layers:

______________________________________Layer                Material______________________________________1.                   SiO22.                   Si3 N43.                   SiO24.                   Si3 N45.                   SiO26.                   Si3 N47.                   SiO28.                   Si3 N49.                   SiO2______________________________________

where the lowest numbered layer is closest to the substrate.

Additionally in accordance with an embodiment of the present invention the thicknesses of the respective layers are as follows:

______________________________________Layer       Material Thickness (microns)______________________________________1.          SiO2                0.084462.          Si3 N4                0.062503.          SiO2                0.084464.          Si3 N4                0.062505.          SiO2                0.084466.          Si3 N4                0.062507.          SiO2                0.084468.          Si3 N4                0.062509.          SiO2                0.25338______________________________________

where the lowest numbered layer is closest to the substrate.

Further in accordance with an embodiment of the invention, the multilayer coating may be applied at predetermined windows, distributed as desired on a substrate.

Additionally in accordance with an embodiment of the invention, there is provided a semiconductor device employing a multilayer coating according to the invention.

Further in accordance with an embodiment of the invention, there is provided a method for producing a semiconductor device employing a multilayer coating according to the invention.

BRIEF DESCRIPTION OF A PREFERRED EMBODIMENT

The present invention will be understood and appreciated more fully from the following detailed description taken in conjunction with the drawings in which:

FIG. 1 is a cross sectional illustration of a semiconductor device having the coating of the present invention formed thereon; and

FIG. 2 is a cross sectional illustration of a semiconductor device having the coating of the present invention formed at selected areas thereon.

DETAILED DESCRIPTION OF THE INVENTION

Reference is now made to FIG. 1 which illustrates a semiconductor device comprising a substrate 10, including semiconductor elements 12 formed in the substrate and a conductor layer 14 formed over the substrate and connecting various semiconductor elements 12 to each other.

The semiconductor device of FIG. 1 is arranged to be particularly suitable for laser fusing, wherein high intensity laser radiation, typically at a wavelength of 500 nanometers, is applied to the conductor layer 14 at specific locations thereof for fusing thereof, thereby selectably to define the desired conductive pattern.

A difficulty which has been identified in the prior art is that the laser energy applied to the semiconductor device may also damage or change the electrical characteristics of portions of the device such as semiconductor elements underlying the conductor which it is sought to fuse. Accordingly, the present invention provides a selectably reflective electrically insulative optical coating layer 16 which is disposed so as to underlie the regions of conductor which may be fused and thus exposed to intense laser radiation.

In accordance with a preferred embodiment of the present invention, the insulative optical coating 16 comprises the following coating:

______________________________________Layer       Material Thickness (microns)______________________________________1.          SiO2                0.084462.          Si3 N4                0.062503.          SiO2                0.084464.          Si3 N4                0.062505.          SiO2                0.084466.          Si3 N4                0.062507.          SiO2                0.084468.          Si3 N4                0.062509.          SiO2                0.25338______________________________________

where the lowest numbered layer is closest to the substrate.

It will be appreciated that greater or lesser numbers of layers and different thicknesses of the coating layers may alternatively be employed, it being appreciated that the above-described preferred composition is presently considered to be optimal.

It is a particular feature of the present invention, that the coating 16 described above is etchable by conventional chemical means employed in conventional integrated circuit fabrication. This feature of being etchable is a basic requirement of an insulation layer in order to permit the required connections with the underlying layes such as via feed-through contact holes. In the embodiment of FIG. 1, it is seen that the coating 16 of the present invention is distributed generally over the substrate. According to an alternative embodiment of the invention, illustrated in FIG. 2, the coating 16 is selectively distributed over the substrate so as to cover only selected regions which may contain particularly laser radiation sensitive circuit elements. In the embodiment of FIG. 2, first and second metal layers 18 and 20 are provided, where only layer 18 overlies coating 16 and layer 20 overlies a second coating layer 17. Layer 17 is etched away at the locations where layer 18 is sought to be fused.

It will be appreciated by persons skilled in the art that the present invention is not limited by what has been particularly shown and described hereinabove. Rather the scope of the present invention is defined only by the claims which follow:

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3740523 *Dec 30, 1971Jun 19, 1973Bell Telephone Labor IncEncoding of read only memory by laser vaporization
US4238839 *Apr 19, 1979Dec 9, 1980National Semiconductor CorporationLaser programmable read only memory
US4387503 *Aug 13, 1981Jun 14, 1983Mostek CorporationMethod for programming circuit elements in integrated circuits
US4692786 *Aug 21, 1986Sep 8, 1987Lindenfelser Timothy MSemi-conductor device with sandwich passivation coating
Non-Patent Citations
Reference
1J. C. North et al., "Laser Coding of Bipolar Read-Only Memories", IEEE Journal of Solid-State Circuits, vol. SC-11, No. 4 (Aug. 1976) pp. 500-505.
2 *J. C. North et al., Laser Coding of Bipolar Read Only Memories , IEEE Journal of Solid State Circuits, vol. SC 11, No. 4 (Aug. 1976) pp. 500 505.
3North, J. C., "Laser Vaporization of Metal Films-Effect of Optical Interference in Underlying Dielectric Layers", Journal of Applied Physics, vol. 48, No. 6 (Jun. 1977) pp. 2419-2423.
4 *North, J. C., Laser Vaporization of Metal Films Effect of Optical Interference in Underlying Dielectric Layers , Journal of Applied Physics, vol. 48, No. 6 (Jun. 1977) pp. 2419 2423.
5Smart, D. "Optimization of Semiconductor Layer Thickness for Repair of RAMs", application report 150, Teradyne Inc., Boston, MA.
6 *Smart, D. Optimization of Semiconductor Layer Thickness for Repair of RAMs , application report 150, Teradyne Inc., Boston, MA.
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US5073814 *Jul 2, 1990Dec 17, 1991General Electric CompanyMulti-sublayer dielectric layers
US5652459 *May 6, 1996Jul 29, 1997Vanguard International Semiconductor CorporationMoisture guard ring for integrated circuit applications
US5677564 *Aug 21, 1996Oct 14, 1997At&T Global Information Solutions CompanyShallow trench isolation in integrated circuits
US5981404 *May 16, 1997Nov 9, 1999United Microelectronics Corp.Multilayer ONO structure
US6100116 *Jun 18, 1998Aug 8, 2000Taiwan Semiconductor Manufacturing CompanyMethod to form a protected metal fuse
US6194912Mar 11, 1999Feb 27, 2001Easic CorporationIntegrated circuit device
US6236229May 13, 1999May 22, 2001Easic CorporationIntegrated circuits which employ look up tables to provide highly efficient logic cells and logic functionalities
US6245634Oct 28, 1999Jun 12, 2001Easic CorporationMethod for design and manufacture of semiconductors
US6331733Aug 10, 1999Dec 18, 2001Easic CorporationSemiconductor device
US6331789Jan 10, 2001Dec 18, 2001Easic CorporationSemiconductor device
US6476493Aug 29, 2001Nov 5, 2002Easic CorpSemiconductor device
US6686253Apr 11, 2001Feb 3, 2004Easic CorporationMethod for design and manufacture of semiconductors
US6972268Mar 27, 2002Dec 6, 2005Gsi Lumonics CorporationMethods and systems for processing a device, methods and systems for modeling same and the device
US7027155Mar 27, 2002Apr 11, 2006Gsi Lumonics CorporationMethods and systems for precisely relatively positioning a waist of a pulsed laser beam and method and system for controlling energy delivered to a target structure
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US7394476May 2, 2006Jul 1, 2008Gsi Group CorporationMethods and systems for thermal-based laser processing a multi-material device
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US7723642Oct 10, 2003May 25, 2010Gsi Group CorporationLaser-based system for memory link processing with picosecond lasers
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US7871903Dec 22, 2009Jan 18, 2011Gsi Group CorporationMethod and system for high-speed, precise micromachining an array of devices
US7955905Dec 20, 2006Jun 7, 2011Gsi Group CorporationMethods and systems for thermal-based laser processing a multi-material device
US7955906Jul 1, 2008Jun 7, 2011Gsi Group CorporationMethods and systems for thermal-based laser processing a multi-material device
US8193468Oct 11, 2005Jun 5, 2012Gsi Group CorporationMethods and systems for precisely relatively positioning a waist of a pulsed laser beam and method and system for controlling energy delivered to a target structure
US8217304Mar 27, 2002Jul 10, 2012Gsi Group CorporationMethods and systems for thermal-based laser processing a multi-material device
US8253066Nov 19, 2010Aug 28, 2012Gsi Group CorporationLaser-based method and system for removing one or more target link structures
US8338746Feb 12, 2010Dec 25, 2012Electro Scientific Industries, Inc.Method for processing a memory link with a set of at least two laser pulses
US8809734Jul 3, 2012Aug 19, 2014Electron Scientific Industries, Inc.Methods and systems for thermal-based laser processing a multi-material device
EP1673809A2 *Oct 14, 2004Jun 28, 2006International Business Machines CorporationWiring protection element for laser deleted tungsten fuse
Classifications
U.S. Classification359/589, 257/E23.129, 257/E27.066, 257/E23.15
International ClassificationH01L27/092, H01L23/525, H01L23/31
Cooperative ClassificationH01L2924/0002, H01L23/5258, H01L27/0927, H01L23/3157
European ClassificationH01L23/525F4, H01L23/31P, H01L27/092P
Legal Events
DateCodeEventDescription
Dec 27, 2002ASAssignment
Owner name: CHIP EXPRESS CORPORATION, CALIFORNIA
Free format text: REASSIGNMENT AND RELEASE OF SECURITY INTEREST;ASSIGNOR:COMERICA BANK-CALIFORNIA;REEL/FRAME:013616/0915
Effective date: 20021220
Owner name: CHIP EXPRESS CORPORATION 2323 OWEN STREETSANTA CLA
Sep 22, 1995ASAssignment
Owner name: COMERICA BANK - CALIFORNIA, CALIFORNIA
Free format text: SECURITY AGREEMENT;ASSIGNOR:CHIP-EXPRESS CORPORATION;REEL/FRAME:007656/0095
Effective date: 19950803
Jul 20, 1993FPExpired due to failure to pay maintenance fee
Effective date: 19930502
May 2, 1993LAPSLapse for failure to pay maintenance fees
Dec 1, 1992REMIMaintenance fee reminder mailed