|Publication number||US4913789 A|
|Application number||US 07/182,719|
|Publication date||Apr 3, 1990|
|Filing date||Apr 18, 1988|
|Priority date||Apr 18, 1988|
|Publication number||07182719, 182719, US 4913789 A, US 4913789A, US-A-4913789, US4913789 A, US4913789A|
|Inventors||David K. Aung|
|Original Assignee||Aung David K|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (28), Referenced by (15), Classifications (12), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The invention is a process for manufacturing circuit boards, three dimensional molded wiring boards, flexible circuit films, electrical push buttons, electrochromic devices and the like, which comprises the vacuum sputter deposition of a diagram such as a circuit diagram on a substrate. The invention eliminates a number of steps which were previously required in the manufacture of the aforementioned products, thereby enabling such manufacture to be effected at a significantly lower cost as compared to conventional methods. The invention also enables the plating of substrates made of materials heretofore thought to be not platable.
Prior processes for the manufacture of circuit boards and the like typically include the sputter deposition of a thin layer of conductive metal on the substrate followed by the application of a photoresist laminate to define a circuit pattern which is then completed by depositing a conductive layer of sufficient thickness in an electroplating step. Prior processes utilizing electroplating of copper, for example, require a large number of steps to prepare the substrate for electroplating and then to finish the electroplated product. Metal deposition by electroplating is relatively slow and involves the use of chemicals which require further processing for safe disposal.
The present invention employs the use of a metal mask defining a circuit or other pattern, which mask is attached to a cleaned and drilled substrate, and the masked substrate is subjected to vacuum etching and sputtering steps to deposit a layer of conductive metal on the substrate. The metal mask is preferably stainless steel or copper and is made using known techniques to provide a circuit pattern having acceptably fine lines. Accelerated metal sputtering of the masked substrate is achieved using a vacuum sputter chamber equipped with a plurality of spinning magnetrons which provide an even sputter coat for the substrate as well as an acceptably high rate of deposition. The sputtering step generally does not require more than about 10 minutes to achieve the desired thickness of conductive metal on the substrate.
The process of the present invention enables the production of circuit boards, three dimensional molded wiring boards, flexible circuit films, electrical push buttons electrochromic devices and the like, which in the context of the present description and claims shall be referred to as circuit devices. Examples of electrical push buttons include push buttons on an automobile instrument panel for activating electrically driven devices. Examples of electrochromic devices include electrochromic or photochromic mirrors which are electrically activated. The process utilizes cheaper materials and involves fewer steps which result in a significantly cheaper product being produced in much less time than is the case with prior processes. The invention does not use toxic chemicals requiring expensive processing for disposal. The physical deposition method of the invention permits plating of substrates which are not suitable for use in electroplating processes such as polyphenyl sulfide (PPS), glass and untreated plastics (e.g. nylon). The sputter coating process of the present invention provides a generally superior quality coating than is obtained using prior art electroplating techniques.
Accordingly, the present invention provides a process for sputter coating a diagram on a substrate, comprising applying a metal mask to a suitably prepared substrate, the mask having voids defining a diagram. Subjecting the masked substrate to a vacuum sputter etching step followed by subjecting the etched masked substrate to a high vacuum sputter coating step, the sputter coating providing a layer of conductive metal on the substrate having a thickness of at least 10 μm. The sputter coating step is conducted at a vacuum of at least 10-5 Torr utilizing a plurality of magnetic array centered spinning magnetrons. The metal mask is removed upon completion of sputtering, and the product is finished according to known finishing steps.
FIG. 1 is a flow chart comparing a typical prior art process to that of the present invention.
A substrate to be sputter coated in accordance with the invention is subjected to several preliminary steps, as shown in FIG. 1. Initially, the substrate is cut to the desired size and shape or, in the case of a three dimensional wiring board, is molded into the desired size and shape. In prior processes the substrate is then laminated with copper preparatory to the application of a photoresist layer. Since the present process does not require the application of a photoresist to the substrate, the cut substrate is immediately subjected to the required hole punching and drilling operations, followed by cleaning, such as ultrasonic vapour degreasing. In the case of a three dimensional substrate, the molding operation provides the required holes so that no additional drilling is needed. The three dimensional substrate can be utilized directly in the surface preparation step (see FIG. 1).
The drilled and cleaned substrate then proceeds to the surface preparation step where it is soaked in a cleaning bath, rinsed with hot water, cleaned again, preferably with an alcohol such as isopropyl alcohol, dried under a stream of hot, filtered air, and finally baked in an oven until thoroughly dry. The first three steps of the process shown in FIG. 1 are conventional and will be well known to the skilled person. These three preparatory steps involve 8 stages and require 20-45 minutes to complete.
Comparing the three initial steps of the invention to a typical prior art process shown in FIG. 1, it will be appreciated that five steps must be completed on the substrate preparatory to the plating steps. These initial five steps of the prior art process shown in FIG. 1 require 20 stages and significantly more than 45 minutes to complete.
The present invention departs markedly from prior art processes by using a metal mask to form a circuit diagram on the substrate by sputter coating. The metal mask is preferably made of copper or stainless steel which is milled to a thickness of 3-5 mil (0.003-0.005 inches) and etched to provide the desired circuit or other pattern using a laser or a chemical milling process, both of which are well known in the art. For those applications calling for particularly fine circuit lines, laser etching of the metal mask substrate is preferred. Using presently available laser techniques, pattern lines of 5-10 mil thickness within a tolerance of ±2 mil are capable of being etched in the metal masks used in the invention. The etched metal mask is mechanically attached to the prepared substrate.
The masked substrate is placed in a vacuum chamber where it is baked for up to 10 min. at preferably 200°-300° C. and then vacuum sputter etched to clean and prepare the exposed substrate portions for sputter coating. This vacuum etching step is also a standard procedure preferably conducted under 10-2 to 10-3 Torr vacuum using argon as the etching agent and using a DC or an RF biased operation. The etching step requires 1-10 min. to complete depending on the substrate.
The etched masked substrate is transferred to a vacuum sputtering chamber equipped with a plurality of magnetic array centered magnetrons having surrounding cathode targets of the desired metal for coating on the substrate. Means are provided for spinning the magnetrons preferably at a rate of from 60-120 rpm. The magnetic array and the cathode may be spun independently. The magnetrons used may be of the cylindrical type, the planar type or a mixture of the two. A sufficient number of magnetrons should be positioned within the sputtering chamber to provide a uniform and rapid deposition of metal on the masked substrate. An acceptable sputtering rate for copper according to the invention is 10,000 A-18,000 A per min., and for aluminum 6000 A-8000 A per min. Nickel and chromium may also be sputtered in accordance with the inventive process at a preferred rate of 4000 A-6000 A per min. The magnetrons may be either DC or RF powered and are cooled by water or other known means. The vacuum in the sputter chamber is at least 10-5 Torr and preferably 10-6 -10-7 Torr. Sputtering is effected by providing an inert gas such as argon to the sputter chamber at a pressure of about 10-3 Torr.
The use of an array of spinning magnetrons in the sputter chamber provides an even coating of metal and good deposition of metal in the holes of the substrate. The metal deposition rate is also increased by using spinning magnetrons as compared to stationary magnetrons. At a typical deposition rate of 1 μm/min, a satisfactory thickness of metal can be deposited on the substrate in about 12 minutes. As noted above, copper sputtering may under optimal conditions proceed at about 2 μm/min cutting the sputtering time to 5-7 min. A circuit pattern thickness of about 12 μm is about half that routinely achieved using electroplating techniques, but it has been found that for most applications of products made by the present process, a 10-12 μm thickness is sufficient. Typically, a conventional electroplating step for the deposition of 25 μm of metal on a substrate takes on the order of 1 hour.
Upon completion of the sputter coating, the substrate is removed from the sputter chamber and the metal mask is removed. The circuit device is completed by standard finishing stages such as applying a solder mask coating, baking and inspecting the product for defects. The final five steps of the inventive process shown in FIG. 1 comprise 9 stages so that the overall process shown in the flow diagram, FIG. 1, requires about 17 different stages or operations which may be completed in the order of about 1 hr. as compared to the prior art process of FIG. 1 which requires 6-8 hrs. and approximately 64 stages over the 11 steps shown.
From the foregoing it will be appreciated that the process of the invention provides a simple means for manufacturing a circuit device which utilizes inexpensive materials and requires much less time than do prior art processes. The invention does not employ electroplating and produces no toxic wastes or by-products requiring expensive treatment for disposal. While a preferred embodiment of the invention has been described, it should be understood that the invention has general application and can be varied to meet particular requirements of a given circuit device. Accordingly, the invention is more particularly defined in the following claims.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US3676317 *||Oct 23, 1970||Jul 11, 1972||Stromberg Datagraphix Inc||Sputter etching process|
|US3748246 *||Oct 8, 1971||Jul 24, 1973||Bell Telephone Labor Inc||Dielectric circuit forming process|
|US4024041 *||Dec 16, 1975||May 17, 1977||Hitachi, Ltd.||Method of forming deposition films for use in multi-layer metallization|
|US4113578 *||Jun 27, 1977||Sep 12, 1978||Honeywell Inc.||Microcircuit device metallization|
|US4183780 *||Aug 21, 1978||Jan 15, 1980||International Business Machines Corporation||Photon enhanced reactive ion etching|
|US4328081 *||Nov 4, 1980||May 4, 1982||Micro-Plate, Inc.||Plasma desmearing apparatus and method|
|US4351697 *||Jan 4, 1982||Sep 28, 1982||Western Electric Company, Inc.||Printed wiring boards|
|US4354911 *||Aug 7, 1981||Oct 19, 1982||Western Electric Company Inc.||Method of selectively depositing a metal on a surface by means of sputtering|
|US4389268 *||Jul 23, 1981||Jun 21, 1983||Tokyo Shibaura Denki Kabushiki Kaisha||Production of laminate for receiving chemical plating|
|US4399014 *||Aug 11, 1981||Aug 16, 1983||Engle Frank W||Plasma reactor and method therefor|
|US4411733 *||Jun 18, 1982||Oct 25, 1983||Bell Telephone Laboratories, Incorporated||SPER Device for material working|
|US4424095 *||May 21, 1982||Jan 3, 1984||Kollmorgen Technologies Corporation||Radiation stress relieving of polymer articles|
|US4437961 *||Aug 19, 1982||Mar 20, 1984||The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration||Method for sequentially processing a multi-level interconnect circuit in a vacuum chamber|
|US4444848 *||Jan 4, 1982||Apr 24, 1984||Western Electric Co., Inc.||Adherent metal coatings on rubber-modified epoxy resin surfaces|
|US4460618 *||Oct 26, 1981||Jul 17, 1984||Itt Industries, Inc.||Aluminum deposition on semiconductor bodies|
|US4473437 *||Nov 16, 1983||Sep 25, 1984||Tokyo Shibaura Denki Kabushiki Kaisha||Dry etching method for organic material layers|
|US4474659 *||May 28, 1982||Oct 2, 1984||Fazal Fazlin||Plated-through-hole method|
|US4496420 *||Apr 6, 1984||Jan 29, 1985||Bmc Industries, Inc.||Process for plasma desmear etching of printed circuit boards and apparatus used therein|
|US4507851 *||Apr 30, 1982||Apr 2, 1985||Texas Instruments Incorporated||Process for forming an electrical interconnection system on a semiconductor|
|US4529474 *||Jan 30, 1984||Jul 16, 1985||Canon Kabushiki Kaisha||Method of cleaning apparatus for forming deposited film|
|US4530750 *||Sep 10, 1984||Jul 23, 1985||A. S. Laboratories, Inc.||Apparatus for coating optical fibers|
|US4536271 *||Dec 29, 1983||Aug 20, 1985||Mobil Oil Corporation||Method of plasma treating a polymer film to change its properties|
|US4576692 *||Jun 11, 1984||Mar 18, 1986||Toyota Jidosha Kabushiki Kaisha||Method for controlling the operation of a microwave-excited oxygen plasma surface treatment apparatus|
|US4597828 *||Mar 25, 1985||Jul 1, 1986||Firan Corporation||Method of manufacturing printed circuit boards|
|US4622106 *||May 22, 1984||Nov 11, 1986||Marui Industry Co., Ltd.||Methods for producing printed circuits|
|US4642163 *||Oct 31, 1983||Feb 10, 1987||International Business Machines Corporation||Method of making adhesive metal layers on substrates of synthetic material and device produced thereby|
|US4654115 *||Apr 8, 1986||Mar 31, 1987||International Business Machines Corporation||Process for removing contaminant|
|US4705592 *||Dec 18, 1986||Nov 10, 1987||International Business Machines Corporation||Process for producing printed circuits|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US5360941 *||Oct 28, 1991||Nov 1, 1994||Cubic Automatic Revenue Collection Group||Magnetically permeable electrostatic shield|
|US5807467 *||Jan 22, 1996||Sep 15, 1998||Micron Technology, Inc.||In situ preclean in a PVD chamber with a biased substrate configuration|
|US5830332 *||Jan 9, 1997||Nov 3, 1998||International Business Machines Corporation||Sputter deposition of hydrogenated amorphous carbon film and applications thereof|
|US5922179 *||Oct 20, 1997||Jul 13, 1999||Gatan, Inc.||Apparatus for etching and coating sample specimens for microscopic analysis|
|US6051121 *||Sep 8, 1998||Apr 18, 2000||Micron Technology Inc||Deposition chamber with a biased substrate configuration|
|US6267852||Mar 28, 2000||Jul 31, 2001||Micron Technology, Inc.||Method of forming a sputtering apparatus|
|US7759146||May 4, 2007||Jul 20, 2010||SemiLEDs Optoelectronics Co., Ltd.||Method of making high efficiency UV VLED on metal substrate|
|US9502276||Apr 26, 2013||Nov 22, 2016||Intevac, Inc.||System architecture for vacuum processing|
|US9525099 *||Apr 19, 2013||Dec 20, 2016||Intevac, Inc.||Dual-mask arrangement for solar cell fabrication|
|US9543114||Aug 5, 2015||Jan 10, 2017||Intevac, Inc.||Implant masking and alignment system with rollers|
|US20080274572 *||May 4, 2007||Nov 6, 2008||Chuong Anh Tran||Method of making high efficiency uv vled on metal substrate|
|US20130168231 *||Dec 31, 2011||Jul 4, 2013||Intermolecular Inc.||Method For Sputter Deposition And RF Plasma Sputter Etch Combinatorial Processing|
|US20130276978 *||Apr 19, 2013||Oct 24, 2013||Intevac, Inc.||Dual-mask arrangement for solar cell fabrication|
|WO1998028459A1 *||Dec 10, 1997||Jul 2, 1998||Gatan, Inc.||Precision etching and coating system|
|WO2008137613A1 *||May 2, 2008||Nov 13, 2008||Semi-Photonics Co., Ltd.||Method of making high efficiency uv vled on metal substrate|
|U.S. Classification||204/192.3, 204/192.15, 204/192.32|
|International Classification||C23C14/04, H05K3/14, C23C14/35|
|Cooperative Classification||C23C14/352, C23C14/042, H05K3/143|
|European Classification||C23C14/04B, C23C14/35D, H05K3/14B|
|Nov 2, 1993||REMI||Maintenance fee reminder mailed|
|Apr 3, 1994||LAPS||Lapse for failure to pay maintenance fees|
|Jun 14, 1994||FP||Expired due to failure to pay maintenance fee|
Effective date: 19900403