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Publication numberUS5099388 A
Publication typeGrant
Application numberUS 07/538,334
Publication dateMar 24, 1992
Filing dateJun 15, 1990
Priority dateJun 15, 1989
Fee statusPaid
Publication number07538334, 538334, US 5099388 A, US 5099388A, US-A-5099388, US5099388 A, US5099388A
InventorsMasahiro Ogawa, Kozo Yamasaki, Mitsuru Hirano, Michael A. Schmitt, Bidyut K. Bhattacharyya
Original AssigneeNgk Spark Plug Co., Ltd., Ngk Spark Plugs (U.S.A.), Inc., Intel Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Alumina multilayer wiring substrate provided with high dielectric material layer
US 5099388 A
Abstract
An alumina multilayer wiring substrate having a high dielectric, low inductance capacitor in the substrate on which a VLSI is to be mounted to effectively eliminate electrical noise(s) which may hinder the operation of the VLSI at high speed (frequency) is provided.
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Claims(12)
What is claimed:
1. A wiring substrate comprising:
a dielectric material layer having a first dielectric material layer surface and a second dielectric material layer surface;
a first metallized layer on said first dielectric material layer surface;
a second metallized layer on said second dielectric material layer surface;
a first alumina layer having an inward surface contacting said first metallized layer and an outward surface;
a second alumina layer having an inward surface contacting said second metallized layer and an outward surface;
a first conductor electrically connecting to and extending from said first metallized layer through said first alumina layer; and
a second conductor electrically extending from said second metallized layer through said dielectric material layer, through but not electrically connecting said first metallized layer, and through said first alumina layer.
2. A wiring substrate according to claim 1, further comprising:
a second electrode layer electrically extending to said second conductor at said outward surface of said first alumina layer; and
a first electrode layer extending to said first conductor at said outward surface of said first alumina layer.
3. A wiring substrate according to claim 1, wherein said dielectric material layer comprises a dielectric material.
4. A wiring substrate according to claim 3, wherein said dielectric material comprises alumina and from 5 to 50 weight percent of said dielectric material of an auxiliary material.
5. A wiring substrate according to claim 4, wherein said auxiliary material comprises molybdenum.
6. A wiring substrate according to claim 4, wherein said auxiliary material comprises molybdenum oxide.
7. A wiring substrate according to claim 4, wherein said auxiliary material comprises tungsten.
8. A wiring substrate according to claim 4, wherein said auxiliary material comprises tungsten oxide.
9. A wiring substrate according to claim 4, wherein said auxiliary material comprises any combination of molybdenum, molybdenum oxide, tungsten, or tungsten oxide.
10. A wiring substrate according to claim 1, wherein said first metallized layer and said second metallized layer comprise primarily a high melting point metal.
11. A wiring substrate according to claim 10, wherein said high melting point metal comprises molybdenum.
12. A wiring substrate according to claim 10 wherein said high melting point metal comprises tungsten.
Description
BACKGROUND OF THE INVENTION

1. Field Of The Invention

The present inventions finds its utility in providing high dielectric, low inductance capacitance in the vicinity of a VLSI chip.

2. Prior Art

One current technological trend is to develop an integrated circuit having an operating speed (frequency) greater than that of its predecessors. Electronic noise can hinder the operation of the circuit. The noise interference is especially pronounced at the higher frequencies. To correct this problem, conventionally, the number of power lines and ground lines has been increased in proportion to the number of input/output (I/O) lines in an integrated circuit (IC) package. Following the conventional approach, as each successive VLSI is designed, the number of power lines and ground lines is greater than that of the previous design. It is predicted that the number of power lines and ground lines will eventually equal the number of I/O lines. As such, future IC packages will be physically larger and more structurally complex than their present counterparts.

A solution to this problem, as well as to many other integrated circuit problems, is to mount a capacitor chip on the IC package. Providing the IC package with a capacitive chip reduces the number of power lines and ground lines required. However, when a capacitor chip is added, the inductance of a power line-ground line loop is increased, possibly to five times the value of the inductance present when no capacitor chip is used. As a result, it is expected that five or more chip capacitors must be mounted onto the IC package to reduce that inductance. Since it is expected that the number of power line-ground line loops can only increase given the current VLSI development trend, it is predicted that twenty or more capacitor chips would be required for an IC package given 100 power line-ground line loops. As with the conventional method of simply adding power line-ground line loops, adding chip capacitors complicates the IC package and reduces reliability and yield.

A solution to the foregoing problems is to provide a capacitor function within a multilayer wiring substrate. However, to provide the capacitor function in this manner, it has been necessary to use sheets or paste having the same composition as the substrate. It has also been necessary to laminate the conductors and the sheets or paste in multiple layers to obtain a predetermined capacitance.

Japanese Unexamined Patent Publication 59-108397 describes an alumina wiring substrate known to the art. The alumina wire substrate contains a capacitor having a collective body of tungsten particles coated with an alumina layer. This collective body is formed on an alumina wiring substrate body using alumina and tungsten as a wiring material.

The present invention addresses a structure which further eliminates noise that may hinder the operation of the VLSI at high frequencies (speeds). It is possible to provide an alumina multilayer substrate in which a low inductance capacitor is embedded by placing a very thin ceramic sheet of high dielectric material in the vicinity of a position where the VLSI chip is to be mounted.

To obtain a large capacitance through the described multilayer lamination method, the sheet or paste layer must be made thinner or the number of laminations of the sheet or paste layer must be increased. In this process, however, there have been problems reducing the sheet or paste layer thickness below 10 μm. Moreover, increasing the number of laminations and steps increases cost. Reducing the number of laminations reduces reliability, etc.

Japanese Unexamined Patent Publication 59-108397 discloses a method requiring tungsten particles to be subjected to alumina sputtering before being formed into a paste. This process is costly. Moreover, since each of the tungsten particles is large, about 1.8 μm, there is a lower limit to which the thickness of the capacitor layer may be reduced. The sputtering process is not completely effective, and the tungsten particles may not be coated sufficiently with alumina. This may cause shorting between the counter electrodes. The present invention solves the foregoing problems.

SUMMARY OF THE INVENTION

The present invention uses a high dielectric material as a composite for manufacturing a large number of thin ceramic sheets laminated one on the other in the vicinity of a portion of an alumina multilayer wiring substrate where a VLSI chip is to be mounted. The present invention incorporate a low inductance capacitor in the alumina multilayer wiring substrate to effectively eliminate noises of the VLSI. The high dielectric material used is a mixture of alumina, a basic material, and at least one of either molybdenum, molybdenum oxide, tungsten, or tungsten oxide. The molybdenum and other elements or compounds added to the alumina are generally referred to as "auxiliaries." The resultant alumina-auxiliary material is combined at a 5-50 weight percent (w/o) ratio where the weight percent represents the amount of the auxiliaries where the total quantity of alumina and auxiliaries is assumed to be 100%.

The alumina wiring substrates can be of various sizes and shapes depending upon the particular application. The alumina wiring substrate may be composed of any combination of materials as long as alumina is the main component. Various auxiliaries may be included depending upon the intended application.

The high dielectric material may contain a mixture with any one or combination of the aforementioned auxiliaries. Molybdenum or tungsten are most commonly used. Molybdenum is preferred for its ease in sintering. Tungsten is preferred because of its stability at high temperatures. If the weight percent of the auxiliaries is less than 5 w/o, the effect of adding the auxiliaries is negligible because the dielectric constant cannot be made sufficiently large. On the other hand, if the weight percent of the auxiliaries exceeds 50 w/o, the conductivity can be increased to a level where shorting occurs. If the ratio is kept between 5-50 w/o, one can obtain excellent results without exhibiting any of the foregoing defects.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features and advantages of the present invention will become apparent from the following detailed description thereof, as well as the practice of the invention, the description between taken together with the drawing, in which:

FIG. 1 is an illustration of the capacitor layer of the present invention, showing the theoretical crystalline structure of the dielectric material.

FIG. 2 is an illustration of the alumina multilayer wiring substrate showing the positioning of the dielectric material.

FIG. 3 is a graphical representation of the relationship between the weight percent of molybdenum oxide in the dielectric material and the relative dielectric constant of the resultant composition.

FIG. 4 is a graphical representation of the relationship between the weight percent concentration of molybdenum and the relative dielectric constant of the resultant composition.

FIG. 5 is a graphical representation of the relationship between the weight percent of tungsten oxide and the relative dielectric constant of the resultant composition.

FIG. 6 shows the graphical relationship between the weight percent of tungsten and the dielectric constant of the resultant material.

DESCRIPTION OF THE PREFERRED EMBODIMENT

The present invention will first be described generally. Specific examples follow the general description.

The present invention consists of an upper substrate 1a and a lower substrate 1b with a high dielectric material 2 disposed therebetween. On either surface of the high dielectric material are metallized layers, an upper metallized layer 3a, and a lower metallized layer 3b. The upper metallized layer 3a is sandwiched between the high dielectric material layer 2 and the upper alumina substrate 1a. The lower metallized layer 3b is sandwiched between the high dielectric material layer 2 and the lower alumina substrate 1b. Conductors, 4a and 4b, are connected respectively to the upper metallized layer 3a and the lower metallized layer 3b. The conductors 4a and 4b extend from the metallized layers 3a and 3b respectively to the exterior surface of the lower alumina substrate 1b. Electrode layers 5a and 5b are attached respectively to each of conductors 4a and 4b at the exterior surface of the lower alumina substrate 1b to provide exterior contact points. The high dielectric material layer 2, the upper metallized layer 3a, and the lower metallized layer 3b are collectively called the capacitor layers C.

To form the alumina multilayer wiring substrate of the present invention, the component sheets, the upper alumina (green) layer (sheet) 1a (about 0.5-0.6 mm thick), the lower alumina (green) layer (sheet) 1b (about 0.5-0.6 mm thick), and a high dielectric material (green) layer (sheet) 2 (about 40-50 μm thick) need to be fabricated. The high dielectric material layer sheet 2 can be prepared by sufficiently dispersing molybdenum oxide (MoO3) having a particle size of 10 μm or less (preferably 0.5-3.0 μm) within the alumina. A binder material is then added. The resultant mixture is then formed into a sheet and dried. Paste containing as its principle component a high melting point metal such as tungsten or molybdenum is applied or printed into the upper and lower surfaces of the high dielectric layer sheet 2 to form metallized layers 3a and 3b.

After applying layers 3a and 3b, holes are punched at predetermined positions into the alumina substrate layer (sheet) 1b the upper metallized layer 3a, and the high dielectric material 2. The upper and lower alumina layers 1a and 1b are then laminated onto the capacitor layers, C. Conductive paste is then poured into the holes to form conductors 4a and 4b. Conductive layers 5a and 5b are formed on the exterior of the lower alumina layer 1b. The conductive layers 5a and 5b are electrically connected to the conductors 4a and 4b. Alternatively, the conductor layers 5a and 5b may be formed prior to lamination of the alumina layers la and lb to the metallized layers 3a and 3b. The entire structure is then fired (co-fired) in an atmosphere of mixed hydrogen and nitrogen gas at 1600 C. for about 3 hours.

The hydrogen atmosphere allows the molybdenum oxide to reduce and become molybdenum metal during the firing process. The same is true for the tungsten oxide. The advantage of using the oxides of these metals is that they do reduce to their metallic form during the firing process. Accordingly, any alternative compounds may be substituted for these oxides as long as the compounds reduce to molybdenum or tungsten metal after firing. The crystal structure of the high dielectric material layer 2 is represented in FIG. 1; 21 represents the alumina while 22 designates the molybdenum oxide.

As the concentration of the molybdenum oxide is increased, so is the dielectric constant. However, if the weight percent concentration of the auxiliary exceeds 50 w/o, electrical shorting may occur. If the weight percent concentration of the auxiliary falls below 5 w/o, the effect of the addition is not large enough to produce a sufficiently large dielectric constant. As such, the preferred range of addition of auxiliary to alumina lies between 5 and 50 w/o. It should be noted that the dielectric loss does not so increase, even if the molybdenum oxide is added to constitute 40 w/o. It is possible to create a high dielectric material layer 2 not susceptible to electrical shorting. If the molybdenum particle size is small (0.5-3.0 μm), the reliability of the present invention increases because electrical shorting is prevented.

The present invention is not limited solely to the embodiment or process described above. The sheet method need not be used, but the capacitor layer could be formed by applying a paste to a metallized layer or an upper aluminum layer (sheet) 1a. In this case, a thin layer (of thickness≦10 μm) can easily be formed. The present invention is not limited to the case where the capacitor layer is fixed between alumina layers 1a and 1b. The number of laminations of wiring substrates is not limited to a fixed value.

EXAMPLE 1

As a first example of the present invention, the substrate of the present invention was produced in the manner as described above. Molybdenum oxide having a particle size of 10 micrometers or less was added to alumina and sufficiently dispersed within the alumina. A binder was added to the mixture which was then formed into a sheet and allowed to dry. Subsequently, a paste containing primarily a high melting point material such as tungsten or molybdenum was printed at predetermined positions onto the upper and lower surfaces of the dried sheet. These printed regions become the metallized layers 3a and 3b after firing.

Through holes were drilled (punched) through the printed metallized layers at predetermined positions. The upper and lower alumina layers, 1a and 1b, were then laminated onto the capacitor layer C so that the capacitor layer C was interposed between the alumina substrate layers 1a and 1b. Conductive paste was then poured into the through holes to form the respective conductors 4a and 4b. Surface conductive layers 5a and 5b were then added to provide contact points to the capacitor layer C. The electrode layers 5a and 5b may be formed after the conductive paste is poured into the holes or they may be added to the lower layer 1b prior to its lamination onto the lower metallized layer 3b.

Once assembled, the entire structure was co-fired at approximately 1600 C. for approximately three hours in an atmosphere of hydrogen and nitrogen. Once produced, the dielectric constants of the present invention were measured. The weight percent composition was varied and the graph of FIG. 3 was generated from the resultant data.

The molybdenum oxide reduced in the hydrogen atmosphere during firing to leave behind an electrically conductive molybdenum layer. The same is true for tungsten. Any starting material may be alternately used as long as the composition leaves a metal molybdenum or metal tungsten in the appropriate positions after firing.

A capacitor layer constituted by a high dielectric material layer 2 of alumina 21 and molybdenum oxide 22 and metallized layers 3a and 3b as shown in FIG. 1 was formed, the high dielectric material layer 2 having the same component and being fired under the same condition as the foregoing case. As a result of measurement of the foregoing performance, the same values as the foregoing case were obtained. Therefore, only the above capacitor layers were formed after this, and investigation was made as to the effect of various rates of addition of molybdenum oxide (0, 20, 30, 40, and 50 w/o). From the results of the measurements, it was found that it is preferable that the dielectric constant becomes large as the quantity of molybdenum oxide added increases.

If the molybdenum oxide is added by 50 w/o, however, it is not preferable because electric shorting may occur. The dielectric loss, on the other hand, does not so increase even if the molybdenum oxide is added by 40 w/o.

As described above, in the wiring substrate according to the present invention, the high dielectric material layer excellent in dielectric characteristics could be easily formed without causing any shorting. When the particle diameter of used molybdenum was particularly small, i.e., about 0.5-3.0 μm, the reliability was higher because the composition of the present invention is very effective against generation of shorting.

The present invention is not limited to such a wiring substrate as shown in the foregoing specific example, and various modifications can be made to the specific example in accordance with the purposes and usages within the scope of the present invention. That is, the method of forming the foregoing capacitor layer is not limited to the above-mentioned sheet method, but the capacitor layer may be formed by applying or printing predetermined paste onto the metallized layer prepared in the form of a lower alumina green sheet. In this case, a thin layer having a thickness of 10 μm or less can be easily formed. Further, the configuration of the wiring substrate according to the present invention is not limited to such configuration wherein a capacitor layer is interposed between alumina substrates, and the number of lamination layers of wiring substrates is not limited to a fixed value.

EXAMPLE 2

Next, the dielectric loss of a substance having a high dielectric material layer 2 composed of alumina and molybdenum was created and its characteristics were measured. The results are presented in FIG. 4.

EXAMPLE 3

The experiment was repeated using a high dielectric material layer 2 composed of alumina and tungsten oxide. The result of the measurements are shown in FIG. 5.

EXAMPLE 4

The experiment was again repeated using a high dielectric material 2 composed of alumina and tungsten. The results of the measurements are shown in FIG. 6.

Effectively, the high dielectric material layer 2 of the present invention is formed by adding alumina as a basic material with an auxiliary such as molybdenum and firing the mixture. The result is a highly reliable capacitor layer which can be easily transformed into a wiring substrate of high quality and high reliability.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US4816323 *Sep 8, 1987Mar 28, 1989Nec CorporationMultilayer wiring substrate
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US5396397 *Sep 24, 1992Mar 7, 1995Hughes Aircraft CompanyField control and stability enhancement in multi-layer, 3-dimensional structures
US5521332 *Jun 7, 1995May 28, 1996Kyocera CorporationHigh dielectric layer-containing alumina-based wiring substrate and package for semiconductor device
US5545598 *Feb 14, 1994Aug 13, 1996Ngk Spark Plug Co., Ltd.High heat conductive body and wiring base substrate fitted with the same
US5590017 *Apr 3, 1995Dec 31, 1996Aluminum Company Of AmericaAlumina multilayer wiring substrate provided with high dielectric material layer
US5601672 *Nov 1, 1994Feb 11, 1997International Business Machines CorporationMethod for making ceramic substrates from thin and thick ceramic greensheets
US5656113 *Jun 19, 1995Aug 12, 1997Ngk Spark Plug Co., Ltd.Method of manufacturing a multilayered wiring substrate of aluminum nitride having a high dielectric layer
US5868884 *Sep 13, 1996Feb 9, 1999Sumitomo Metal Industries, Ltd.Method for producing ceramic dielectrics
US5886406 *Oct 7, 1997Mar 23, 1999Intel CorporationPower-ground plane for a C4 flip-chip substrate
US5903429 *Aug 11, 1997May 11, 1999Shinko Electric Industries Co., Ltd.Capacitor, method for producing same and method for producing dielectric body
US5916396 *Jul 11, 1997Jun 29, 1999Candescent Technologies CorporationFormation of spacers suitable for use in flat panel displays
US5948193 *Jun 30, 1997Sep 7, 1999International Business Machines CorporationProcess for fabricating a multilayer ceramic substrate from thin greensheet
US5985067 *Oct 31, 1997Nov 16, 1999Candescent Technologies CorporationFormation of spacers suitable for use in flat panel displays
US6157123 *Feb 26, 1999Dec 5, 2000Candescent Technologies CorporationFlat panel display typically having transition metal oxide in ceramic core or/and resistive skin of spacer
US6178082Feb 26, 1998Jan 23, 2001International Business Machines CorporationHigh temperature, conductive thin film diffusion barrier for ceramic/metal systems
US6184567 *Nov 6, 1997Feb 6, 2001Shinko Electric Industries Co., Ltd.Film capacitor and semiconductor package or device carrying same
US6201684Mar 17, 1999Mar 13, 2001Shinko Electric Industries Co., Ltd.Capacitor, formed of a dielectric body having a high dielectric constant
US6489718Jul 18, 2000Dec 3, 2002Candescent Technologies CorporationSpacer suitable for use in flat panel display
US8835310Dec 21, 2012Sep 16, 2014Intermolecular, Inc.Two step deposition of molybdenum dioxide electrode for high quality dielectric stacks
EP0725438A2 *Jan 31, 1996Aug 7, 1996Shinko Electric Industries Co. Ltd.Capacitor built-in type substrate
WO1998024126A1 *Nov 26, 1996Jun 4, 1998Aluminum Co Of AmericaAlumina multilayer wiring substrate provided with high dielectric material layer
Classifications
U.S. Classification361/321.2, 361/321.4, 361/322, 361/313, 361/306.1, 361/320, 361/306.3
International ClassificationH01L23/64, H05K1/03, H05K1/16, H05K1/09, H05K9/00, H05K3/46, H01G4/12
Cooperative ClassificationH05K1/162, H05K3/4629, H01L23/642, H05K1/0306, H01L2924/0002, H05K2201/09309, H05K3/4688, H01G4/12, H05K1/092, H05K3/4611
European ClassificationH05K1/16C, H01G4/12, H01L23/64C
Legal Events
DateCodeEventDescription
Aug 27, 2003FPAYFee payment
Year of fee payment: 12
Sep 13, 1999FPAYFee payment
Year of fee payment: 8
Apr 8, 1997B1Reexamination certificate first reexamination
Oct 17, 1995RRRequest for reexamination filed
Effective date: 19950828
Sep 12, 1995FPAYFee payment
Year of fee payment: 4
Aug 23, 1990ASAssignment
Owner name: INTEL CORPORATION, ARIZONA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:OGAWA, MASAHIRO;YAMASAKI, KOZO;HIRANO, MITSURU;AND OTHERS;REEL/FRAME:005420/0804;SIGNING DATES FROM 19900724 TO 19900803
Owner name: NGK SPARK PLUG CO., LTD., JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:OGAWA, MASAHIRO;YAMASAKI, KOZO;HIRANO, MITSURU;AND OTHERS;REEL/FRAME:005420/0804;SIGNING DATES FROM 19900724 TO 19900803
Owner name: NGK SPARK PLUGS (U.S.A.), INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:OGAWA, MASAHIRO;YAMASAKI, KOZO;HIRANO, MITSURU;AND OTHERS;REEL/FRAME:005420/0804;SIGNING DATES FROM 19900724 TO 19900803