Search Images Maps Play YouTube News Gmail Drive More »
Sign in
Screen reader users: click this link for accessible mode. Accessible mode has the same essential features but works better with your reader.

Patents

  1. Advanced Patent Search
Publication numberUS5340766 A
Publication typeGrant
Application numberUS 08/032,147
Publication dateAug 23, 1994
Filing dateMar 17, 1993
Priority dateMar 19, 1992
Fee statusPaid
Also published asEP0561418A2, EP0561418A3
Publication number032147, 08032147, US 5340766 A, US 5340766A, US-A-5340766, US5340766 A, US5340766A
InventorsYasutaka Nakashiba
Original AssigneeNec Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method for fabricating charge-coupled device
US 5340766 A
Abstract
A method for fabricating a charge-coupled device includes the steps of forming a photoelectric conversion region and a charge transfer region within a surface region of a semiconductor region of a first conductivity type by introducing impurities of a second conductivity type, an element isolation region by introducing impurities of the first conductivity type. The element isolation region defines the photoelectric conversion region and the charge transfer region and also defines a charge-read-out gate region. The impurities of the first conductivity type are introduced by using a mask pattern which allows a uniform channel width at the charge transfer region. The mask pattern takes into account the lateral diffusion which develops during the thermal process applied after the formation of the element isolation region and is thus set back from the edge line of the charge transfer region. The uniform channel width at the charge transfer region suppresses the occurrence of potential dips caused by narrow channel effects so that efficiency of charge transfer is enhanced.
Images(4)
Previous page
Next page
Claims(3)
What is claimed is:
1. A method for fabricating a charge-coupled device, comprising the steps of:
forming a photoelectric conversion region and a charge transfer region within a semiconductor layer of a first conductivity type by introducing impurities of a second conductivity type;
forming an element isolation region by introducing impurities of the first conductivity type into said semiconductor layer by using a mask pattern, said element isolation region defining said photoelectric conversion region and said charge transfer region and also defining a charge-read-out gate region for reading out a signal charge to said charge transfer region from said photoelectron conversion region, and said mask pattern for introducing the impurities of the first conductivity type being set back from an edge line of said charge transfer region which edge line is at a side of the charge-read-out gate region.
2. A method for fabricating a charge-coupled device according to claim 1, in which said first conductivity type is p-type and said second conductivity type is an n-type.
3. A method for fabricating a charge-coupled device according to claim 1, which includes a step of forming a p-type region formed integrally with said charge-read-out gate region and in which the impurities of the first conductivity type are introduced in such a way that a diffusion front of said element isolation region is kept within said p-type region at a side of said charge-read-out gate region of said charge transfer region.
Description
BACKGROUND OF THE INVENTION

(1) Field of the Invention

The present invention relates to a method for fabricating a charge-coupled device, and more particularly to a method for forming an element isolation region in cell portions of the charge-coupled device.

(2) Description of the Related Art

Plan views of a conventional charge-coupled device are given in FIGS. 1A, 1B and 1C, and sectional views thereof taken along the lines A--A in FIGS. 1A(a), 1B(a) and 1C(a) are given in FIGS. 1A(b), 1B(b) and 1C(b), respectively, for illustrating sequential steps for fabricating such a charge-coupled device. A plan view and a potential profile diagram of the charge-coupled device thus formed are given in FIGS. 2A and 2B, respectively.

First, a p-type well 2 is formed on an n-type semiconductor substrate 1. An n-type region 3 to serve as a photoelectric conversion region and an n-type region 4 to serve as a charge transfer region are formed within a surface region of the p-type well 2 by selectively introducing n-type impurities. (see FIGS. 1A(a) and 1A(b))

Next, a p+ -type region 5 is formed selectively within the p-type well 2 by highly doping with p-type impurities, thus defining the n-type region 3 and the n-type region 4. (see FIGS. 1B(a) and 1B(b))

Then, charge transfer electrodes 7 and 8 are formed on an insulating film 6 and, thereafter, an interlayer insulating film and a metal wiring are formed, whereby a conventional charge-coupled device is completed. (see FIGS. 1C(a) and 1C(b))

In the conventional fabrication method for the charge-coupled device explained above, diffusion develops laterally in the highly doped p+ -type region 5 shown in solid lines in FIG. 2A due to the effect of the thermal process which takes place subsequent to the formation of the p+ -type region 5 to serve as an element isolation region. A diffusion region 10 as shown in dash lines is formed after the completion of this process. An adverse consequence therefrom is that, since the charge transfer region at a portion adjacent to a charge-read-out gate region 9 has a wide channel width W1 and that at the remaining portion has a narrow channel width W2, there develops a potential dip Δφch, as illustrated in FIG. 2B (a potential profile at a plane of cross-section taken along the line B--B in FIG. 2A), which is caused by narrow channel effects during the electron-charge transferring. This potential dip deteriorates the efficiency of the charge transfer. This is a problem to be solved by the invention, in the conventional fabricating method for the charge-coupled device.

SUMMARY OF THE INVENTION

It is, therefore, an object of the present invention to provide a method for fabricating a charge-coupled device which overcomes the problems existing in the conventional method of the kind to which the present invention relates, and to provide an improved method for fabricating a charge-coupled device in which the uniform channel width at a charge transfer region effectively suppresses the occurrence of potential dips caused by narrow channel effects so that efficiency of charge transfer is enhanced.

According to one aspect of the invention, there is provided a method for fabricating a charge-coupled device, comprising the steps of:

forming a photoelectric conversion region and a charge transfer region within a semiconductor layer of a first conductivity type by introducing impurities of a second conductivity type;

forming an element isolation region by introducing impurities of the first conductivity type into the semiconductor layer by using a mask pattern, the element isolation region defining the photoelectric conversion region and the charge transfer region and also defining a charge-read-out gate region for reading out a signal charge to the charge transfer region from the photoelectron conversion region, and the mask pattern for introducing the impurities of the first conductivity type being set back from an edge line of the charge transfer region which edge line is at a side of the charge-read-out gate region.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and advantages of the present invention will be apparent from the following description of preferred embodiments of the invention explained with reference to the accompanying drawings, in which:

FIGS. 1A, 1B and 1C are plan and sectional views of a conventional charge-coupled device, for explaining sequential fabrication steps therefor;

FIG. 2A is a plan view of a conventional charge-coupled device and FIG. 2B is a diagram showing a potential profile at a cross-sectional plane taken along the line B--B in FIG. 2A;

FIG. 3A is a plan view of a charge-coupled device fabricated according to a first embodiment of the invention and FIG. 3B is a diagram showing a potential profile at a cross-sectional plane taken along the line C--C in FIG. 3A; and

FIG. 4A is a plan view of a charge-coupled device fabricated according to a second embodiment of the invention and FIG. 4B is a diagram showing a potential profile at a cross-sectional plane taken along the line D--D in FIG. 4A.

PREFERRED EMBODIMENTS OF THE INVENTION

Now, preferred embodiments according to the invention are explained with reference to the accompanying drawings. It is to be noted that, throughout the following explanation, similar reference symbols or numerals refer to the same or similar elements in all the figures of the drawings.

FIG. 3A is a plan view showing a charge-coupled device fabricated according to a first embodiment of the invention and FIG. 3B is a diagram showing a potential profile at a cross-sectional plane taken along the line C--C in FIG. 3A.

In fabricating the charge-coupled device of the first embodiment shown in FIG. 3A, as in the conventional method, n-type regions 3 and 4 are formed within the p-type well and, thereafter, a highly doped p+ -type region 5 is formed followed by the formation of charge transfer electrodes 7 and 8. In carrying out the above processes, the mask pattern (the portion shown by thick solid lines in FIG. 3A) used for the formation of the p+ -type region 5 has a pattern which takes into account the lateral diffusion which develops during the thermal process applied after the formation of the p+ -type region 5 and is thus set back from an edge of the n-type region 4 which serves as the charge transfer region.

When the thermal process is completed, the diffusion region 10 shown in dash lines outside the p+ -type region 5 is formed. However, the front line of the diffusion region 10 coincides with an edge of the charge-read-out gate region 9 at a portion in contact with the charge transfer region (n-type region 4). That is, according to this embodiment, the channel width of the charge transfer region is made the same all the way through so as to suppress the occurrence of potentials dips. As readily understood from the potential profile shown in FIG. 3B, there occurs no potential dip unlike in the prior art as shown in FIG. 2B.

It has been confirmed through an experimental fabrication of the device that, if impurities of 41012 cm-2 are introduced to the n-type region 4 to become the charge transfer region and impurities of 21013 cm-2 are introduced to the p+ -type region 5 to become the element isolation region and the mask pattern is so set as to provide between the former and the latter regions a distance in the order of 0.3 μm, the charge transfer efficiency is enhanced due to the suppression of the occurrence of potential dips.

FIG. 4A is a plan view of a charge-coupled device fabricated according to a second embodiment of the invention and FIG. 4B is a diagram showing a potential profile developed at a given time in the section taken along the line D--D in FIG. 4A.

The fabrication processes used for the fabrication of the device are the same as those used in the first embodiment.

In the device fabricated according to this second embodiment, the diffusion front formed when the thermal process of the p+ -type region 5 is completed stays within the p-type region 9a which is integrally formed with the gate region 9.

Therefore, in the device thus fabricated, the channel width of the channel transfer region is the same all the way through without the occurrence of a wide portion or a narrow portion.

It has been confirmed through an experimental fabrication of the device that, if impurities of 41012 cm-2 are Introduced to the n-type region 4 to become the charge transfer region, impurities of 21013 cm-2 are introduced to the p+ -type region 5 to become the element isolation region and impurities of 21012 cm-2 are introduced to the gate region 9 and p-type region 9a and the mask pattern is so set as to provide between the n-type region 4 and the p+ -type region 5 a distance greater than 0.4 μm, the charge transfer efficiency is enhanced due to the suppression of the occurrence of potential dips Δφch which may be caused by narrow channel effects.

As explained above, in the fabrication method for a charge-coupled device according to the invention, the mask pattern used for the formation of the p+ -type region 5 has a pattern which takes into account in advance the lateral diffusion which develops during the thermal process in the p+ -type region to become the element isolation region and which maintains a predetermined distance between the p+ -type region and the n-type region to become the charge transfer region. Thus, in the device fabricated according to the invention, the channel width of the charge transfer region is uniform which has made it possible to enhance the charge transfer efficiency due to the suppression of the occurrence of potential dips Δφch which may be caused by narrow channel effects.

While the invention has been described in its preferred embodiments, it is to be understood that the words which have been used are words of description rather than limitation and that changes within the purview of the appended claims may be made without departing from the true scope and spirit of the invention in its broader aspects.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US4216574 *Jun 29, 1978Aug 12, 1980Raytheon CompanyCharge coupled device
US4276099 *Oct 10, 1979Jun 30, 1981The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern IrelandFabrication of infra-red charge coupled devices
US4608749 *Aug 22, 1984Sep 2, 1986Kabushiki Kaisha ToshibaMethod of manufacturing a solid-state image pickup device
US4683637 *Feb 7, 1986Aug 4, 1987Motorola, Inc.Forming depthwise isolation by selective oxygen/nitrogen deep implant and reaction annealing
US5246875 *Oct 15, 1992Sep 21, 1993Goldstar Electron Co., Ltd.Method of making charge coupled device image sensor
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6046069 *Feb 5, 1997Apr 4, 2000Matsushita Electronics CorporationSolid-state image pick-up device and method for manufacturing the same
US6806904 *Aug 17, 2000Oct 19, 2004Fuji Photo Film Co., Ltd.Solid-state image pickup device
US7145122 *Jun 14, 2004Dec 5, 2006Omnivision Technologies, Inc.Imaging sensor using asymmetric transfer transistor
Classifications
U.S. Classification438/60, 438/75, 257/E27.154, 257/E21.617, 257/E21.544
International ClassificationH01L27/146, H01L21/761, H01L21/76, H01L21/8234, H01L27/148
Cooperative ClassificationH01L21/823406, H01L27/14831, H01L21/761
European ClassificationH01L21/8234B, H01L21/761, H01L27/148C
Legal Events
DateCodeEventDescription
Oct 15, 2010ASAssignment
Owner name: RENESAS ELECTRONICS CORPORATION, JAPAN
Free format text: CHANGE OF NAME;ASSIGNOR:NEC ELECTRONICS CORPORATION;REEL/FRAME:025148/0010
Effective date: 20100401
Jan 27, 2006FPAYFee payment
Year of fee payment: 12
Feb 25, 2003ASAssignment
Owner name: NEC ELECTRONICS CORPORATION, JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:013758/0440
Effective date: 20021101
Jan 31, 2002FPAYFee payment
Year of fee payment: 8
Dec 31, 1997FPAYFee payment
Year of fee payment: 4
Mar 17, 1993ASAssignment
Owner name: NEC CORPORATION, JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:NAKASHIBA, YASUTAKA;REEL/FRAME:006474/0668
Effective date: 19930308