|Publication number||US5349235 A|
|Application number||US 08/111,518|
|Publication date||Sep 20, 1994|
|Filing date||Aug 25, 1993|
|Priority date||Sep 8, 1992|
|Also published as||DE69322140D1, DE69322140T2, EP0587294A1, EP0587294B1|
|Publication number||08111518, 111518, US 5349235 A, US 5349235A, US-A-5349235, US5349235 A, US5349235A|
|Inventors||Joon K. Lee, Hyeon J. Jeong, Kyung S. Kim, Oh-Sik Kwon|
|Original Assignee||Samsung Electronics Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (8), Referenced by (27), Classifications (31), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to semiconductor packages and, more particularly to, a vertical surface mounted semiconductor package which is firmly mounted vertically on a printed circuit board (PCB) by forming a protrusion on its body.
Recently, according to the trends toward higher density, higher capacity, faster signal processing speed, increasing power consumption, multi-function, and higher packing density, the importance of semiconductor chip package design is growing. Along with higher density and higher capacity of semiconductor chips and memory devices, the number of input and output pin leads is increased, so a fine pitch between the leads is required. Also, in order to dissipate a large amount of heat generated in the semiconductor chip according to the increase of operating speed and power consumption, an additional heat sink is required in the semiconductor package or the package body must be made of materials having a high thermal conductivity. With the multi-function of the semiconductor chip, semiconductor packages with a variety of functions are required. In addition, according to demands for high-density mounting of the semiconductor chips, investigation of stacked mounting of the semiconductor packages or direct mounting of the semiconductor chips into the PCB is proceeding.
In general, semiconductor chips (e.g., IC and LSI) are sealed in packages and mounted on the PCB. In the case of a standard semiconductor chip package, the semiconductor chip is loaded on a metal die pad for heat sink purposes. Then the electrode pads on the semiconductor chip are connected with leads for connection with external circuits by bonding wires. A package body made of epoxy molding compound (EMC) is formed to protect the semiconductor chip and the bonding wires. A dual in line package (DIP) type in which the leads extend from opposing sides of the package and a quad flat package (QFP) type in which the leads extend from all four peripheral sides of the package are very common. Since the QFP can form more lead connections than the DIP, it enhances the mounting density on the PCB.
In order to further enhance the mounting density of the chip packages, a vertical package (VPAK) and a vertical surface mounted package (VSMP) that occupy a small area due to vertical mounting on the PCB are being investigated.
FIGS. 1 and 2 show a conventional VPAK 10.
A plurality of leads 14 which are connected to the PCB (not shown) protrude from one side of a rectangular package body 12 in which a semiconductor chip (not shown) is mounted. The leads 14 are all aligned in the same direction. Also, support portions 16 protrude at both ends of the side of the package body 12 from which the leads 14 protrude. The support portions 16 are formed of EMC like the package body 12 and extend from the package body 12 farther than the leads 14. Also, the support portions 16 each have a hanging jaw 18 in a middle part to protect the bent leads 14.
As shown in FIG. 10, the ends of the support portions 16 are inserted into holes 42 formed on the PCB so that the VPAK 10 is firmly supported. The hanging jaw 18 is adhered onto an upper part of the hole 42 to thereby prevent the leads 14 from being deformed.
FIGS. 3 to 5 show a conventional VSMP 20. A plurality of leads 24 which are electrically connected to the PCB (not shown) protrude from one side of a rectangular package body 22 on which the semiconductor chip (not shown) is mounted. The leads 24 are bent in the same direction. A pair of support portions 26 are formed at both ends of the side of the package body 22 having leads 24 extending therefrom and are bent in both directions to support the package body 22. The support portions 26 are made of metal, are longer than the leads 24, and are aligned with the leads 24. The VSMP 20 is adhered on the PCB 40 by soldering so it is firmly supported, thereby preventing the leads 24 from being deformed due to external force.
In the conventional VPAK 10, however, the mounting process is complicated since the holes 42 into which the support portions 16 are inserted must be formed separately to mount the VPAK 10 on the PCB 40. Also, in the VSMP 20, the leads 24 are susceptible to deformation when a thin lead frame is used.
An object of the present invention is to provide a semiconductor package which is simple to mount on the PCB from a manufacturing standpoint.
Another object of the invention is to provide a semiconductor package which protects the leads from being deformed even when a thin lead frame is used.
According to the present invention, a semiconductor chip package is provided with a package body for protecting a semiconductor chip mounted therein, and leads protruding from one side of the package body. The semiconductor chip package also has support portions, typically formed of the same material as the package body, formed in a predetermined shape and disposed at the ends of the side of the chip package having the leads extending therefrom. The semiconductor chip package also has a slot portion formed to protect the leads from being damaged.
FIG. 1 is a front view of a conventional vertical package.
FIG. 2 is a side view of the conventional vertical package in FIG. 1.
FIG. 3 is a front view of a conventional vertical surface mounted package.
FIG. 4 is a side view of the conventional vertical surface mounted package in FIG. 3.
FIG. 5 is a plan view of a conventional vertical surface mounted package.
FIG. 6 is a perspective view of a semiconductor chip package according to the present invention.
FIG. 7 is a front view of a package according to the present invention.
FIG. 8 is a side view of a package according to the present invention.
FIG. 9 is a plan view of a package according to the present invention.
FIG. 10 is a side view of a printed circuit board on which the packages of FIG. 1, FIG. 3, and FIG. 6 are mounted.
FIG. 11 is a plan view of a module on which packages of FIG. 7 are mounted.
An embodiment of the present invention will now be described in more detail with reference to accompanying drawings.
FIGS. 6 to 9 show various views of a semiconductor chip package according to the present invention.
A VSMP semiconductor package 30 having a package body 32 with first and second faces thereof for protecting a semiconductor chip is formed of EMC by a conventional heating method. Metal leads 34 protrude down from a lower side of the package body 32 and are bent in a horizontal direction, as seen in FIG. 6. Support portions 36 are formed on the first and second faces of the chip package body 32 at both ends of the side of the package body 32 from which leads 34 extend, as seen in FIGS. 6 and 8. Also, the support portions 36 are made of the same material as the package body 32 (i.e., EMC), and are formed along with the package body 32 during a press-molding process. As shown in FIG. 9, a first pair of support portions 36a disposed on the first face of the package body 32 is staggered to one side of the second pair of support portions 36b on the second face of package body 32. The support portions 36 extend outwardly from the package body 32 by a predetermined distance B, shown in FIG. 9. The support portions 36 of the package body 32 are formed to allow adjacent package bodies to be mounted on PCB 40 closely together to increase packing density, as illustrated in FIG. 11.
In addition, slot 38 is formed in the package body 32 between the support portions 36 to further protect the leads 34. The depth A of the slot 38 is equal to or larger than the length of the vertical segment of the bent leads 34.
The support portions 36 may be formed with an arbitrary shape but the bottom of each support portion 36 is flattened so that it can be adhered to the PCB by solder or a bonding agent, together with the leads 34.
A gap may occur between a lower part of the support portions 36 and the package body 32 due to a slow slope caused by taking a frame out after molding. In order to prevent such a gap from occurring, a conventional molding method may be used for taking a frame out in vertical direction with the lower part of the support portions 36. However, it is preferable to use a molding method for directly taking a frame out at the lower part of the support portions 36, so as to make the lower part of the support portions 36 even more flat.
As seen in FIG. 9, the horizontal length B of the support portions 36 is longer than or approximately equal to the horizontal extent of bent leads 34. Thus, the leads 34 are protected by the slot 38 and the horizontal extension of support portions 36 from deformation and damage by external force. Moreover, the support portions 36 permit the packages 30 to be firmly mounted on the PCB 40 as shown in FIG. 10.
FIG. 11 is a plan view of a module mounted with several semiconductor packages 50 of the type in FIG. 6.
A plurality of VSMP's 50 are vertically mounted on the PCB 60, and leads 54 and support portions 56 are adhered to the PCB 60. The support portions 56 are formed so as to conform closely with each other, as described above. Thus, the semiconductor packages 50 are mounted close to each other, thereby occupying a small area on the PCB 60 and improving the packing density.
As described above, according to the present invention, leads protrude from one side of a semiconductor chip package body. Support portions are formed to either side of the leads to permit mounting of the semiconductor chip package. The support portions may be made of the same material as the package body. Also, a slot is formed in the chip package to further protect the leads.
Thus, there are no additional process steps, such as forming holes in the PCB to mount the support portions of the semiconductor package, so the mounting process of the package becomes simpler. The support portions protruding from the package body are used to mount the package on the PCB firmly. The slot and support portions of the semiconductor chip package body help to prevent the leads from being deformed or damaged by external forces, thereby improving the reliability of the semiconductor package. Also, since the leads are formed in turn and the packages can be mounted near to each other, only a small area of the PCB is occupied, thereby improving the packing density.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4266282 *||Mar 12, 1979||May 5, 1981||International Business Machines Corporation||Vertical semiconductor integrated circuit chip packaging|
|US4855809 *||Nov 24, 1987||Aug 8, 1989||Texas Instruments Incorporated||Orthogonal chip mount system module and method|
|US4967262 *||Nov 6, 1989||Oct 30, 1990||Micron Technology, Inc.||Gull-wing zig-zag inline lead package having end-of-package anchoring pins|
|US4975763 *||Mar 14, 1988||Dec 4, 1990||Texas Instruments Incorporated||Edge-mounted, surface-mount package for semiconductor integrated circuit devices|
|US5031072 *||Jan 31, 1990||Jul 9, 1991||Texas Instruments Incorporated||Baseboard for orthogonal chip mount|
|US5260601 *||Sep 5, 1990||Nov 9, 1993||Texas Instruments Incorporated||Edge-mounted, surface-mount package for semiconductor integrated circuit devices|
|JPH02125648A *||Title not available|
|JPH03129866A *||Title not available|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US5555488 *||Jan 21, 1993||Sep 10, 1996||Texas Instruments Incorporated||Integrated circuit device having improved post for surface-mount package|
|US5619067 *||May 2, 1994||Apr 8, 1997||Texas Instruments Incorporated||Semiconductor device package side-by-side stacking and mounting system|
|US6043558 *||Sep 12, 1997||Mar 28, 2000||Micron Technology, Inc.||IC packages including separated signal and power supply edge connections, systems and devices including such packages, and methods of connecting such packages|
|US6078102 *||Mar 3, 1998||Jun 20, 2000||Silicon Bandwidth, Inc.||Semiconductor die package for mounting in horizontal and upright configurations|
|US6128201 *||May 22, 1998||Oct 3, 2000||Alpine Microsystems, Inc.||Three dimensional mounting assembly for integrated circuits|
|US6175161||May 22, 1998||Jan 16, 2001||Alpine Microsystems, Inc.||System and method for packaging integrated circuits|
|US6310782||Oct 31, 1996||Oct 30, 2001||Compaq Computer Corporation||Apparatus for maximizing memory density within existing computer system form factors|
|US6326687 *||Sep 1, 1998||Dec 4, 2001||Micron Technology, Inc.||IC package with dual heat spreaders|
|US6511863 *||Dec 26, 2000||Jan 28, 2003||Micron Technology, Inc.||Method and apparatus for a semiconductor package for vertical surface mounting|
|US6518098||Aug 29, 2001||Feb 11, 2003||Micron Technology, Inc.||IC package with dual heat spreaders|
|US6549420||Mar 20, 2001||Apr 15, 2003||Hewlett-Packard Development Company, L.P.||Method and apparatus for increasing memory capacity|
|US6765291||Aug 14, 2002||Jul 20, 2004||Micron Technology, Inc.||IC package with dual heat spreaders|
|US6777261 *||Nov 26, 2002||Aug 17, 2004||Micron Technology, Inc.||Method and apparatus for a semiconductor package for vertical surface mounting|
|US6836003||Mar 28, 2001||Dec 28, 2004||Micron Technology, Inc.||Integrated circuit package alignment feature|
|US6858453 *||Oct 12, 1999||Feb 22, 2005||Micron Technology, Inc.||Integrated circuit package alignment feature|
|US6920688||Aug 27, 2002||Jul 26, 2005||Micron Technology, Inc.||Method for a semiconductor assembly having a semiconductor die with dual heat spreaders|
|US6963143||Nov 14, 2002||Nov 8, 2005||Micron Technology, Inc.||Method of ball grid array (BGA) alignment, method of testing, alignment apparatus and semiconductor device assembly|
|US6991960||Aug 30, 2001||Jan 31, 2006||Micron Technology, Inc.||Method of semiconductor device package alignment and method of testing|
|US7005754||Nov 14, 2002||Feb 28, 2006||Micron Technology, Inc.||Method of ball grid array (BGA) alignment, method of testing, alignment apparatus and semiconductor device assembly|
|US7473990 *||Oct 27, 2006||Jan 6, 2009||Nec Electronics Corporation||Semiconductor device featuring electrode terminals forming superior heat-radiation system|
|US20020185727 *||Aug 14, 2002||Dec 12, 2002||Corisis David J.||IC package with dual heat spreaders|
|US20030042626 *||Aug 30, 2001||Mar 6, 2003||Howarth James J.||Method of ball grid array (BGA) alignment, method of testing, alignment apparatus and semiconductor device assembly|
|US20030082856 *||Nov 26, 2002||May 1, 2003||Micron Technology, Inc.||Method and apparatus for a semiconductor package for vertical surface mounting|
|US20030094706 *||Nov 14, 2002||May 22, 2003||Howarth James J.|
|US20030094707 *||Nov 14, 2002||May 22, 2003||Howarth James J.|
|US20070096317 *||Oct 27, 2006||May 3, 2007||Nec Electronics Corporation||Semiconductor device featuring electrode terminals forming superior heat-radiation system|
|US20070126445 *||Nov 30, 2005||Jun 7, 2007||Micron Technology, Inc.||Integrated circuit package testing devices and methods of making and using same|
|U.S. Classification||257/693, 365/52, 257/730, 257/E23.048, 257/723, 361/772, 257/E23.124, 257/E23.194|
|International Classification||H01L23/28, H01L23/00, H05K3/30, H05K1/18, H01L23/04, H01L21/56, H01L23/31, H01L23/50, H01L23/495|
|Cooperative Classification||Y02P70/613, H01L2924/0002, H05K2201/10454, H01L23/3107, H05K2201/10568, H05K2201/10696, H05K3/303, H05K2201/10522, H01L23/562, H01L23/49555|
|European Classification||H01L23/562, H05K3/30C, H01L23/495G4B6, H01L23/31H|
|Nov 1, 1993||AS||Assignment|
Owner name: SAMSUNG ELECTRONICS CO., LTD., KOREA, REPUBLIC OF
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LEE, JOON KI;JEONG, HYEON JO;KIM, KYUNG SUB;AND OTHERS;REEL/FRAME:006793/0504
Effective date: 19931015
|Feb 19, 1998||FPAY||Fee payment|
Year of fee payment: 4
|Feb 21, 2002||FPAY||Fee payment|
Year of fee payment: 8
|Feb 24, 2006||FPAY||Fee payment|
Year of fee payment: 12