|Publication number||US5415555 A|
|Application number||US 08/200,037|
|Publication date||May 16, 1995|
|Filing date||Feb 22, 1994|
|Priority date||Dec 14, 1992|
|Also published as||CA2110892A1, CA2110892C, DE69301531D1, DE69301531T2, EP0602610A1, EP0602610B1, US5342207|
|Publication number||08200037, 200037, US 5415555 A, US 5415555A, US-A-5415555, US5415555 A, US5415555A|
|Original Assignee||Hughes Aircraft Company|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (14), Referenced by (27), Classifications (20), Legal Events (8)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This is a division of application, Ser. No. 07/990,475 filed 14 Dec. 1992, now U.S. Pat. No. 5,342,207.
1. Field of the Invention
The present invention relates to a method and apparatus for interconnecting electrical conductors by use of electrical protuberances, such as raised bumps and rings.
2. Description of Related Art and Other Considerations
There are many techniques for obtaining interconnections among printed wiring boards, and ceramic and silicon wafers. Connectors, which are soldered and aligned to mating connectors, are very expensive. Hand wiring and soldering do not result in cost savings and the high density connections which are increasingly desired in the industry.
Bumps or projecting metallic contacts, as an alternate to soldered and alignable connectors, are known techniques for interconnecting flexible to flexible circuits, flexible to rigid printed circuits, or such circuits to electric components. Examples utilizing such bumps are described in U.S. Pat. Nos. 4,125,310 and 4,453,795. These patents describe a plurality of generally resilient metallic raised projections. In the latter patent, a resilient backup arrangement is used to avoid overstressing and squashing of the resilient contacts or projections beyond their elastic limit, which overstressing precludes repeated mating and unmating of connectors. These terminations otherwise effectively and reliably interconnect mating circuits, but their manufacture can be difficult, time consuming and costly. Many times, repeated etching and plating operations are required. Special attention is often required to select special materials, methodology, tooling and artwork. Many techniques limit the size of the bumps and, therefore, the density of interconnection which is desired.
It is, therefore, desirable to avoid these problems.
The present invention is directed to enabling the interconnection of a pair of electrical circuits, whether both are flexible or one is flexible and the other is rigid. Electrically conductive material on a first connector is placed on a substrate on which there are sites that define positions of electrical connections. Projections of substantially inelastic dielectric material, e.g., epoxy resin, are affixed to these sites, and an electrically conductive layer is placed atop each of the projections and the electrically conductive material adjacent to the projections.
The inelastic dielectric material must be carefully selected to match its coefficient of thermal expansion with that of the circuit, to have good adhesion to its base material, and not to bubble or expand after it is cured or to burst the underlying copper.
Each of the projections may comprise a rounded mount or a walled structure. The walls are preferably fully enclosed and may be circular, oval or other shape, for example, polygonal. When configured as an enlarged ring or oval, the walled structure may be used to contact a plurality of mounts on a mating cable.
Several advantages are derived from the present invention. It is possible to obtain a higher density interconnection than was previously obtainable. The cost of manufacture is relatively low. Connection and disconnection between mating cables are simple and repeatable. The use of solder connections, special connectors and wired interconnections are avoided. Facile interchangeability amongst different types of flexible or rigid cables and printed wiring boards is obtainable.
Other aims and advantages, as well as a more complete understanding of the present invention, will appear from the following explanation of exemplary embodiments and the accompanying drawings thereof.
FIG. 1 illustrates, in cross-section, a pair of flexible cables which are interconnectable, in accordance with the teachings of the present invention, using a rounded mount positionable to contact with a ring;
FIG. 2 is a top view of one of the flexible cables depicted in FIG. 1;
FIGS. 3-9 illustrate a method for forming the bump and ring formations shown in FIGS. 1 and 2;
FIGS. 10-12 show an alternate embodiment of the present invention utilizing plated-through holes as bases for the bump or ring interconnects;
FIG. 13 is a view of a further embodiment of the present invention utilizing a combination of bump projections and flat interconnections for mating, for example, with bump projections on a companion circuit; and
FIG. 14 is a perspective view of still another embodiment of the present invention showing a plurality, illustrated as two, of bump projections contactable with a single oval projection on a mating connector.
As shown in FIGS. 1 and 2, a pair of flexible circuits 20 and 22 each comprise a pair of protuberances configured as bumps 24 and rings 26. Bump 24 of circuit 20 is positioned to face ring 26 of circuit 22, while ring 26 of circuit 20 faces bump 24 of circuit 22. Therefore, when circuits 20 and 22 are placed in contact with one another, their respective bumps and rings form mating interconnections.
Each circuit 20 and 22 is similarly fabricated, and comprises a substrate 28, an electrically conductive layer 30 adhered thereto, electrically conductive pads 32 on layer 30, projections 34 and 36 of relatively inelastic dielectric material, and a conductive layer 38 on the projections.
Substrate 28 may comprise a ceramic or silicon semiconductor, a polyimide plastic, epoxy glass, aluminum nitride, or other suitable electronic material. The material of layer 30, pads 32, and layer 38 may be copper. Pads 32 define the sites of the projecting electrical interconnects, and projections 34 and 36 define respective bump and ring outlines.
While copper layer 38 is shown also to form an interconnection 40 between bumps 24 and rings 26 of respective circuits 20 and 22, it is to be understood that the particular circuit design may not require that such an interconnection 40 exist between every bump and ring pair.
While bumps 24 are depicted as generally circular, they may be configured in any convenient manner. Likewise, rings 26 are illustrated also as circular in configuration; however, they also may be of any other configuration, such as elliptical, oval, and polygonal.
Each of flexible circuits 20 and 22 are fabricated according to the process depicted in FIGS. 3-9. As shown in FIG. 3, a conventional cladded article 42 of conventional design and construction comprises a substrate 44 having copper cladding 46 distributed thereover. Substrate 44 is formed of any conventional plastic material, e.g., a polyimide plastic.
As shown in FIG. 4, sites 48 on article 42 are selected for the formation of respective bumps 24 and rings 26, and are precisely located by the positioning of a screen 50 on copper cladding 46. Screen 50 has openings 52 and 54 therein, which respectively define the sites for bumps 24 and rings 26. For the production of a bump and a ring, opening 52 forms a simple round opening, while opening 54 is angular in shape in order to define the ring.
As shown in FIG. 5, a relatively inelastic dielectric material, such as an epoxy resin, is deposited by conventional methods on copper cladding 46 through openings 52 and 54 of screen 50, and thereby respectively forms an epoxy base 56 for bump 24 through opening 52 and an epoxy ring 58 for ring 26 through opening 54.
It is important that the dielectric material have several characteristics. The inelastic dielectric material must be carefully selected to match its coefficient of thermal expansion with that of the circuit, to provide good adhesion to its base material, and not to bubble or expand after it is cured or to burst the underlying copper. Thus, the dielectric material is so selected that its coefficient of thermal expansion be below that of the underlying conductor, for example copper, to prevent any degradation through volume expansion.
The preferred dielectric material comprises a non-metallic epoxy resin, known in the industry as EPON (a trademark of Shell Chemical Company) and more specifically comprises EPON 825, which is essentially pure diglycidyl ether of Bisphenol A, a thermosetting resin, which is chemically activated and heat cured to an irreversible condition. A preferred epoxy composition used in the present invention comprises EPON 825, a curing agent, such as a diamine, and an accelerator. A particular composition used in constructing the present invention comprised EPON 825 and an accelerated amine curing agent comprising menthane diamine (250.0±2.0 parts by weight, pbw), metaphenylene diamine (100.0±2.0 pbw), and N-benzyl dimethylamine (1.5±0.2 pbw) as the accelerator. Optionally, an anhydride curing agent, such as nadic methyl anhydride, may be used. The preferred composition in accordance with the present invention also comprises glass powder, to enable the curing process to be sufficiently rapid, so as to provide an acceptable end item whose geometry can be controlled, and to avoid relaxation and flow of the resin from the desired geometry.
Screen 50 is then removed to present the configuration illustrated in FIG. 6.
A combination of electroless and electroplated copper 60, as illustrated in FIG. 7, is then deposited by conventional techniques over copper cladding 46 and epoxy projections 56 and 58. As is standard in the industry, an electroless coating is first deposited over the formation depicted in FIG. 6 to insure that copper will cover the dielectric materials comprising projections 56 and 58 as well as cladding 46, the electroless deposit thereby forming an electrically conductive surface for the subsequent deposition of an electroplate of copper.
The final definition of the completed circuit is obtained by use of a photoresist 62 and mask/artwork 64 above the photoresist, as illustrated in FIG. 8. Using conventional photographic and etching techniques, which employ photoresist 62 and mask/artwork 64, selective portions of copper cladding 46 and copper plate 60 are etched away, as outlined by the mask and developed photoresist portions designated by indicium 66, thus resulting in the configuration illustrated in FIG. 9, as well as in FIGS. 1 and 2.
Referring now to FIGS. 10-12, a second embodiment of the present invention relates to projections, such as bumps and rings as above described, formed on a printed wiring board 70 having plated-through holes 72 therein. Such a board with plated-through holes is of conventional construction, board 70 including a matrix 74 of dielectric material and internal conductive traces or leads 76 for connecting one or more plated-through holes 72. As is conventional, plated-through holes 72 are formed with through openings 78 therein.
To form projections on the plated-through holes, as shown in FIG. 11, openings 78 are filled with conductive material 80. Then, by processing similar to that described with respect to FIGS. 3-9, projections 82 of epoxy resin and their coverings of an electroless and electroplated copper plate 84 are formed on the filled plated-through holes, as shown in FIG. 12. While shown as bumps, the projections may be configured as desired and be formed not only on an upper surface 86 but also on a lower surface 88 of printed wiring board 70 as depicted in FIG. 12.
Referring now to FIG. 13, a further embodiment of the present invention, comprising a flexible or rigid circuit 90, includes a plurality of projections 92 coupled to rectangular pads 94 by connections 96. While shown as having rectangular configurations, pads 94 may take any polygonal or other configuration. The purpose of pads 94 is to provide a contacting surface of sufficiently large area for contact with one or more projections on a mating circuit.
In FIG. 14, a circuit assembly 100 is shown as comprising a pair of circuits 102 and 104. The two circuits are interconnected by means of bump projections 106 and a ring projection 108. Both projections 106 and 108 are formed in the manner described above with respect to FIGS. 3-9, or may comprise the plated-through hole configuration depicted in FIGS. 10-12. Ring projection 108 preferably is ovular in configuration and is sufficiently large in area so as to encompass both bump projections 106. While shown as only two bump projections, projections 106 may comprise more than two. In this embodiment, the plurality of bump projections 106 may be all interconnected with one another, in order to insure that there would be at least one electrical connection with oval ring projection 108. Alternately or in addition, the plurality of bump projections 106 may lead to different circuitry and other connections on circuit 102, in order to utilize ring projection 108 to connect the several bump projections and their respective circuits on circuit 102.
Although the invention has been described with respect to particular embodiments thereof, it should be realized that various changes and modifications may be made therein without departing from the scope of the invention.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4116517 *||Dec 3, 1976||Sep 26, 1978||International Telephone And Telegraph Corporation||Flexible printed circuit and electrical connection therefor|
|US4125310 *||Dec 1, 1975||Nov 14, 1978||Hughes Aircraft Co||Electrical connector assembly utilizing wafers for connecting electrical cables|
|US4268956 *||Mar 15, 1979||May 26, 1981||Bunker Ramo Corporation||Method of fabricating an interconnection cable|
|US4403272 *||Jun 2, 1980||Sep 6, 1983||Oak Industries Inc.||Membrane switch interconnect tail and printed circuit board connection|
|US4453795 *||Jul 7, 1981||Jun 12, 1984||Hughes Aircraft Company||Cable-to-cable/component electrical pressure wafer connector assembly|
|US4740700 *||Sep 2, 1986||Apr 26, 1988||Hughes Aircraft Company||Thermally insulative and electrically conductive interconnect and process for making same|
|US4813129 *||Jun 19, 1987||Mar 21, 1989||Hewlett-Packard Company||Interconnect structure for PC boards and integrated circuits|
|US4902606 *||Aug 1, 1988||Feb 20, 1990||Hughes Aircraft Company||Compressive pedestal for microminiature connections|
|US5129142 *||Oct 30, 1990||Jul 14, 1992||International Business Machines Corporation||Encapsulated circuitized power core alignment and lamination|
|US5147208 *||Jun 28, 1991||Sep 15, 1992||Rogers Corporation||Flexible printed circuit with raised contacts|
|US5158466 *||Mar 4, 1991||Oct 27, 1992||Hughes Aircraft Company||Metallically encapsulated elevated interconnection feature|
|US5172050 *||Feb 15, 1991||Dec 15, 1992||Motorola, Inc.||Micromachined semiconductor probe card|
|US5207585 *||Oct 31, 1990||May 4, 1993||International Business Machines Corporation||Thin interface pellicle for dense arrays of electrical interconnects|
|EP0295914A2 *||Jun 16, 1988||Dec 21, 1988||Hewlett-Packard Company||An interconnect structure for PC boards and integrated circuits|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US5796050 *||Feb 5, 1997||Aug 18, 1998||International Business Machines Corporation||Flexible board having adhesive in surface channels|
|US5831444 *||Jul 9, 1997||Nov 3, 1998||General Dynamics Information Systems, Inc.||Apparatus for performing a function on an integrated circuit|
|US5938455 *||May 15, 1996||Aug 17, 1999||Ford Motor Company||Three-dimensional molded circuit board having interlocking connections|
|US5962924 *||Aug 17, 1998||Oct 5, 1999||Integrated Device Technology, Inc.||Semi-conductor die interconnect|
|US5977784 *||Aug 20, 1998||Nov 2, 1999||General Dynamics Information Systems, Inc.||Method of performing an operation on an integrated circuit|
|US6012221 *||Aug 17, 1998||Jan 11, 2000||International Business Machines Corporation||Method of attaching a flexible circuit to a substrate|
|US6118080 *||Jan 13, 1998||Sep 12, 2000||Micron Technology, Inc.||Z-axis electrical contact for microelectronic devices|
|US6245444||Oct 2, 1997||Jun 12, 2001||New Jersey Institute Of Technology||Micromachined element and method of fabrication thereof|
|US6417686||Jan 26, 2000||Jul 9, 2002||Si Diamond Technology, Inc.||Display panel test device|
|US6552563||Nov 14, 1996||Apr 22, 2003||Si Diamond Technology, Inc.||Display panel test device|
|US6662440 *||Sep 20, 1999||Dec 16, 2003||Micron Technology, Inc.||Z-axis electrical contact for microelectric devices|
|US6792679 *||Nov 17, 2000||Sep 21, 2004||Japan Aviation Electronics Industry Limited||Method of producing electrical connecting elements|
|US7059868 *||Mar 3, 2003||Jun 13, 2006||Western Digital (Fremont), Inc.||Connection of trace circuitry in a computer disk drive system|
|US7230339 *||Mar 28, 2003||Jun 12, 2007||Intel Corporation||Copper ring solder mask defined ball grid array pad|
|US7419382 *||Oct 30, 2006||Sep 2, 2008||Kabushiki Kaisha Toshiba||Printed circuit board, electronic device, and manufacturing method for printed circuit board|
|US8194355||Jun 5, 2012||Western Digital Technologies, Inc.||Head stack assembly with a laminated flexure having a snap-through feature|
|US8279560||Mar 4, 2009||Oct 2, 2012||Western Digital Technologies, Inc.||Head stack assembly with suspension tail bond alignment by solder pin|
|US8552310 *||Jan 9, 2012||Oct 8, 2013||Seiko Epson Corporation||Mounting structure of electronic component|
|US8611052||Mar 27, 2012||Dec 17, 2013||Western Digital Technologies, Inc.||Systems and methods for aligning components of a head stack assembly of a hard disk drive|
|US8850700 *||May 28, 2008||Oct 7, 2014||Canon Kabushiki Kaisha||Wiring board and method for making the same|
|US8934199||Mar 31, 2014||Jan 13, 2015||Western Digital Technologies, Inc.||Disk drive head suspension tail with bond pad edge alignment features|
|US9330695||Mar 26, 2015||May 3, 2016||Western Digital Technologies, Inc.||Disk drive head suspension tail with a noble metal layer disposed on a plurality of structural backing islands|
|US20070099449 *||Oct 30, 2006||May 3, 2007||Daigo Suzuki||Printed circuit board, electronic device, and manufacturing method for printed circuit board|
|US20080316722 *||May 28, 2008||Dec 25, 2008||Canon Kabushiki Kaisha||Wiring board and method for making the same|
|US20100317233 *||Jun 25, 2010||Dec 16, 2010||Jae-Yong Koh||Electrical connection system|
|US20120103673 *||May 3, 2012||Seiko Epson Corporation||Mounting structure of electronic component|
|WO1999000874A1 *||Jun 26, 1998||Jan 7, 1999||Quantum Corporation||Circuit connector|
|International Classification||H01R12/71, H05K3/00, H05K1/14, H05K3/36, H01R43/00, H05K3/40|
|Cooperative Classification||Y10T29/49155, H05K2201/09481, H05K2201/09745, H01R12/714, H05K3/365, H05K2201/0367, H05K3/0094, H05K2203/167, H05K3/4007, H05K2201/0959|
|European Classification||H05K3/36B4, H01R23/72B, H05K3/40B|
|Feb 22, 1994||AS||Assignment|
Owner name: HUGHES AIRCRAFT COMPANY, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SOBHANI, MOHI;REEL/FRAME:006896/0567
Effective date: 19940214
|Dec 8, 1998||REMI||Maintenance fee reminder mailed|
|Jan 6, 1999||FPAY||Fee payment|
Year of fee payment: 4
|Jan 6, 1999||SULP||Surcharge for late payment|
|Oct 18, 2002||FPAY||Fee payment|
Year of fee payment: 8
|Dec 21, 2004||AS||Assignment|
Owner name: HE HOLDINGS, INC., A DELAWARE CORP., CALIFORNIA
Free format text: CHANGE OF NAME;ASSIGNOR:HUGHES AIRCRAFT COMPANY, A CORPORATION OF THE STATE OF DELAWARE;REEL/FRAME:016087/0541
Effective date: 19971217
Owner name: RAYTHEON COMPANY, MASSACHUSETTS
Free format text: MERGER;ASSIGNOR:HE HOLDINGS, INC. DBA HUGHES ELECTRONICS;REEL/FRAME:016116/0506
Effective date: 19971217
|Nov 29, 2006||REMI||Maintenance fee reminder mailed|
|May 16, 2007||LAPS||Lapse for failure to pay maintenance fees|