|Publication number||US5682287 A|
|Application number||US 08/585,652|
|Publication date||Oct 28, 1997|
|Filing date||Jan 16, 1996|
|Priority date||May 20, 1994|
|Also published as||DE19517714A1|
|Publication number||08585652, 585652, US 5682287 A, US 5682287A, US-A-5682287, US5682287 A, US5682287A|
|Inventors||John Allen Pollman, Paul Hamilton Singer, Esteban Santos|
|Original Assignee||General Electric Company|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (5), Referenced by (10), Classifications (15), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This is a continuation-in-part of application Ser. No. 08/247,198 filed on May 20, 1994 now abandoned.
U.S. Pat. No. 4,672,501 entitled "Circuit Breaker and Protective Relay Unit" describes the use of a digital circuit interrupter employing a microprocessor in combination with ROM and RAM memory elements to provide both relaying as well as protection function to an electrical distribution system.
U.S. Pat. No. 4,833,563 entitled "Molded Case Circuit Breaker Actuator-Accessory Module" describes an integrated protection unit that includes basic overcurrent protection facility along with selective electrical accessories. A specific actuator-accessory module is selected to give the required accessory function along with basic overcurrent protection. This patent supplies a separate shunt trip signal directly to the actuator-accessory module without connection to the circuit breaker trip unit circuit.
In those arrangements wherein a plurality of electronic circuit breakers communicate within an electrical distribution system, it would be advantageous to announce the shunt trip operation of one of the circuit breakers to the other circuit breakers within the system. However, after a shunt trip operation, the circuit breaker trip unit no longer receives operational power from the electrical distribution system and hence loses ability to display or communicate the occurrence of the shunt trip operation to interrupt the circuit current.
The subject invention proposes a shunt trip interrupter module that interacts with the circuit breaker trip unit to provide shunt trip circuit interruption as well as to continue to supply operating power to the trip unit to allow the trip unit to communicate and display the shunt trip operation.
An integrated circuit breaker is described having shunt trip capability along with automatic overcurrent protection. An independent shunt trip module supplies a shunt trip voltage signal, hereafter "STVS" to the circuit breaker trip unit to interrupt circuit current and continues to apply the STVS to provide auxiliary power to the trip unit to allow the trip unit microprocessor to display and record the shunt trip operation.
FIG. 1 is a schematic representation of a digital circuit interrupter that includes the shunt trip module according to the invention;
FIG. 2 is an enlarged diagrammatic representation of the components within the shunt trip module of FIG. 1;
FIG. 3 is a schematic representation of the comparator circuit within the shunt trip module of FIG. 2; and
FIG. 4 is a schematic representation of pulse generator circuit within the shunt trip module of FIG. 2.
As described within the aforementioned U.S. Pat. No. 4,672,501 a circuit breaker controller 9 such as depicted in FIG. 1 is contained on a printed circuit card 10 to which external connection is made with current transformers 11-14 and potential transformers 15-17. The electrical input is transmitted through multiplexers 20 and sample and hold amplifiers 21,22 to an A/D converter 24 by means of conductor 23. Circuit protection and control is achieved by utilization of a data bus 25 which is interconnected with an output control 26, transceiver 27, and RAM 28. The ROM 29, microprocessor 30 and nonvolatile memory 31 operate in the manner described therein to insure complete overall circuit protection. The information as to the status of the circuit breaker contacts (not shown) that are controlled by the output control 26 is displayed on the display 58 that is similar to that described in U.S. Pat. No. 4,870,531 entitled "Circuit Breaker removable Display and Keyboard". Operating power to the printed circuit card 10 is supplied by the current transformers 11-14 from the associated electrical distribution system. In accordance with the invention, shunt trip facility is provided by connection of a shunt trip module 33 with the microprocessor 30, output control 26 and the trip unit power supply 37 by means of conductors 34, 35 and 36. For purposes of this disclosure, the term "shunt trip" is defined as the provision of a trip signal to the circuit breaker trip unit independent of the circuit breaker trip unit which otherwise determines a trip operation based on the occurance of an overcurrent condition. The shunt trip signal is often supplied by an operator remote from the circuit breaker location to either test the circuit breaker operating components or to electrically disconnect the associated electrical equipment for replacement or repair. Operating power to the trip unit power supply is provided by the current transformers 11-13 over conductor 38 when the associated electrical distribution system is operational. Upon the provision of a shunt trip signal, the circuit breaker trip unit is disconnected from the electrical distributiion circuit and hence, becomes inactive. To maintain operating power to the trip unit, in accordance with the invention, operating power is supplied by the shunt trip module to the trip unit circuit by continued application of the shunt trip voltage signal, hereafter "STVS" over input terminals 47, 48 to the output control circuit 26 after the associated electrical distribution circuit has been interrupted. The occurrence of the shunt trip interruption is transmitted to the microprocessor for storage and display.
The functional components of the shunt trip module 33 are depicted in FIG. 2. The STVS supplied to inputs 47, 48 is inputted to the comparator circuit 40 for evaluation within a comparator logic device generally depicted as 41 and thence over conductors 54, 55 to a conditioning circuit 60 which contains a pulse generator 42, transformer 43 and rectifier diode 44. The output from the conditioning circuit 60 is transmitted directly to the trip unit 10 over conductors 34, 36 and through an inverter 46 over conductor 35 as indicated. The function of the comparator logic is to insure that the STVS is an actual signal supplied by the operator and not a spurious voltage signal caused by a random electrical disturbance. The relevant electrical code requires that the STVS exceed fifty percent of the system voltage to insure that the STVS is intentional.
The comparator 40 is shown in FIG. 3 with inputs 47, 48 receiving a shunt trip signal and transmitting the signal from terminal 47 through the voltage dividing resistors R1, R2 to one input of the inverter 50 and to one input of the comparator 51 over conductor 63. The signal is also transmitted from terminal 47 to one terminal of the FET Q1 over conductor 52. The signal is transmitted from terminal 48 to a first zener diode Z1, that is anode-to-gate connected with Q1 over conductor 59. The other terminal of Q1 is connected to a storage capacitor C1 which supplies operational power over conductor 53 to the inverter 50 and the comparator 51.
The other inputs to the inverter and the comparator are connected in common through the voltage dividing resistors R3, R4 and conductor 58, as indicated. The STVS reference voltage is supplied to the inputs as determined by a second zener diode Z2 which is anode-to-ground connected as a voltage regulator. The values of the storage capacitor and the second zener diode are selected to set the reference value at roughly half the voltage existing on the operators electrical distribution system. Voltage hysteresis is provided between the inverter and the comparator to insure that a temporary decrease in the signal does not interrupt the trip process. The output from the inverter and the comparator are transmitted over conductors 62 and 54 to the conditioning circuit 60 which includes the pulse generator circuit 42, transformer 43 and rectifier 44 as shown in FIG. 2. The output signal from the conditioner circuit 60 is directly inputted to the power supply 37 within the trip unit 10 over conductors 34,36 and is inputted to the microprocessor 30 through the inverter 46 over conductor 35 and to the output control 26 also over conductor 35 as described earlier with reference to FIG. 1.
The output signal on conductor 54 as shown in FIG. 4 turns on switching transistor Q2 which is coupled to the gate of transistor Q3 by means of conductor 64. When Q2 turns on, Q3 turns on to enable current flow through a feed-back primary winding 67A on the core 57 of the dual primary transformer 43. The feed-back winding connects via conductor 61 with the COMP terminal of the pulse width modulation control unit 56 (PWM) which is a type 3843 supplied by Unitrode Co. The transformer 43 is a fly-back transformer which serves to increase the pulse frequency of the output signal from the comparator circuit up to 150 KC as well as to isolate the comparator circuit 40 of FIG. 2 from the trip unit circuit 10 shown in FIG. 1. The other primary winding 67B connects with the input 10 signal from the comparator circuit over conductor 65 and is coupled to ground by means of the filter capacitor C4 to remove any noise from the input signal prior to applying the signal to the primary winding 67B. The other terminal of the primary winding 67B connects back to the output terminal of the PWM control unit 56 through FET Q4 which is coupled to ground. The pulse frequency to the PWM unit is set by means of the timing circuit consisting of the capacitors C2, C3 which are interconnected by the timing resistor R5. The other input terminal 48 from the comparator circuit is connected to the GND terminal on the PWM unit by means of conductor 69. One side of the secondary winding 68 connects with the trip unit circuit through the rectifier diode 44 and the conductor 36. The same side of the secondary winding 68 connects with the trip unit circuit through the base drive resistor R5 of the inverter 46 which comprises an emitter-to-ground connected transistor Q5 and conductor 35. The other side of the secondary winding 68 connects with the trip unit circuit directly over conductor 34 which is coupled with conductor 36 by means of the filter capacitor C5.
The operation of the shunt trip module 33 can be best understood by referring collectively to the Figures wherein the STVS is impressed upon terminals 47, 48 and is compared to a reference value within the comparator circuit 40, as described earlier. The STVS is also examined to determine that the signal is an actual trip signal and not a spurious noise signal before transmitting to the conditioning circuit 60. The STVS is then increased to 100 KC within the pulse generator circuit 42 and is isolated from the trip unit circuit 10. The isolated STVS is then rectified by means of the rectifier 44 before transmitting to the power supply 37, microprocessor 30 and output control 26 within the trip unit circuit 10, for interrupting circuit current. The STVS is maintained to the trip unit circuit to provide operational power to the trip unit to allow the trip unit microprocessor to store and display the trip operation.
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|U.S. Classification||361/93.2, 361/87, 361/93.4, 361/98|
|International Classification||H01H83/20, H02H3/04, H02H1/00, H02H1/06|
|Cooperative Classification||H02H1/06, H01H83/20, H01H2083/203, H02H1/0061, H02H3/04|
|European Classification||H02H1/00E, H02H1/06|
|May 22, 2001||REMI||Maintenance fee reminder mailed|
|Oct 29, 2001||LAPS||Lapse for failure to pay maintenance fees|
|Jan 1, 2002||FP||Expired due to failure to pay maintenance fee|
Effective date: 20011028