|Publication number||US5757919 A|
|Application number||US 08/764,154|
|Publication date||May 26, 1998|
|Filing date||Dec 12, 1996|
|Priority date||Dec 12, 1996|
|Also published as||DE19782169C2, DE19782169T0, DE19782169T1, WO1998026535A1|
|Publication number||08764154, 764154, US 5757919 A, US 5757919A, US-A-5757919, US5757919 A, US5757919A|
|Inventors||Howard C. Herbert, Derek L. Davis|
|Original Assignee||Intel Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (2), Non-Patent Citations (6), Referenced by (253), Classifications (37), Legal Events (4) |
|External Links: USPTO, USPTO Assignment, Espacenet|
Cryptographically protected paging subsystem
US 5757919 A
A method and system for maintaining integrity and confidentiality of pages paged to an external storage unit from a physically secure environment. An outgoing page is selected to be exported from a physically secure environment to an insecure environment. An integrity check value is generated and stored for the outgoing page. In one embodiment, this takes the form of taking a one-way hash of the page using a well-known one-way hash function. The outgoing page is then encrypted using a cryptographically strong encryption algorithm. Among the algorithms that might be used in one embodiment of the invention are IDEA and DES. The encrypted outgoing page is then exported to the external storage. By virtue of the encryption and integrity check, the security of the data on the outgoing page is maintained in the insecure environment.
What is claimed is:
1. A method comprising the steps of:
generating an integrity check value for an outgoing page within a physically secure environment, the physically secure environment containing a processor and a memory;
nstoring the integrity check value for the outgoing page;
encrypting the outgoing page resulting in an encrypted page; and
exporting the encrypted page to a storage unit outside the secure execution environment.
2. The method of claim 1 further comprising the steps of:
importing an encrypted incoming page from a storage unit outside the secure execution environment;
decrypting the incoming page;
calculating an integrity check value for the incoming page; and
comparing the integrity check value of the incoming page with a previously stored integrity check value corresponding to the incoming page.
3. The method of claim 1 wherein the encrypted page is encrypted using a symmetric encryption algorithm.
4. The method of claim 3 further comprising the step of:
retrieving a random key for use in the encrypting step.
5. The method of claim 4 wherein every page related to a single application is encrypted using a same key.
6. The method of claim 4 wherein a different key is generated for every outgoing page.
7. The method of claim 4 further comprising the step of:
storing the key in a table in the secure memory.
8. The method of claim 1 wherein the step of generating comprises the steps of:
one way hashing the outgoing page; and
storing a predetermined portion of a hash value of the outgoing page in a location within the physically secure environment.
9. The method of claim 8 wherein the location is pointed to by a pointer in a field of a page table entry corresponding to the outgoing page.
10. The method of claim 8 wherein the predetermined portion is the whole hash value.
11. A system for maintaining security in a paging subsystem comprising:
a secure processor coupled to a secure memory within a physically secure environment;
an insecure storage unit in an insecure environment outside the physically secure environment and coupled to the physically secure environment by the bus;
an interface within the physically secure environment and coupled between the bus and the secure processor, the interface encrypting and generating an integrity check value for a page exported to the insecure storaged unit, the interface decrypting and integrity checking the page when the page is imported back into the physically secure environment; and
a page table exportable from the secure memory, the page table storing one of the integrity check value and a pointer to the integrity check value.
12. The system of claim 11 wherein the interface comprises:
an integrity check engine; and
an encryption engine coupled to the integrity check engine.
13. The system of claim 12 wherein a portion of the secure memory stores a predetermined portion of a one-way hash value of an outgoing page generated by the integrity check engine responsive to the export of the outgoing page.
14. The system of claim 12 wherein the interface further comprises:
a random number generator coupled to the bus to generate an encryption key.
15. The system of claim 14 further comprising:
a key storage area storing a key corresponding to each page that has been exported from the interface.
16. The system of claim 12 wherein the encryption engine implements a symmetric bulk encryption algorithm.
17. The system of claim 12 wherein the encryption engine is a symmetric encryption engine.
18. The system of claim 17 wherein the interface further comprises an asymmetric encryption engine.
19. The system of claim 12 wherein the secure environment resides on a single chip.
20. The system of claim 11 further comprising:
an insecure host processor coupled to the bus.
21. A method of introducing a software for use in a secure environment comprising the steps of:
generating an encryption key;
reading into the secure environment a page from the software to be introduced;
hashing the page to generate an integrity check value;
encrypting the page using the encryption key; and
exporting the page as encrypted to an external storage unit in an insecure environment.
22. The method of claim 21 further comprising the steps of:
verifying thet a valid digital signature exists on the software; and
invalidating the introduction if no valid digital signature exists.
23. The method of claim 22 wherein the step of verifying comprises:
maintaining a first overall hash of the software as the software is introduced;
decrypting a second overall hash encrypted by a software originator using a public key and an asymmetric algorithm; and
comparing the first overall hash to the second overall hash.
24. A method of insuring integrity of a page paging between a physically secure environment and an insecure environment comprising the steps of:
generating an outgoing integrity check value for an outgoing page;
storing an outgoing integrity check value for the outgoing page generating an incoming integrity check value when the page is paged in; and
comparing the outgoing integrity check value with the incoming integrity check value.
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to data protection in an insecure environment. More specifically, the invention relates to handling memory resource exhaustion within a secure environment without jeopardizing the security of the data and programs used therein.
(2) Related Art
Resource exhaustion and particularly memory exhaustion is a common problem in computer systems. The random access memory (RAM) from which programs can be executed is necessarily limited both by cost and space. External memory devices such as hard disk drives, magnetic tape, and so forth are used to hold programs and data not currently being accessed by the processor. Virtual memory uses these external memory devices to ameliorate the physical memory constraints of the RAM and create the appearance that adequate space is available in the RAM to hold all the currently needed code and data. Virtual memory has a hierarchical structure based on a page directory, page tables, and page frames. A page frame contains a block of usable code or data. The size of the block is determined by design considerations. One common page frame size in existing systems is four kilobytes. Thus, the minimum size blocks that can be moved in from external memory to RAM in such a system is a 4K block. The page table holds the base addresses of a number of page frames. A page table is the same size as a page frame and can similarly be paged out to external memory.
The page directory is similar to the page table except that it holds the base address of a number of page tables. Typically, it is retained in internal memory and not paged out. The base address of the page directory is held in an internal CPU control register. Functioning of paging systems is generally well understood in the art.
It is also possible to create a physically secure environment. For example, one draconian method of creating a physically secure environment might be placing the CPU and its RAM in a safe with wires running out of the safe to an external storage unit. While this creates a secure environment within the safe, data paged out to the external memory is readily compromised. Moreover, the resource exhaustion issues are exacerbated in the secure environment model because both cost and space concerns escalate to maintain a physically secure environment, e.g. need a bigger safe.
In view of the foregoing, it would be desirable to be able to insure reasonable security from substitution and modification attacks of programs and data beyond the memory capacity of a secure environment.
BRIEF SUMMARY OF THE INVENTION
A method and system for maintaining integrity and confidentiality of pages paged to an external storage unit from a physically secure environment is disclosed. An outgoing page is selected to be exported from a physically secure environment to an insecure environment. An integrity check value is generated and stored for the outgoing page. In one embodiment, this takes the form of taking a one-way hash of the page using a well-known one-way hash function. The outgoing page is then encrypted using a cryptographically strong encryption algorithm. Among the algorithms that might be used in one embodiment of the invention are IDEA and DES. The encrypted outgoing page is then exported to the external storage. By virtue of the encryption and integrity check, the security of the data on the outgoing page is maintained in the insecure environment.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of a system of one embodiment of the invention.
FIG. 2 is a block diagram of an alternate embodiment of the invention.
FIG. 3 is a flowchart of a software installation in one embodiment of the invention.
FIG. 4a is a diagram of software installed for use in the secure environment of one embodiment of the invention.
FIG. 4b is a diagram of page directory/page table entry of one embodiment of the invention.
FIGS. 5a and b is a flowchart of a paging operation in one embodiment of the invention after installation is complete.
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows one embodiment of the invention in which a physically secure environment 1 is coupled to an insecure environment 2, and particularly, an external storage unit 4 by a bus 7. Various ways of creating this physical barrier are generally well-known in the art, among them, tamper-resistant packaging materials, tamper-resistant die coatings, and tamper-resistant wafer coatings. Other ways to maintain physical security are also being developed. Two such examples are described in co-pending patent applications Ser. No. 08/575,298 titled: SECURE SEMICONDUCTOR DEVICE, and Ser. No. 08/412,159 titled: METHOD TO PREVENT INTRUSIONS INTO ELECTRONIC CIRCUITRY, field Mar. 28, 1995, now abandoned, both assigned to the assignee of the instant application.
This physically secure environment 1 contains a processor 16 coupled by a bus 17 to a random access memory (RAM) 14. Bus 17 is electrically isolated from bus 7 by bus interface unit 19 which may be, for example, a bridge unit, and must be within the secure environment. As shown in FIG. 1, an optional flash memory 15 may be provided and coupled to bus 17. The flash memory is used for long-term storage of secret information, and a portion thereof may be allocated to applications running in the secure environment Additionally, in one embodiment, the real time kernel for secure processor 16 is stored in the flash memory. This allows all basic operations to be performed without external intervention (active or passive), and improves performance as compared to moving the kernel through the security services described herein.
The secure environment is also provided with data security services. In that connection, an integrity check engine 13 performs a one-way hash of data paging between the secure environment 1 and the insecure environment 2. This provides an integrity service as explained below. If the data is paging out of the secure environment 1, the one-way hash value from the integrity check engine 13 or some portion thereof is stored within the secure environment as an integrity check value (ICV) for later comparison when that page of data is subsequently paged back in. An encryption/decryption engine 12 encrypts outgoing pages and decrypts incoming pages at the interface before sending them to the external storage 4 or integrity check engine 13, respectively, thereby providing a confidentiality service. A random number generator 18 is coupled to bus 17 to generate keying material for the encryption engine 12. An incoming page is decrypted by encryption engine 12 and passed to the integrity check engine 13 which calculates a one-way hash value of the incoming page. From the hash value, an ICV is derived and compared with previously stored ICV corresponding to that page. If the ICVs match, the page is allowed to populate secure RAM 14.
Because paging in and paging out generally involve latency and the security services increase the latency in the event of a page fault, it is desirable that the encryption engine 12 and integrity check engine 13 be implemented as dedicated hardware. But, it is within the scope and contemplation of the invention that either or both engines may be implemented as software. Additionally, for performance reasons, it is preferable that the encryption engine implement symmetric encryption. Keys for symmetric encryption tend to be much shorter for the same level of security than are keys for asymmetric encryption (e.g., a typical symmetric key is on the order of 56 bits to 128 bits while asymmetric keys tends to be more than 512 bits). This is particularly important in a severely memory constrained environment in which storage space for the keys is limited. Symmetric encryption is also typically orders of magnitude faster than asymmetric encryption. Two such symmetric encryption schemes are IDEA and DES. Other cryptographically strong encryption algorithms could equally be used without departing from the scope and contemplation of the invention. One-way hash functions are generally well-known in the art. Two acceptable such hash functions are SHA-1 and MD5, but other hash functions could also be used without departing from the scope and contemplation of the invention.
FIG. 2 shows an alternative embodiment of the invention having additional services within the secure environment 20. In this embodiment, the secure environment 20 is implemented as a single chip using physical security technology as is known in the art. This physically secure chip resides on the motherboard 30 and shares bus 7 with a host processor 26 and a host RAM 25. Bus interface unit 19 electrically isolates the secure environment bus 17 from the system bus 7. Both processor 16 and host processor 26 page out page frames to external storage unit 4 which may be, e.g., a personal computer hard disk. In one embodiment, secure processor 16 pages in 1K increments, while host processor 26 pages in 4K increments. Because the secure RAM 14 is small (e.g., 128K), it is desirable to employ a smaller page size than is typically employed when memory exhaustion is not as great a problem. To that end, a 1K page size has been found desirable in the secure environment 20. Accordingly, processor 16 is architected to use a 1K page. Host processor 26 treats the pages of processor 16 stored in external memory 4 as 1K data blocks.
The secure environment 20 contains both an asymmetric encryption engine 22 and a symmetric encryption engine 23, coupled to bus 17. As mentioned above, bus interface unit 19 resides within the secure environment and electrically isolates bus 17 from system bus 7 which extends into the unsecure environment Symmetric engine 23 continues to be the preferred provider of the confidentiality service. The asymmetric engine 22 is used during installation to verify digital signatures and generally make the secure environment more robust. Installation is discussed below. It is important to realize that the secure environment 1 of FIG. 1 and 20 of FIG. 2 are interchangeable between the embodiments.
In one embodiment, the encryption engine performs encryption eight bytes at a time, and the integrity check engine hashes 512 bytes at a time. In such an embodiment, FIFOs or some other conventional buffering is provided as part of the encryption engine to ensure correct data flow. Determination of the amount and type of buffering required is within the ability of one of ordinary skill in the art given the data flow rates of the respective engines.
At some time, software must be installed in the secure environment. Such "off the shelf" software will, of course, not be encrypted in the manner used within the secure environment. It will typically have a digital signature which can be used to verify the authenticity of the software being installed if digital signature verification is a supported function within the secure environment. FIG. 3 shows a flowchart of installation of a program in the secure system. At functional block 120, a key is generated and initialization vector is generated for an application to be installed. Key generation can be accomplished using the random number generator which generates random bits. Random bits are collected until the desired key length is reached. In one embodiment, the random number generator has a thirty-two bit output register. The processor 16 reads the register a number of times necessary to collect enough random bits for a full key. Keys can be generated with one key for each application, i.e. all code pages and data pages associated with one application share the same key. One concern with shared keys between pages is that if, for example, two data pages have identical content, they would generally encrypt to the same encrypted value. However, in addition to the key, an initialization vector (IV) effects the encryption result: IVs are commonly used to provide cryptographic synchronization. Modifying this IV like modifying the key will change the resulting encrypted value. Because this system is effectively sending messages to itself, it can have a secret IV for the encryption engine. With a secret IV and using, for example, the page number as an offset, different encrypted data is assured for each page. Alternatively, a separate key could be generated for each page. This will increase the memory required to be devoted to key storage, but may improve the security of the data as the strength of the encryption resides in the key and the smaller the sample of data encrypted under one key, the tougher the data is to cryptanalyze.
At functional block 121, a page of information is retrieved from the installation disk. Bus 7 of FIG. 1 or FIG. 2 would be coupled to, e.g., a disk drive (not shown) containing such installation disk or other sources such as the Internet. At functional block 122, the incoming page would be hashed and an ICV generated therefrom and stored. The system needs to generate a hash value for each page as well as an overall hash value for the software being installed. After the page is hashed and the resulting ICV generated, at functional block 123, an entry is added to a page table. A page table entry will contain a page location identifier to allow the page to be located in external storage and may also contain a software pointer to the ICV corresponding to that page. This is discussed below in connection with FIG. 4b. This presumes a previously created page table. Creation of page tables is generally well known in the art Two options for allocating page frames to a page table are discussed below.
Once a key is generated and provided to the encryption engine, the engine encrypts the previously hashed page at function block 124. The page that is encrypted in functional block 124 is exported to the external storage unit 4 at functional block 125. In this way, the page being installed does not reside in the secure RAM 14 until paged in after installation is complete. At decision block 126, it is determined whether the last page has been retrieved from the install disk or other source. If not, the installation continues by returning to retrieve another page at functional block 120. If it has retrieved the last page, decision block 127 represents an implicit decision depending on whether the system requires verification of digital signatures. If it does require such verification, at functional block 128, the digital signature is decrypted using the asymmetric engine with the resulting overall hash value generated by the originator of the software being extracted and compared to the overall hash value just calculated to verify that a valid digital signature exists for the installed software. A digital signature is typically a one-way hash of the entire code on the installation disk encrypted using the private part of an asymmetric key. For verification purposes, the asymmetric engine allows this signature to be decrypted using the public part of an asymmetric key. In decision block 129, if the signature is authentic, the installation is deemed complete at functional block 132. If the signature is not authentic, at functional block 131, the installation is rejected, and at functional block 132, the allocated external storage space is freed for other use. A system or user may choose, as a policy matter, not to require all software to have a signature for installation. Thus, in such a system, attempts to install software would be presumed valid, and installation is deemed complete at functional block 130, following decision block 127.
One embodiment of the invention employs a paging hierarchy in which the page directory always resides in the secure RAM 14 and a page table is associated with each application. The page table could be paged out when the application is not in use. For example, upon verification of the digital signature, the page table could itself be paged out just like any other page. The paging out process is discussed further in connection with FIG. 5 below.
In an alternate embodiment, both the page directory and the page tables (for the entire virtual memory size) are retained in the secure RAM. Thus, on installation, the pages are mapped into those page tables (e.g., more than one application may share one page table) before being exported to external storage. This reduces latency at start up of an application because only the needed page frames must traverse the security services, whereas in the other embodiment, first the page table must be paged in before the needed page frame can be identified and paged in. However, memory constraints may preclude this embodiment It is also within the scope and contemplation of the invention to have multiple applications share a single page table which can be paged out However, this complicates assignment of encryption keys (unless each page is assigned a key rather than each application) and may require retrieval of such page table from external memory at the time of installation of the second and any subsequent applications sharing the page table.
FIG. 4a shows one example in which four pieces of software 140, 150, 160, 170 (software is envisioned to include both code and data pages) have been installed through the secure environment and stored in the external storage unit 4 which may be a PC host hard disk. Three of the four pieces of software 140, 160, 170 have active pages in the physically secure memory. In one embodiment, the active pages will represent a page table and one or more page frames for each piece of software. For example, software 140 has page table 141 and page frames 142-144 residing in secure memory. Similarly, software 160 and 170 have page tables 161, 171 and page frames 162, 172, respectively, active in the secure RAM. Conversely, software 150 has its page table and all its page frames paged out to the external storage unit 4.
FIG. 4b shows a format of page directory and page table entry where the page table or page frame corresponding to the entry is present 200 or not present 201, respectively. The page directory entry corresponding to software 150 in FIG. 4a would have the not present form 201 assuming page tables are paged out rather than retained in memory. In any event, all the page table entries of software 150 would have the not present form 201. Thus, while the bit indicating the page is not present is retained, the remaining 31 bits can be arbitrarily divided between a page location identifier and a software pointer to an integrity check value. Various implementations of page location identifiers are well-known in the art as locating pages that have been paged out is required even in an insecure system. Possible implementations include the portion of the address or some indexing to a table of addresses. The fewer bits used as the page location identifier, the more bits are available for the software pointer to the ICV. Thus, in a memory constrained system, there is a trade-off between allotment of bits between these functions.
Other implementations are possible in which less than the whole hash value is used as the ICV. However, such implementations reduce the security provided by the integrity check service. In one such example, the hash value is truncated to produce an ICV which will fill in the page table entry with the page location identifier. While this may help solve memory exhaustion problems by not requiring separate secure memory pages be allocated to ICV storage, it is not recommended where any serious threat to integrity is believed to exist
FIGS. 5a and b show a flowchart of one embodiment of the paging operation in a secure environment after installation. At functional block 50, a page is identified as needed. At decision block 51, a determination is made if the page is present within the secure memory. If the page is present, a page hit occurs and no further action is required. If the page is not present, a page fault occurs. When a page fault occurs, a determination is made, at decision block 52, if there is space available in the secure memory to which the needed page can be mapped. If no space is available, then a page is selected to page out at functional block 53. Various selection criteria may be employed such as least recently used (LRU). Other selection criteria are also well-known in the art. At decision block 54, a determination is made as to whether the outgoing page has been modified. If it has, at functional block 55, an integrity check value is calculated for the outgoing page. Typically, this will involve calculating the one-way hash value of the outgoing page and using the hash value as the ICV (less than the whole hash value may be used, but such reduces the reliability of the integrity service). At functional block 56, the integrity check value is stored in a predetermined location. This location can take the form of a data structure separately established to hold hash values with a pointer into that data structure stored in the page table or page directory entry corresponding to the outgoing page. The date structure may reside in the secure RAM and may be subject to paging out as discussed below.
At functional block 57, an encryption key and an IV are retrieved. As discussed above, the encryption key and IV are generated at the time of installation. At functional block 58, the outgoing page is encrypted using the key retrieved in functional block 57 and an initialization vector that may be offset by some value to ensure unique encryption. At functional block 59, the encrypted page is exported to the external storage.
If at decision block 54 the outgoing page has not been modified, or after the export of the outgoing page is complete at functional block 59, the system is enabled to overwrite the portion of secure memory occupied by the outgoing page. If at decision block 52 the secure memory has space or after the overwrite is enabled, the page location identifier of the desired page is retrieved through the corresponding entry in the page directory or page table at functional block 61. The key and IV corresponding to the needed page is retrieved from key and IV storage at functional block 62. Keys and IV may, but need not, be stored in the same data structure. A request for that page is then sent to the external storage unit at functional block 63. The key and IV are used to decrypt the incoming page at functional block 64. The decrypted page is hashed and an ICV determined at functional block 65. The ICV of the incoming page is compared with the previously stored ICV at decision block 66. If the ICV of the incoming page is equal to the ICV stored corresponding to that page when it was previously exported, either during installation or after previous use, the page is placed in secure memory, and execution or operation on that page may be performed by the processor at functional block 67. If the ICVs do not match, the page is discarded at functional block 68, and a data corrupt message is sent to the secure processor at functional block 69.
In one embodiment, particularly if secure RAM space is severely constrained, additional levels of indirection may be used to handle memory exhaustion. For example, pages containing keying information could themselves be hashed, encrypted (with their own randomly generated key and IV) and exported to external memory. In this embodiment, latency at start-up is increased because the keying information must first be retrieved, decrypted, integrity checked and the desired key and IV identified before the page table and/or page frames may be paged in. The advantage to this system is that storage of keying material does not become a critical limitation. It is desirable to generate a separate key and IV for such pages, e.g., do not use a key and IV associated with a particular application. Similarly, pages holding ICVs may be paged out. Thus, several levels of indirection may be employed at the cost of increased start-up latency.
In some embodiments, it may become desirable to update or change the keying material. The period during which one key is retained is the cryptoperiod. The cryptoperiod may be fixed or under user control. In either case, when an update is desired/occurs, the system performs similar to the install procedure. The page table must, if paged out, be brought into the secure RAM before its pages can be re-keyed. Rather than coming from the install disk to be claimed from the bus by the integrity check engine, each page frame is paged in from the external storage unit, decrypted and integrity checked in the normal way. Then the page frame is reencrypted with a new key and IV (either or both of which may be generated on an application or page by page basis) and exported back to external storage. It is unnecessary for the page frames to populate the secure RAM during this update.
In the foregoing specification, the invention has been described with reference to specific embodiments thereof. It will however be evident that various modifications and changes can be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. Therefore, the scope of the invention should be limited only by the appended claims.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US5007083 *||Jan 16, 1985||Apr 9, 1991||Constant James N||Secure computer|
|US5343527 *||Oct 27, 1993||Aug 30, 1994||International Business Machines Corporation||Hybrid encryption method and system for protecting reusable software components|
|1||"VMS320--High Speed PCMCIA Security Token Cryptographic Engine," VLSI Technology, Inc., 1997.|
|2||B. Yee, "Using Secure Coprocessors," School of Computer Science, Carnegie Mellon University, May 1994.|
|3|| *||B. Yee, Using Secure Coprocessors, School of Computer Science, Carnegie Mellon University, May 1994.|
|4||E. Palmer, "An Introduction to Citadel--A Secure Crypto Coprocessor for Workstations," IBM Thomas J. Watson Research Center, Version 1.00, Sep. 30, 1992.|
|5|| *||E. Palmer, An Introduction to Citadel A Secure Crypto Coprocessor for Workstations, IBM Thomas J. Watson Research Center, Version 1.00, Sep. 30, 1992.|
|6|| *||VMS320 High Speed PCMCIA Security Token Cryptographic Engine, VLSI Technology, Inc., 1997.|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US6021201 *||Jan 7, 1997||Feb 1, 2000||Intel Corporation||Method and apparatus for integrated ciphering and hashing|
|US6098170 *||Feb 11, 1998||Aug 1, 2000||At&T Corporation||System and method for using a second resource to store a data element from a first resource in a first-in first-out queue|
|US6101603 *||Feb 11, 1998||Aug 8, 2000||At&T Corporation||System and method for using a second resource to store a data element from a first resource in a first-in last-out stack|
|US6237094||Jun 28, 2000||May 22, 2001||At&T Corporation||System and method for using a second resource to store a data element from a first resource in a first-in first-out queue|
|US6249871||Jun 28, 2000||Jun 19, 2001||At&T Corporation||System and method for using a second resource to store a data element from a first resource in a first-in last-out stack|
|US6289455||Sep 2, 1999||Sep 11, 2001||Crypotography Research, Inc.||Method and apparatus for preventing piracy of digital content|
|US6357004||Sep 30, 1997||Mar 12, 2002||Intel Corporation||System and method for ensuring integrity throughout post-processing|
|US6405316 *||Jul 28, 2000||Jun 11, 2002||Network Commerce, Inc.||Method and system for injecting new code into existing application code|
|US6523118 *||Jun 29, 1998||Feb 18, 2003||Koninklijke Philips Electronics N.V.||Secure cache for instruction and data protection|
|US6542610||Aug 11, 1997||Apr 1, 2003||Intel Corporation||Content protection for digital transmission systems|
|US6629150||Jun 18, 1999||Sep 30, 2003||Intel Corporation||Platform and method for creating and using a digital container|
|US6629244||Nov 16, 2001||Sep 30, 2003||Intel Corporation||Platform and method for assuring integrity of trusted agent communications|
|US6633963||Jul 18, 2000||Oct 14, 2003||Intel Corporation||Controlling access to multiple memory zones in an isolated execution environment|
|US6640305||Sep 6, 2001||Oct 28, 2003||Cryptography Research, Inc.||Digital content protection method and apparatus|
|US6678825 *||Jul 18, 2000||Jan 13, 2004||Intel Corporation||Controlling access to multiple isolated memories in an isolated execution environment|
|US6715085||Apr 18, 2002||Mar 30, 2004||International Business Machines Corporation||Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function|
|US6754815||Jul 18, 2000||Jun 22, 2004||Intel Corporation||Method and system for scrubbing an isolated area of memory after reset of a processor operating in isolated execution mode if a cleanup flag is set|
|US6757824||Dec 10, 1999||Jun 29, 2004||Microsoft Corporation||Client-side boot domains and boot rules|
|US6760441||Mar 31, 2000||Jul 6, 2004||Intel Corporation||Generating a key hieararchy for use in an isolated execution environment|
|US6769058||Dec 29, 2000||Jul 27, 2004||Intel Corporation||Resetting a processor in an isolated execution environment|
|US6778667 *||Dec 30, 1999||Aug 17, 2004||Intel Corporation||Method and apparatus for integrated ciphering and hashing|
|US6789156 *||Jul 25, 2001||Sep 7, 2004||Vmware, Inc.||Content-based, transparent sharing of memory units|
|US6795905||Sep 29, 2000||Sep 21, 2004||Intel Corporation||Controlling accesses to isolated memory using a memory controller for isolated execution|
|US6820063||Jan 8, 1999||Nov 16, 2004||Microsoft Corporation||Controlling access to content based on certificates and access predicates|
|US6820177||Jun 12, 2002||Nov 16, 2004||Intel Corporation||Protected configuration space in a protected environment|
|US6851056||Apr 18, 2002||Feb 1, 2005||International Business Machines Corporation||Control function employing a requesting master id and a data address to qualify data access within an integrated system|
|US6907600||Dec 27, 2000||Jun 14, 2005||Intel Corporation||Virtual translation lookaside buffer|
|US6910094||Nov 5, 1998||Jun 21, 2005||Koninklijke Philips Electronics N.V.||Secure memory management unit which uses multiple cryptographic algorithms|
|US6934817||Oct 10, 2003||Aug 23, 2005||Intel Corporation||Controlling access to multiple memory zones in an isolated execution environment|
|US6938164||Nov 22, 2000||Aug 30, 2005||Microsoft Corporation||Method and system for allowing code to be securely initialized in a computer|
|US6941458 *||Sep 22, 2000||Sep 6, 2005||Intel Corporation||Managing a secure platform using a hierarchical executive architecture in isolated execution mode|
|US6948065||Dec 27, 2000||Sep 20, 2005||Intel Corporation||Platform and method for securely transmitting an authorization secret|
|US6957332||Mar 31, 2000||Oct 18, 2005||Intel Corporation||Managing a secure platform using a hierarchical executive architecture in isolated execution mode|
|US6957335||Oct 22, 2003||Oct 18, 2005||International Business Machines Corporation||Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function|
|US6978365||Dec 16, 2004||Dec 20, 2005||Microsoft Corporation||Client-side boot domains and boot rules|
|US6990579||Mar 31, 2000||Jan 24, 2006||Intel Corporation||Platform and method for remote attestation of a platform|
|US6996710||Mar 31, 2000||Feb 7, 2006||Intel Corporation||Platform and method for issuing and certifying a hardware-protected attestation key|
|US6996748||Jun 29, 2002||Feb 7, 2006||Intel Corporation||Handling faults associated with operation of guest software in the virtual-machine architecture|
|US7010684||Jul 14, 2003||Mar 7, 2006||Microsoft Corporation||Method and apparatus for authenticating an open system application to a portable IC device|
|US7013481||Mar 31, 2000||Mar 14, 2006||Intel Corporation||Attestation key memory device and bus|
|US7013484||Mar 31, 2000||Mar 14, 2006||Intel Corporation||Managing a secure environment using a chipset in isolated execution mode|
|US7020738||Sep 30, 2003||Mar 28, 2006||Intel Corporation||Method for resolving address space conflicts between a virtual machine monitor and a guest operating system|
|US7020772||Sep 22, 2003||Mar 28, 2006||Microsoft Corporation||Secure execution of program code|
|US7024555||Nov 1, 2001||Apr 4, 2006||Intel Corporation||Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment|
|US7028149||Mar 29, 2002||Apr 11, 2006||Intel Corporation||System and method for resetting a platform configuration register|
|US7035963||Dec 27, 2000||Apr 25, 2006||Intel Corporation||Method for resolving address space conflicts between a virtual machine monitor and a guest operating system|
|US7039816||Oct 27, 2003||May 2, 2006||Cryptography Research, Inc.||Using smartcards or other cryptographic modules for enabling connected devices to access encrypted audio and visual content|
|US7058807||Apr 15, 2002||Jun 6, 2006||Intel Corporation||Validation of inclusion of a platform within a data center|
|US7069442||Mar 29, 2002||Jun 27, 2006||Intel Corporation||System and method for execution of a secured environment initialization instruction|
|US7073042||Dec 12, 2002||Jul 4, 2006||Intel Corporation||Reclaiming existing fields in address translation data structures to extend control over memory accesses|
|US7073071||Mar 31, 2000||Jul 4, 2006||Intel Corporation||Platform and method for generating and utilizing a protected audit log|
|US7076669||Apr 15, 2002||Jul 11, 2006||Intel Corporation||Method and apparatus for communicating securely with a token|
|US7082615||Sep 22, 2000||Jul 25, 2006||Intel Corporation||Protecting software environment in isolated execution|
|US7085935||Sep 22, 2000||Aug 1, 2006||Intel Corporation||Managing a secure environment using a chipset in isolated execution mode|
|US7089418||Mar 31, 2000||Aug 8, 2006||Intel Corporation||Managing accesses in a processor for isolated execution|
|US7089419||Apr 18, 2002||Aug 8, 2006||International Business Machines Corporation||Control function with multiple security states for facilitating secure operation of an integrated system|
|US7096497||Mar 30, 2001||Aug 22, 2006||Intel Corporation||File checking using remote signing authority via a network|
|US7103771||Dec 17, 2001||Sep 5, 2006||Intel Corporation||Connecting a virtual token to a physical token|
|US7107463||Aug 18, 2005||Sep 12, 2006||Microsoft Corporation||Manifest-based trusted agent management in a trusted operating system environment|
|US7111176||Mar 31, 2000||Sep 19, 2006||Intel Corporation||Generating isolated bus cycles for isolated execution|
|US7117376||Dec 28, 2000||Oct 3, 2006||Intel Corporation||Platform and method of creating a secure boot that enforces proper user authentication and enforces hardware configurations|
|US7124327||Jun 29, 2002||Oct 17, 2006||Intel Corporation||Control over faults occurring during the operation of guest software in the virtual-machine architecture|
|US7127548||Apr 16, 2002||Oct 24, 2006||Intel Corporation||Control register access virtualization performance improvement in the virtual-machine architecture|
|US7137004||Nov 16, 2001||Nov 14, 2006||Microsoft Corporation||Manifest-based trusted agent management in a trusted operating system environment|
|US7139890||Apr 30, 2002||Nov 21, 2006||Intel Corporation||Methods and arrangements to interface memory|
|US7139915||Oct 19, 2005||Nov 21, 2006||Microsoft Corporation||Method and apparatus for authenticating an open system application to a portable IC device|
|US7142674||Jun 18, 2002||Nov 28, 2006||Intel Corporation||Method of confirming a secure key exchange|
|US7149901 *||Jan 29, 2004||Dec 12, 2006||Intel Corporation||Cryptographically protected paging system|
|US7159240||Nov 16, 2001||Jan 2, 2007||Microsoft Corporation||Operating system upgrades in a trusted operating system environment|
|US7165181||Nov 27, 2002||Jan 16, 2007||Intel Corporation||System and method for establishing trust without revealing identity|
|US7174457||Mar 10, 1999||Feb 6, 2007||Microsoft Corporation||System and method for authenticating an operating system to a central processing unit, providing the CPU/OS with secure storage, and authenticating the CPU/OS to a third party|
|US7177967||Sep 30, 2003||Feb 13, 2007||Intel Corporation||Chipset support for managing hardware interrupts in a virtual machine system|
|US7191440||Aug 15, 2001||Mar 13, 2007||Intel Corporation||Tracking operating system process and thread execution and virtual machine execution in hardware or in a virtual machine monitor|
|US7194092 *||Jan 8, 1999||Mar 20, 2007||Microsoft Corporation||Key-based secure storage|
|US7194634||Feb 26, 2001||Mar 20, 2007||Intel Corporation||Attestation key memory device and bus|
|US7215781||Dec 22, 2000||May 8, 2007||Intel Corporation||Creation and distribution of a secret value between two devices|
|US7225441||Dec 27, 2000||May 29, 2007||Intel Corporation||Mechanism for providing power management through virtualization|
|US7237051||Sep 30, 2003||Jun 26, 2007||Intel Corporation||Mechanism to control hardware interrupt acknowledgement in a virtual machine system|
|US7243226 *||Dec 11, 2002||Jul 10, 2007||Valve Corporation||Method and system for enabling content security in a distributed system|
|US7243230||Nov 16, 2001||Jul 10, 2007||Microsoft Corporation||Transferring application secrets in a trusted operating system environment|
|US7246242||May 11, 2000||Jul 17, 2007||Nokia Corporation||Integrity protection method for radio network signaling|
|US7257707||Aug 18, 2005||Aug 14, 2007||Microsoft Corporation||Manifest-based trusted agent management in a trusted operating system environment|
|US7266690||Jul 26, 2005||Sep 4, 2007||Microsoft Corporation||Methods and systems for protecting information in paging operating systems|
|US7266842||Apr 18, 2002||Sep 4, 2007||International Business Machines Corporation||Control function implementing selective transparent data authentication within an integrated system|
|US7272832 *||Oct 25, 2001||Sep 18, 2007||Hewlett-Packard Development Company, L.P.||Method of protecting user process data in a secure platform inaccessible to the operating system and other tasks on top of the secure platform|
|US7287197||Sep 15, 2003||Oct 23, 2007||Intel Corporation||Vectoring an interrupt or exception upon resuming operation of a virtual machine|
|US7290040||Dec 11, 2002||Oct 30, 2007||Valve Corporation||Method and system for load balancing an authentication system|
|US7293173||Jul 26, 2005||Nov 6, 2007||Microsoft Corporation||Methods and systems for protecting information in paging operating systems|
|US7296267||Jul 12, 2002||Nov 13, 2007||Intel Corporation||System and method for binding virtual machines to hardware contexts|
|US7302511||Oct 13, 2005||Nov 27, 2007||Intel Corporation||Chipset support for managing hardware interrupts in a virtual machine system|
|US7302709||Sep 7, 2005||Nov 27, 2007||Microsoft Corporation||Key-based secure storage|
|US7305553||Aug 18, 2005||Dec 4, 2007||Microsoft Corporation||Manifest-based trusted agent management in a trusted operating system environment|
|US7305592||Jun 30, 2004||Dec 4, 2007||Intel Corporation||Support for nested fault in a virtual machine environment|
|US7308576||Dec 31, 2001||Dec 11, 2007||Intel Corporation||Authenticated code module|
|US7313669||Feb 28, 2005||Dec 25, 2007||Intel Corporation||Virtual translation lookaside buffer|
|US7318141||Dec 17, 2002||Jan 8, 2008||Intel Corporation||Methods and systems to control virtual machines|
|US7318235||Dec 16, 2002||Jan 8, 2008||Intel Corporation||Attestation using both fixed token and portable token|
|US7330970 *||Jan 20, 2000||Feb 12, 2008||Microsoft Corporation||Methods and systems for protecting information in paging operating systems|
|US7356682||May 7, 2003||Apr 8, 2008||Microsoft Corporation||Attesting to a value of a register and/or memory region|
|US7356707||Oct 23, 2003||Apr 8, 2008||International Business Machines Corporation||Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function|
|US7356735||Mar 30, 2004||Apr 8, 2008||Intel Corporation||Providing support for single stepping a virtual machine in a virtual machine environment|
|US7356817||Mar 31, 2000||Apr 8, 2008||Intel Corporation||Real-time scheduling of virtual machines|
|US7366305||Sep 30, 2003||Apr 29, 2008||Intel Corporation||Platform and method for establishing trust without revealing identity|
|US7366849||Jun 25, 2004||Apr 29, 2008||Intel Corporation||Protected configuration space in a protected environment|
|US7373406||Dec 11, 2002||May 13, 2008||Valve Corporation||Method and system for effectively communicating file properties and directory structures in a distributed file system|
|US7389427||Sep 28, 2000||Jun 17, 2008||Intel Corporation||Mechanism to secure computer output from software attack using isolated execution|
|US7392390||Dec 11, 2002||Jun 24, 2008||Valve Corporation||Method and system for binding kerberos-style authenticators to single clients|
|US7392415||Jun 26, 2002||Jun 24, 2008||Intel Corporation||Sleep protection|
|US7395405||Jan 28, 2005||Jul 1, 2008||Intel Corporation||Method and apparatus for supporting address translation in a virtual machine environment|
|US7401231||Jan 11, 2002||Jul 15, 2008||Sony Corporation||Information recording/playback device and method|
|US7415620||Dec 22, 2006||Aug 19, 2008||Microsoft Corporation||System and method for authenticating an operating system to a central processing unit, providing the CPU/OS with secure storage, and authenticating the CPU/OS to a third party|
|US7415708||Jun 26, 2003||Aug 19, 2008||Intel Corporation||Virtual machine management using processor state information|
|US7424606 *||May 7, 2003||Sep 9, 2008||Microsoft Corporation||System and method for authenticating an operating system|
|US7424612||Nov 8, 2006||Sep 9, 2008||Microsoft Corporation||Saving and retrieving data based on symmetric key encryption|
|US7424709||Sep 15, 2003||Sep 9, 2008||Intel Corporation||Use of multiple virtual machine monitors to handle privileged events|
|US7434263||May 7, 2003||Oct 7, 2008||Microsoft Corporation||System and method for secure storage data using a key|
|US7454611||Jan 11, 2007||Nov 18, 2008||Intel Corporation||System and method for establishing trust without revealing identity|
|US7457412||Dec 22, 2006||Nov 25, 2008||Microsoft Corporation||System and method for authenticating an operating system to a central processing unit, providing the CPU/OS with secure storage, and authenticating the CPU/OS to a third party|
|US7467284 *||Feb 11, 2005||Dec 16, 2008||Irdeto Access B.V.||Method and system of externalising/internalising data record that allow processing of part or all of the record|
|US7472285||Jun 25, 2003||Dec 30, 2008||Intel Corporation||Apparatus and method for memory encryption with reduced decryption latency|
|US7480806||Feb 22, 2002||Jan 20, 2009||Intel Corporation||Multi-token seal and unseal|
|US7487365||Apr 4, 2003||Feb 3, 2009||Microsoft Corporation||Saving and retrieving data based on symmetric key encryption|
|US7490070||Jun 10, 2004||Feb 10, 2009||Intel Corporation||Apparatus and method for proving the denial of a direct proof signature|
|US7496753 *||Sep 2, 2004||Feb 24, 2009||International Business Machines Corporation||Data encryption interface for reducing encrypt latency impact on standard traffic|
|US7512786||Apr 6, 2004||Mar 31, 2009||Microsoft Corporation||Client-side boot domains and boot rules|
|US7516330||Nov 29, 2005||Apr 7, 2009||Intel Corporation||Platform and method for establishing provable identities while maintaining privacy|
|US7526655||Jul 18, 2002||Apr 28, 2009||Infineon Technologies Ag||Microprocessor configuration and method for operating a microprocessor configuration|
|US7529919||May 7, 2003||May 5, 2009||Microsoft Corporation||Boot blocks for software|
|US7543335||Feb 25, 2005||Jun 2, 2009||Microsoft Corporation||Method and system for allowing code to be securely initialized in a computer|
|US7543336||May 7, 2003||Jun 2, 2009||Microsoft Corporation||System and method for secure storage of data using public and private keys|
|US7546457||Mar 31, 2005||Jun 9, 2009||Intel Corporation||System and method for execution of a secured environment initialization instruction|
|US7564976||Mar 2, 2004||Jul 21, 2009||International Business Machines Corporation||System and method for performing security operations on network data|
|US7577839||Feb 28, 2005||Aug 18, 2009||Microsoft Corporation||Transferring application secrets in a trusted operating system environment|
|US7577840||Feb 28, 2005||Aug 18, 2009||Microsoft Corporation||Transferring application secrets in a trusted operating system environment|
|US7577848||Jan 18, 2005||Aug 18, 2009||Microsoft Corporation||Systems and methods for validating executable file integrity using partial image hashes|
|US7580972||Dec 11, 2002||Aug 25, 2009||Valve Corporation||Method and system for controlling bandwidth on client and server|
|US7587589||Nov 8, 2006||Sep 8, 2009||Microsoft Corporation||Saving and retrieving data based on symmetric key encryption|
|US7610611||Sep 19, 2003||Oct 27, 2009||Moran Douglas R||Prioritized address decoder|
|US7620949||Mar 31, 2004||Nov 17, 2009||Intel Corporation||Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment|
|US7631196||Feb 25, 2002||Dec 8, 2009||Intel Corporation||Method and apparatus for loading a trustable operating system|
|US7634661||Aug 18, 2005||Dec 15, 2009||Microsoft Corporation||Manifest-based trusted agent management in a trusted operating system environment|
|US7636844||Nov 17, 2003||Dec 22, 2009||Intel Corporation||Method and system to provide a trusted channel within a computer system for a SIM device|
|US7681050||Dec 1, 2005||Mar 16, 2010||Telefonaktiebolaget L M Ericsson (Publ)||Secure and replay protected memory storage|
|US7685416||Apr 19, 2007||Mar 23, 2010||Valve Corporation||Enabling content security in a distributed system|
|US7721341||Jun 15, 2005||May 18, 2010||Microsoft Corporation||Method and system for allowing code to be securely initialized in a computer|
|US7739521||Sep 18, 2003||Jun 15, 2010||Intel Corporation||Method of obscuring cryptographic computations|
|US7752456||Nov 8, 2006||Jul 6, 2010||Microsoft Corporation||Saving and retrieving data based on symmetric key encryption|
|US7765397||Nov 8, 2006||Jul 27, 2010||Microsoft Corporation||Generating, migrating or exporting bound keys|
|US7765500||Nov 8, 2007||Jul 27, 2010||Nvidia Corporation||Automated generation of theoretical performance analysis based upon workload and design configuration|
|US7778800||Aug 1, 2006||Aug 17, 2010||Nvidia Corporation||Method and system for calculating performance parameters for a processor|
|US7793111||Sep 28, 2000||Sep 7, 2010||Intel Corporation||Mechanism to handle events in a machine with isolated execution|
|US7802085||Feb 18, 2004||Sep 21, 2010||Intel Corporation||Apparatus and method for distributing private keys to an entity with minimal secret, unique information|
|US7809957||Sep 29, 2005||Oct 5, 2010||Intel Corporation||Trusted platform module for generating sealed data|
|US7814269||Dec 11, 2008||Oct 12, 2010||Irdeto Access B.V.||Method and system of externalising / internalising a data record that allow processing of part or all of the record|
|US7818808||Dec 27, 2000||Oct 19, 2010||Intel Corporation||Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor|
|US7836275||May 22, 2008||Nov 16, 2010||Intel Corporation||Method and apparatus for supporting address translation in a virtual machine environment|
|US7840962||Sep 30, 2004||Nov 23, 2010||Intel Corporation||System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time|
|US7853798||Feb 4, 2005||Dec 14, 2010||Nec Electronics Corporation||Program tamper detecting apparatus, method for program tamper detection, and program for program tamper detection|
|US7861168||Jan 22, 2007||Dec 28, 2010||Dell Products L.P.||Removable hard disk with display information|
|US7861245||Jun 29, 2009||Dec 28, 2010||Intel Corporation||Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment|
|US7890771||Apr 4, 2003||Feb 15, 2011||Microsoft Corporation||Saving and retrieving data based on public key encryption|
|US7891012||Mar 1, 2006||Feb 15, 2011||Nvidia Corporation||Method and computer-usable medium for determining the authorization status of software|
|US7895261||Dec 12, 2002||Feb 22, 2011||Valve Corporation||Method and system for preloading resources|
|US7900017||Dec 27, 2002||Mar 1, 2011||Intel Corporation||Mechanism for remapping post virtual machine memory pages|
|US7908450||Sep 14, 2004||Mar 15, 2011||Fujitsu Limited||Memory management unit, code verifying apparatus, and code decrypting apparatus|
|US7921293||Jan 24, 2006||Apr 5, 2011||Intel Corporation||Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment|
|US7953225||Oct 21, 2005||May 31, 2011||Harris Corporation||Mobile wireless communications device with software installation and verification features and related methods|
|US7962746 *||May 30, 2006||Jun 14, 2011||Panasonic Corporation||Computer system and program creating device|
|US8014530||Mar 22, 2006||Sep 6, 2011||Intel Corporation||Method and apparatus for authenticated, recoverable key distribution with no database secrets|
|US8032764||Nov 14, 2006||Oct 4, 2011||Texas Instruments Incorporated||Electronic devices, information products, processes of manufacture and apparatus for enabling code decryption in a secure mode using decryption wrappers and key programming applications, and other structures|
|US8037314||Dec 22, 2003||Oct 11, 2011||Intel Corporation||Replacing blinded authentication authority|
|US8069353||Jun 19, 2008||Nov 29, 2011||International Business Machines Corporation||Low-latency data decryption interface|
|US8087017 *||Apr 9, 2008||Dec 27, 2011||Moka5, Inc.||Trace-assisted prefetching of virtual machines in a distributed system|
|US8108641||Jun 27, 2006||Jan 31, 2012||Texas Instruments Incorporated||Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices|
|US8108687||Dec 11, 2002||Jan 31, 2012||Valve Corporation||Method and system for granting access to system and content|
|US8135962||Mar 27, 2002||Mar 13, 2012||Globalfoundries Inc.||System and method providing region-granular, hardware-controlled memory encryption|
|US8146078||Oct 29, 2004||Mar 27, 2012||Intel Corporation||Timer offsetting mechanism in a virtual machine environment|
|US8156343||Nov 26, 2003||Apr 10, 2012||Intel Corporation||Accessing private data about the state of a data processing machine from storage that is publicly accessible|
|US8181038||Apr 11, 2007||May 15, 2012||Cyberlink Corp.||Systems and methods for executing encrypted programs|
|US8185734||Jun 8, 2009||May 22, 2012||Intel Corporation||System and method for execution of a secured environment initialization instruction|
|US8195914||Feb 3, 2011||Jun 5, 2012||Intel Corporation||Mechanism for remapping post virtual machine memory pages|
|US8296738||Aug 13, 2007||Oct 23, 2012||Nvidia Corporation||Methods and systems for in-place shader debugging and performance tuning|
|US8296762||Jul 21, 2008||Oct 23, 2012||Intel Corporation||Virtual machine management using processor state information|
|US8364973 *||Dec 31, 2007||Jan 29, 2013||Intel Corporation||Dynamic generation of integrity manifest for run-time verification of software program|
|US8386788||Nov 10, 2009||Feb 26, 2013||Intel Corporation||Method and apparatus for loading a trustable operating system|
|US8407476||Nov 10, 2009||Mar 26, 2013||Intel Corporation||Method and apparatus for loading a trustable operating system|
|US8423787||Jan 19, 2007||Apr 16, 2013||Samsung Electronics Co., Ltd.||Apparatus and method of measuring integrity|
|US8436864||Aug 1, 2006||May 7, 2013||Nvidia Corporation||Method and user interface for enhanced graphical operation organization|
|US8436870||Aug 1, 2006||May 7, 2013||Nvidia Corporation||User interface and method for graphical processing analysis|
|US8448002||Apr 10, 2008||May 21, 2013||Nvidia Corporation||Clock-gated series-coupled data processing modules|
|US8452981 *||Mar 1, 2006||May 28, 2013||Nvidia Corporation||Method for author verification and software authorization|
|US8468337||Mar 2, 2004||Jun 18, 2013||International Business Machines Corporation||Secure data transfer over a network|
|US8489377||Dec 15, 2009||Jul 16, 2013||Nvidia Corporation||Method of verifying the performance model of an integrated circuit|
|US8489836||Jun 23, 2009||Jul 16, 2013||Nagravision Sa||Secure memory management system and method|
|US8522044||Aug 26, 2010||Aug 27, 2013||Intel Corporation||Mechanism to handle events in a machine with isolated execution|
|US8533777||Dec 29, 2004||Sep 10, 2013||Intel Corporation||Mechanism to determine trust of out-of-band management agents|
|US8539038||Feb 17, 2011||Sep 17, 2013||Valve Corporation||Method and system for preloading resources|
|US8543772||Dec 2, 2010||Sep 24, 2013||Intel Corporation||Invalidating translation lookaside buffer entries in a virtual machine (VM) system|
|US8549619||Jan 22, 2007||Oct 1, 2013||Dell Products L.P.||Removable hard disk with embedded security card|
|US8589701||Jan 27, 2011||Nov 19, 2013||Microsoft Corporation||Saving and retrieving data based on public key encryption|
|US8601286||Jan 27, 2011||Dec 3, 2013||Microsoft Corporation||Saving and retrieving data based on public key encryption|
|US8607151||Aug 1, 2006||Dec 10, 2013||Nvidia Corporation||Method and system for debugging a graphics pipeline subunit|
|US8607359||Jan 22, 2007||Dec 10, 2013||Dell Products L.P.||Removable hard disk with front panel input|
|US8621243||Jan 27, 2011||Dec 31, 2013||Microsoft Corporation||Saving and retrieving data based on public key encryption|
|US8625797 *||Jun 22, 2009||Jan 7, 2014||Giesecke & Devrient Gmbh||Releasing a service on an electronic appliance|
|US8639915||Mar 30, 2010||Jan 28, 2014||Intel Corporation||Apparatus and method for distributing private keys to an entity with minimal secret, unique information|
|US8639943||Jun 16, 2009||Jan 28, 2014||Qualcomm Incorporated||Methods and systems for checking run-time integrity of secure code cross-reference to related applications|
|US8644499||Sep 14, 2009||Feb 4, 2014||Broadcom Corporation||Method and system for securely protecting a semiconductor chip without compromising test and debug capabilities|
|US8645688||Apr 11, 2012||Feb 4, 2014||Intel Corporation||System and method for execution of a secured environment initialization instruction|
|US8661557||Dec 21, 2011||Feb 25, 2014||Valve Corporation||Method and system for granting access to system and content|
|US8671275||Aug 26, 2010||Mar 11, 2014||Intel Corporation||Mechanism to handle events in a machine with isolated execution|
|US8683230||Jan 27, 2011||Mar 25, 2014||Microsoft Corporation||Saving and retrieving data based on public key encryption|
|US8701091||Dec 15, 2005||Apr 15, 2014||Nvidia Corporation||Method and system for providing a generic console interface for a graphics application|
|US8751752||Mar 15, 2013||Jun 10, 2014||Intel Corporation||Invalidating translation lookaside buffer entries in a virtual machine system|
|US8812804 *||Jan 6, 2012||Aug 19, 2014||Texas Instruments Incorporated||Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices|
|US8850371||Sep 14, 2012||Sep 30, 2014||Nvidia Corporation||Enhanced clock gating in retimed modules|
|US8886959||Nov 19, 2010||Nov 11, 2014||Fujitsu Semiconductor Limited||Secure processor and a program for a secure processor|
|US8918575 *||Sep 14, 2009||Dec 23, 2014||Broadcom Corporation||Method and system for securely programming OTP memory|
|US8924728||Nov 30, 2004||Dec 30, 2014||Intel Corporation||Apparatus and method for establishing a secure session with a device without exposing privacy-sensitive information|
|US8954696||Jun 13, 2013||Feb 10, 2015||Nagravision S.A.||Secure memory management system and method|
|US20090172814 *||Dec 31, 2007||Jul 2, 2009||Hormuzd Khosravi||Dynamic generation of integrity manifest for run-time verification of software program|
|US20110066787 *||Sep 14, 2009||Mar 17, 2011||John Markey||Method and system for securely programming otp memory|
|US20110091039 *||Jun 22, 2009||Apr 21, 2011||Stephan Spitz||Releasing a service on an electronic appliance|
|US20120036369 *||Sep 21, 2010||Feb 9, 2012||Phison Electronics Corp.||Memory identification code generation method, management method, controller, and storage system|
|US20120147937 *||Jan 6, 2012||Jun 14, 2012||Texas Instruments Incorporated||Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices|
|CN1655133B||Feb 7, 2005||Sep 15, 2010||耶德托存取公司||Method and system of external data storage|
|CN1836220B||Jun 9, 2004||Nov 10, 2010||英特尔公司||An apparatus and method for memory encryption with reduced decryption latency|
|CN100524314C||Feb 16, 2007||Aug 5, 2009||三星电子株式会社||Apparatus and method of measuring integrity|
|CN102232221B *||Jul 14, 2009||Feb 11, 2015||高通股份有限公司||用于检查安全代码的运行时完整性的方法和系统|
|EP1041767A2 *||Sep 28, 1999||Oct 4, 2000||Fujitsu Limited||Authentication of electronic data|
|EP1265396A1 *||Jan 11, 2002||Dec 11, 2002||Sony Corporation||Apparatus and method for recording/reproducing information|
|EP1370084A1 *||May 27, 2003||Dec 10, 2003||ATI Technologies Inc.||System for protecting security registers and method thereof|
|EP1510899A1 *||Jun 5, 2002||Mar 2, 2005||Fujitsu Limited||Memory managing unit, code verifying device, and code decoder|
|EP1577782A1||Feb 12, 2004||Sep 21, 2005||Irdeto Access B.V.||Method and system of external data storage|
|EP1594031A2 *||Mar 30, 2005||Nov 9, 2005||Tamtron OY||Method and arrangement for protection of information|
|EP1681609A1 *||Dec 21, 2005||Jul 19, 2006||Microsoft Corporation||Systems and methods for validating executable file integrity using partial image hashes|
|EP1821450A1 *||Feb 6, 2007||Aug 22, 2007||Samsung Electronics Co., Ltd.||Apparatus and method of measuring integrity|
|EP1870813A1 *||Jun 19, 2006||Dec 26, 2007||Texas Instruments France||Page processing circuits, devices, methods and systems for secure demand paging and other operations|
|EP1903444A1||Feb 12, 2004||Mar 26, 2008||Irdeto Access B.V.||Method and system of external data storage|
|EP2138946A1 *||Jun 24, 2008||Dec 30, 2009||Nagravision S.A.||Secure memory management system|
|EP2490147A2 *||Feb 23, 2005||Aug 22, 2012||Fujitsu Semiconductor Limited||A secure processor and a program for a secure processor|
|EP2626804A1 *||Feb 9, 2012||Aug 14, 2013||Inside Secure||Method for managing memory space in a secure non-volatile memory of a secure element|
|WO2000026791A2 *||Nov 4, 1999||May 11, 2000||Philips Electronics Na||Secure memory management unit which uses multiple cryptographic algorithms|
|WO2000069206A1 *||May 11, 2000||Nov 16, 2000||Ahti Muhonen||Integrity protection method for radio network signaling|
|WO2002025866A2 *||Sep 14, 2001||Mar 28, 2002||At & T Corp||Apparatus, system and method for validating integrity of transmitted data|
|WO2003083672A1 *||Dec 18, 2002||Oct 9, 2003||Advanced Micro Devices Inc||System and method providing region-granular, hardware-controlled memory encryption|
|WO2003104948A1||Jun 5, 2002||Dec 18, 2003||Fujitsu Ltd||Memory managing unit, code verifying device, and code decoder|
|WO2004059493A2 *||Dec 23, 2003||Jul 15, 2004||Trusted Logic||Method of securing computer systems by means of software containment|
|WO2005006197A2||Jun 9, 2004||Jan 20, 2005||Intel Corp||An apparatus and method for memory encryption with reduced decryption latency|
|WO2007062941A2 *||Oct 26, 2006||Jun 7, 2007||Ericsson Telefon Ab L M||Secure and replay protected memory storage|
|WO2007094857A1 *||Dec 18, 2006||Aug 23, 2007||Thomson Licensing||Method and apparatus for securing digital content|
|WO2008110971A2 *||Mar 7, 2008||Sep 18, 2008||Koninkl Philips Electronics Nv||Encryption and decryption of auxiliary data|
|WO2011016793A2 *||Jul 14, 2009||Feb 10, 2011||Qualcomm Incorporated||Methods and systems for checking run-time integrity of secure code|
| || |
|U.S. Classification||713/187, 380/30, 726/29, 711/E12.092|
|International Classification||G06F1/00, G06F12/10, G09C1/00, H04L9/32, G06F21/00, G06F21/22, G06F21/24, H04L9/10, H04L9/00, G06F12/14|
|Cooperative Classification||H04L9/3247, H04L9/3236, G06F21/86, G06F21/79, G06F21/72, G06F12/1408, G06F21/602, G06F2221/2107, G06F21/85, G06F21/64, G06F21/606, G06F21/71|
|European Classification||G06F21/71, G06F21/64, G06F21/60A, G06F21/79, G06F21/86, G06F21/60C, G06F21/85, G06F21/72, H04L9/00, G06F12/14B, H04L9/32M|
|Nov 18, 2009||FPAY||Fee payment|
Year of fee payment: 12
|Nov 28, 2005||FPAY||Fee payment|
Year of fee payment: 8
|Nov 21, 2001||FPAY||Fee payment|
Year of fee payment: 4
|Dec 12, 1996||AS||Assignment|
Owner name: INTEL CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:HERBERT, HOWARD C.;DAVIS, DEREK L.;REEL/FRAME:008310/0241
Effective date: 19961210