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Publication numberUS6005448 A
Publication typeGrant
Application numberUS 08/926,677
Publication dateDec 21, 1999
Filing dateSep 10, 1997
Priority dateSep 10, 1996
Fee statusPaid
Also published asDE69724058D1, DE69724058T2, EP0828348A2, EP0828348A3, EP0828348B1
Publication number08926677, 926677, US 6005448 A, US 6005448A, US-A-6005448, US6005448 A, US6005448A
InventorsAndrew James Pickering, Ian Charles Wood
Original AssigneePhoenix Vlsi Consultants, Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Phase-tuned ring oscillator
US 6005448 A
Abstract
A ring oscillator comprises a ring of delay stages in which the output of each stage is input to the next stage in the ring. Tuning of the oscillation frequency of the oscillator is achieved by additionally taking outputs from delay stages elsewhere in the ring as one or two secondary inputs to each delay stage and mixing this or these in variable proportions with the primary input.
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Claims(10)
We claim:
1. A tunable ring oscillator comprising a plurality of delay stages arranged in a ring in which each delay stage has input to it a primary input taken from the output of the previous stage and means arranged to cause an odd number of signal inversions around the ring thus formed wherein each delay stage has input to it a secondary input taken from the output of another stage a predetermined number of stages offset around the ring, and each delay stage further comprises mixing means arranged to mix said inputs in variable proportions whereby to vary the phase of the output of the delay stage relative to the phase of the primary input.
2. A tunable ring oscillator according to claim 1 in which said predetermined number is the same for all said delay stages.
3. A tunable ring oscillator according to claim 1 in which a variable control signal is applied to said mixing means of each delay stage to control said variable proportions.
4. A tunable ring oscillator according to claim 3 in which a single said control signal is applied to all of said means.
5. A tunable ring oscillator according to claim 1 in which for each delay stage, the secondary input has the same polarity as the primary input.
6. A tunable ring oscillator according to claim 1 in which, for each delay stage, the secondary input has the opposite polarity to that of the primary input.
7. A tunable ring oscillator comprising a plurality of delay stages arranged in a ring in which each delay has input to it a primary input taken from the output of the previous stage and means arranged to cause an odd number of signal inversions around the ring thus formed, wherein each delay stage has input to it a secondary input taken from the output of another stage a first predetermined number of stages offset around the ring and a tertiary input taken from the output of another stage a second predetermined number of stages offset around the ring, the tertiary input having a polarity opposite to that of the secondary input, and each delay stage further comprises mixing means arranged to mix said inputs in variable proportions whereby to vary the phase of the output of the delay stage relative to the phase of the primary input.
8. A tunable ring oscillator according to claim 7 in which said first and second predetermined numbers are the same.
9. A tunable ring oscillator according to claim 7 in which said first and second predetermined numbers are different.
10. A tunable ring oscillator according to claim 7, 8 or 9 in which said secondary and tertiary inputs are mixed with said primary input in complementary proportions.
Description

The present invention relates to oscillators, in particular to a form of ring oscillator, the frequency of which can be tuned by a control input.

The ring oscillator is a known circuit which is composed of a number of delay elements arranged in a series ring, with an odd number of signal inversions in the loop. In operation, a switching transient propagates continuously around the loop, thereby producing an oscillation. Because of the circular symmetry of the loop (assuming all the delay stages are identical), the phases of the outputs of each ring stage are equally spaced (with a total phase shift of 180 around the loop), and the oscillation period is given by twice the total of the delays around the loop. Ring oscillator circuits are widely used, for instance to measure the speed performance of integrated circuit fabrication processes.

Ring oscillators have many attractive features for implementing a fully-integrated oscillator: they are very easy to understand and design, and are capable of operating at very high frequencies; designs are relatively easily transportable between technologies, and they intrinsically provide multiple outputs at well-defined evenly-spaced phase intervals (an essential feature for some applications).

One way to produce a tunable ring oscillator is to include in the ring an amplifier stage (e.g. differential pair) whose delay may be altered. This can be achieved by changing the drive current in the gain stage. However, if a simple resistive load is used in the amplifier stage, this results in an output signal amplitude variation which cancels out the speed adjustment. One solution to this is to use a compensated load whose impedance is adjusted with the drive current to maintain constant voltage swing. However, this usually forces the use of lower drive currents and consequently limits the frequency that may be achieved.

EP-A-0294203 discloses a high speed voltage controlled ring oscillator which, in its simplest embodiment, comprises a number of inverting delay elements. These are arranged in a loop, with one portion of the loop comprising alternative signal paths having different amounts of delay in them. A mixing element mixes the outputs from these two path portions in varying proportions according to a control input to enable the frequency of the ring to be tuned between two limiting frequencies defined by the two alternative paths around the ring. In such an arrangement, the phase relationships between the outputs of the various delay stages around the ring are not maintained and therefore it is not possible to derive from this circuit a plurality of equally spaced oscillating outputs, and also this places a limitation on the amount of tuning which can be achieved.

Hence, the main difficulty with implementing conventional tunable ring oscillators is the achievement of reliable operation over a wide tuning range whilst maintaining high speed performance.

SUMMARY OF THE INVENTION

The present invention provides a tunable ring oscillator which comprises a number of delay stages arranged in a ring with an odd number of signal inversions in the ring, each stage having input to it the output of the previous stage and the output of another stage in the ring. The two inputs thus have phases different from each other, and tuning is achieved by mixing the two inputs in variable proportions such that the phase of the stage output is adjusted. This affects the frequency at which the circuit oscillates. The fact that the phase is adjusted at the input to each stage means that the phase relationships between the outputs of the stages can be maintained at the different frequencies.

Preferably the ring is symmetrical, that is each stage in the ring is configured in the same manner, with the exception of necessary signal inversions, and a single tuning input is applied to the mixing devices of all the stages. In this arrangement the plurality of equi-space signals can be derived from the ring in exactly the same manner as in the prior art described above, but now at tunable frequencies.

This invention thus uses a tuning technique that is fundamentally different to simple current tuning. The oscillation frequencies that can be achieved may be greater than or less than the frequency of the equivalent untuned ring oscillator.

BRIEF DESCRIPTION OF THE INVENTION

The present invention will be better understood from the following description of preferred embodiments given by way of example and with reference to the accompanying drawings, in which:

FIG. 1 shows an equivalent circuit of one stage of the oscillator of the preferred embodiment and a related phasor diagram;

FIG. 2 illustrates the implementation of one stage of the preferred embodiment using MOS technology;

FIGS. 3 and 4 are examples of possible ring configurations; and

FIG. 5 is a diagrammatic representation of a stage in a further preferred embodiment which has positive and negative tuning.

DESCRIPTION OF THE INVENTION

An important feature of the Phase-Tuned Ring Oscillator (PTRO) illustrated in the Figures. is the presence of a mixer at each stage input. This is used to combine a secondary phase-shifted signal (tapped off from a different ring stage) with the main stage input signal. As a result, the phase of the net stage input is modulated. This effectively forces the ring oscillation to shift in frequency in order to maintain the fixed relationship between the stage phases (which is defined by the ring configuration). Frequency tuning is achieved by varying the magnitude of the secondary signal input to the mixer, and hence the degree of phase-shifting.

FIG. 1 shows an equivalent model for one stage of a PTRO, and a phasor diagram illustrating how the resultant stage input, R, is phase shifted with respect to the primary input signal, P, by mixing with the secondary input signal, S. In the phasor diagram the effect of adding the signal S with magnitude r to the signal P with magnitude 1 is illustrated.

The basic PTRO stage design is shown in FIG. 2, implemented using a MOS technology. The circuit is based on a standard, non-inverting differential amplifier using a long-tailed pair M1, M2 with simple resistive loads R1, R2 operating on a fixed current source I1. This is driven by the differential primary stage input Pa, Pb. To implement phase-tuning, a second differential amplifier is added M3, M4 which is driven by the differential secondary stage input Sa, Sb. This second amplifier operates on a current source I2 whose value may be varied by some means in order to effect frequency tuning of the oscillator. The load capacitors C1, C2 are added in order to slow down the speed of the stage to set the desired ring oscillator frequency: these may optionally be omitted in order to achieve maximum possible operating frequency.

This circuit configuration effectively acts as a mixer: the currents generated by the two differential amplifiers are summed in the resistors, thereby developing an output voltage Oa, Ob which represents the sum of the two amplifier outputs.

It will be appreciated that this circuit may easily be adapted to other technologies simply by substituting the MOS devices M1, M2, M3, M4 with other transistor types (e.g. bipolar).

The PTRO ring configuration is not fixed, but rather may be varied to suit a particular application. The parameters which define the ring configuration are listed below. These may each be independently chosen to alter the tuning characteristics of the complete oscillator.

1. Number of stages in the ring, N.

2. Stage offset between primary and secondary inputs, M.

3. Tuning polarity.

The values of M and N are subject to the following limits:

N≧3

1≦M≦(N-1)

The tuning polarity may be either positive or negative.

The significance of these parameters is most easily understood by considering an example PTRO implementation, such as is shown in FIG. 3. This is a schematic diagram of a positively tuned 5-stage ring with a single stage offset between primary and secondary inputs (i.e N=5 and M=1). In the diagram, the differential signals are represented by single lines for simplicity. The circles on the inputs of the ring stages represent signal inversions which are simply achieved by interposing the two differential connections.

In the example shown, there are 5 stages in the ring (X1-5), with one inversion in the main loop via the `P` inputs (on the `P` input of X1) to promote oscillation as explained above. Additionally, each stage has a secondary input taken from one stage previous in the ring. Correct polarity around the loop is maintained by using appropriate inversions, in this case on the `S` inputs of X1 and X2 corresponding to those `S` inputs which bypass the inversion in the `P` ring. Also shown is a Tuning Control signal which is applied to each stage of the ring to provide a means for adjusting the tuning current magnitude.

The most important parameter as far as tuning characteristics is concerned is M. The value of M should be chosen according to the degree of timing required: essentially the greater the value of M, the greater the degree of tuning. One way to understand this is to consider the secondary inputs to bypass part of the ring thereby reducing the loop delay and increasing frequency: the greater the number of stages bypassed, the larger the effect on tuning.

The tuning polarity determines the effect of tuning on the ring oscillator frequency: with positive tuning, the secondary input is applied with the same polarity as the primary input. This reinforces the primary input signal and causes the oscillation frequency to increase as the tuning current is increased. With negative tuning, the polarity of the secondary inputs is inverted compared to the primary input in each stage of the ring. This therefore means that the secondary input opposes the primary input signal and this results in a decrease in the oscillation frequency as the tuning current magnitude is increased. A negatively-tuned version of the FIG. 3 PTRO is shown in FIG. 4.

All of the ring parameters play an important role in determining the performance of any particular PTRO configuration. One configuration of special importance, is a positively tuned 6-stage ring oscillator with 2-stage secondary input feed forward (i.e. N=6, M=2), since his configuration displays particularly good tuning characteristics and stability.

There are several variations which can be made based on the above described circuits without departing from the essentials of this invention. Some of these are as follows:

Buffered Ring Stage

The basic ring stage can be enhanced by the addition of a buffer (either a differential amplifier or a pair of source/emitter followers) on the output.

Differential Tuning

The primary input amplifier current can be varied simultaneously and in the opposite sense of the secondary amplifier current (i.e. primary current is reduced as the secondary current is increased). This gives rise to a stronger degree of phase shifting (and hence greater frequency tuning sensitivity), but can cause instability of the oscillator (depending on the ring configuration).

Bipolar Tuning

Both positive and negative tuning can be employed simultaneously (by the inclusion of two mixers) in order to implement an oscillator whose frequency can be both increased and decreased from the untuned frequency. This is shown in FIG. 5 below. In this design, the tuning current is divided between the two secondary stage inputs Sp, Sn according to the value of r (which is consequently limited to the range 0-1). The secondary inputs, Sp and Sn, are taken from Mp and Mn stages back in the loop respectively (these are not necessarily equal). Also, note that the polarity of Sn has been reversed in order to effect negative tuning. With this arrangement, the zero tuning point occurs when the positive and negative tuning processes cancel each other out (at r=0.5 for equal Mn and Mp phase offsets).

In general tenris this invention is an oscillator that is comprised of a number of identical differential gain stages arranged in a ring, with an inversion in the loop to force oscillation. Each stage of the oscillator receives a primary input signal from the output of the previous ring stage, and also a secondary input signal taken from a number of stages previous in the ring. Each stage of the oscillator incorporates a mixer arrangement into which the primary and secondary signals are applied. The mixer incorporates some means for externally adjusting the relative weights of the primary and secondary signals being mixed. The function of the mixer is to produce a net signal whose phase is shifted from the primary signal. The effect of the phase shift is to produce a change in the frequency of the oscillation around the ring. By changing the weights of the signals being mixed, the degree of phase-shifting may be varied, and hence the oscillator frequency may be tuned.

The phase-tuned ring oscillator frequency may be tuned to a higher value than the equivalent untuned ring oscillator, which is not usually the case with conventional current-tuned ring oscillators. Also the frequency may be tuned both upwards and downwards from its nominal value by the same device, thereby allowing a large tuning range to be achieved.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US5475344 *Feb 22, 1994Dec 12, 1995The Board Of Trustees Of The Leland Stanford Junior UniversityMultiple interconnected ring oscillator circuit
US5841325 *May 12, 1997Nov 24, 1998Hewlett-Packard CompanyFully-integrated high-speed interleaved voltage-controlled ring oscillator
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6304149 *Nov 28, 1998Oct 16, 2001Beomsup KimRing oscillator VCO using a differential delay stage
US6329859 *Mar 23, 2000Dec 11, 2001Bitblitz Communications, Inc.N-way circular phase interpolator for generating a signal having arbitrary phase
US6448862 *Sep 21, 2000Sep 10, 2002Bae Systems Information And Electronic Systems Integration Inc.Single event upset immune oscillator circuit
US6466098 *Feb 23, 2001Oct 15, 2002Texas Instruments IncorporatedAnalogue-controlled phase interpolator
US6501339 *Aug 10, 2001Dec 31, 2002Xilinx, Inc.Ring oscillators with improved signal-path matching for high-speed data communications
US6525617 *Aug 9, 2001Feb 25, 2003Lattice Semiconductor CorporationBuffering for LC-based stage
US6831524 *Sep 12, 2001Dec 14, 2004Rensselaer Polytechnic InstituteFeed forward voltage controlled ring oscillator
US7039885Jan 21, 2003May 2, 2006Barcelona Design, Inc.Methodology for design of oscillator delay stage and corresponding applications
US7098710 *Nov 21, 2003Aug 29, 2006Xilinx, Inc.Multi-speed delay-locked loop
US7102449Jan 21, 2003Sep 5, 2006Barcelona Design, Inc.Delay stage for oscillator circuit and corresponding applications
US7180378Nov 4, 2004Feb 20, 2007Gennum CorporationTunable ring oscillator
US7403074 *Feb 26, 2004Jul 22, 2008Sony CorporationOscillator
US8218705Apr 15, 2008Jul 10, 2012Diablo Technologies Inc.Linear phase interpolator and phase detector
US8339208Jun 8, 2010Dec 25, 2012The Hong Kong University Of Science And TechnologyMethod and apparatus for tuning frequency of LC-oscillators based on phase-tuning technique
US20060066413 *Aug 23, 2005Mar 30, 2006Naoki TakahashiOscillator
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Classifications
U.S. Classification331/57, 331/34, 331/177.00R, 327/280
International ClassificationH03K3/0231
Cooperative ClassificationH03K3/0231
European ClassificationH03K3/0231
Legal Events
DateCodeEventDescription
Oct 20, 1997ASAssignment
Owner name: PHOENIX VLSI CONSULTANTS, LTD., UNITED KINGDOM
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PICKERING, ANDREW JAMES;WOOD, IAN CHARLES;REEL/FRAME:008777/0263
Effective date: 19970925
May 29, 2003FPAYFee payment
Year of fee payment: 4
May 17, 2007FPAYFee payment
Year of fee payment: 8
May 23, 2011FPAYFee payment
Year of fee payment: 12