|Publication number||US6101105 A|
|Application number||US 09/329,784|
|Publication date||Aug 8, 2000|
|Filing date||Jun 10, 1999|
|Priority date||Jun 10, 1999|
|Publication number||09329784, 329784, US 6101105 A, US 6101105A, US-A-6101105, US6101105 A, US6101105A|
|Inventors||Thomas P. Gilmore|
|Original Assignee||Rockwell Technologies, Llc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (2), Referenced by (17), Classifications (8), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to DC-to-DC converters and more specifically to a method and apparatus for determining the value of an unregulated DC bus voltage in an insulated power system.
As well known in the controls art three phase AC voltage provided by a power station at a single 60 Hz frequency can be rectified using an AC-to-DC rectifier. While useful for some applications, such rectified DC voltage is not suitable for other applications. This is because the magnitude of AC voltage provided to a facility routinely fluctuates due to varying grid usage and other power system occurrences and the fluctuating AC voltages cause the resulting DC voltage to fluctuate. The fluctuating DC voltage is said to be unregulated.
One application for which unregulated DC voltage is unacceptable is powering analog and digital electronics which typically require a regulated (i.e. constant within an acceptable range) voltage source.
Switch-mode DC-to-DC converters are used to convert unregulated DC voltage input into regulated DC voltage output. An exemplary converter includes a transformer including primary and secondary windings, a switch, a regulator and a rectifier/filter circuit.
The regulator is linked to the switch to open and close the switch. The switch and primary form a series pair between positive and negative rails of the unregulated DC bus voltage. The secondary is linked to the rectifier/filter circuit. By opening and closing the switch, current from the unregulated source is provided to, and then cut off from, the primary, resulting in a pulsating voltage across the transformer secondary. The rectifier/filter circuit rectifies the pulsating voltage and filters ripple to provide the regulated DC output voltage. By adjusting the switching duty cycle, the DC output voltage magnitude is adjusted and can be kept constant. This type of DC-to-DC regulator is often used to provide regulated DC power to electronics.
In addition to being converted into a regulated DC voltage for powering electronics, another common use for an unregulated DC bus voltage is to feed a DC-to-AC inverter. Inverters are used to convert DC voltage to controllable frequency and amplitude AC voltage. To this end, a controller is typically provided to control inverter switching in a manner calculated to result in a desired amplitude and frequency.
Modern controllers typically include complex electronic configurations which require a regulated DC bus voltage. Therefore, inverter systems also often include a DC-to-DC converter for converting the unregulated DC voltage to a regulated DC source to power the controller.
To determine how to control an inverter to generate an AC voltage having a desired amplitude and frequency, a typical controller considers a large number of operating parameters. One parameter considered essential to operation of most controllers is the unregulated DC bus voltage magnitude. In effect, it is necessary to know inverter input voltage to determine how to control the inverter to provide a desired output.
As indicated above, unregulated DC bus voltage fluctuates and therefore controllers which consider DC bus voltage magnitude require some mechanism to determine bus voltage. A resistive voltage divider and a differential amplifier have been used in many systems to determine the unregulated DC bus voltage magnitude. The divider circuit solution is relatively inexpensive and works well for many applications.
Despite the advantages of such a simple divider circuit, such circuits cannot be used in certain applications. For example, for safety purposes many applications require an insulated power system wherein the unregulated DC bus voltage is monitored to identify any current leakage which may potentially signal a dangerous condition. When a current leak is sensed, the leak is interpreted as a ground fault and the converter/inverter system is prevented from operating. In an insulated power system, even current loss through a voltage divider circuit is sufficient to prevent the insulated system from operating.
Thus, it would be advantageous to have a method and/or apparatus for determining an unregulated DC voltage magnitude in an insulated power system.
An exemplary embodiment of the invention includes a simple voltage sensing circuit for use with a DC-to-DC converter for accurately estimating the magnitude of an unregulated DC bus voltage. The converter includes, among other things, a transformer having primary and secondary windings, a switch and a regulator. The regulator is linked to the switch via a line to turn the switch on and off. The switch and primary are in series between positive and negative rails of the unregulated DC bus.
The sensor circuit includes an electrically insulating coupler, a voltage sensing circuit and a sampler circuit. The coupler is linked to the regulator and to the sampler circuit and provides a trigger signal to the sampler circuit when the switch is closed. The sampler is linked to the voltage sensing circuit which is linked to the secondary to sense the secondary voltage. When the sampler circuit receives a trigger signal the sampler samples the sensing circuit signal and provides the sampled signal as an output voltage. A processor then uses the output voltage to calculate the unregulated DC bus voltage.
Preferably, the voltage sensing circuit is a resistive voltage divider and the processor calculates by solving the following equation: ##EQU1## where K is a constant corresponding to the divider.
Thus, one object of the invention is to provide a method and apparatus for estimating an unregulated DC bus voltage in an isolated converter system. This is accomplished by sensing voltage across a transformer secondary and by coupling voltage sensing non-electrically to switch closing.
Another object is to sense the unregulated DC bus voltage inexpensively. To this end, in addition to converter components required to construct a converter, only a coupler, two resistors and a sample and hold circuit are required. By using inverter controller processing power cost is further reduced.
These and other objects, advantages and aspects of the invention will become apparent from the following description. In the description, reference is made to the accompanying drawings which form a part hereof, and in which there is shown a preferred embodiment of the invention. Such embodiment does not necessarily represent the full scope of the invention and reference is made therefor, to the claims herein for interpreting the scope of the invention.
FIG. 1 is a schematic diagram of an exemplary motor control system;
FIG. 2 is a schematic diagram of the converter of FIG. 1;
FIG. 3 is a graph illustrating the voltage across switch Q1 in FIG. 2;
FIG. 4 is a graph illustrating the voltage across the secondary winding of FIG. 2;
FIG. 5 is a graph illustrating sample voltage pulses VCN sampled by the sample and hold circuit of FIG. 2;
FIG. 6 is a graph illustrating an exemplary output voltage VOUT of FIG. 2; and
FIG. 7 is a flow chart illustrating a preferred inventive method.
Referring now to FIG. 1, the invention will be described in the context of an exemplary motor control system 10 including inverter 12, motor 14, DC-to- DC converter 14 and inverter controller 16. An unregulated DC bus voltage VDC1 to inverter 12 on positive and negative rails 18, 20, respectively. Controller 16 is linked to inverter 12 via a bus 22. As well known in the controls industry, inverter 12 includes a plurality of switches which, under the control of controller 16, convert unregulated DC bus voltage VDC1 into three phase AC voltage and current provided to motor 14 via supply lines 24, 26 and 28. By adjusting the amplitude and frequency of the voltages and currents on lines 24, 26 and 28, the speed and other operating parameters of motor 14 can be variably controlled.
In order to operate properly, controller 16 has two primary requirements. First, controller 16 requires a regulated DC power supply. To this end, DC-to-DC converter 14 is linked to rails 18 and 20 and, as described in more detail below, steps DC bus voltage VDC1 down to a regulated DC power supply VDC2 which is provided on positive and negative rails 30, 32, respectively, to controller 16.
Second, typical controllers 16 require a plurality of signals which indicate instantaneous system operating parameters so that controller 16 can modify inverter 12 operation to cause extremely accurate control of motor 14. To this end, one important system operating parameter which is often required by an exemplary controller 16 is a measurement of unregulated DC bus voltage VDC1. When voltage VDC1 is relatively high, controller 16 controls inverter 12 in one manner to generate desired AC voltages on lines 24, 26 and 28 and, when DC voltage VDC1 is relatively low, controller 16 controls inverter 12 in a second manner to generate the desired voltages on lines 24, 26 and 28.
According to the present invention, in addition to providing regulated DC bus voltage VDC2, converter 14 also provides an output voltage signal VOUT to controller 16 via a bus 44 which is used by controller 16 to generate an extremely accurate estimate of DC bus voltage VDC1.
Referring to FIG. 2, exemplary converter 14 generally includes a converter assembly 34 and a voltage sensing assembly 36. Converter assembly 34 is a standard flyback converter including a transformer TR1, a semiconductor switch Q1, a PWM regulator U1, first and second resistors R1, R2, respectively, first and second capacitors C1 and C2, respectively, and first and second diodes D1 and D2, respectively. Transformer TR1 includes primary and secondary windings P and S, respectively, (hereinafter the primary and secondary, respectively).
Primary P, switch Q1 and resistor R2 are linked in series between unregulated DC bus voltage rails 18 and 20. Diode D1 and capacitor C1 arranged in series across primary P while resistor R1 is in parallel with capacitor C1. Regulator U1 is linked to negative DC bus 20 and is also linked to switch Q1 to open and close switch Q1. Preferably switch Q1 is a semiconductor switch. Secondary S and diode D2 are linked in series across regulated DC bus voltage rails 30 and 32. Capacitor C2 is also linked between busses 30 and 32.
In operation, when switch Q1 is on, the dot end of primary P is negative with respect to its no-dot end and the secondary dot end is positive. Output rectifier diode D2 is reversed biased and all output load currents are supplied from filter capacitor C2. During the Q1 on time, there is a fixed voltage across primary P and current in primary P ramps up quickly. When switch Q1 is turned off, energy stored in the transformer core causes current to flow in secondary windings, the secondary winding current forward biasing diode D2 and therefore providing current to capacitor C2 to charge capacitor C2 and maintain regulated DC voltage VDC2. Thus, by opening and closing switch Q1, current pulses are provided to capacitor C2 thereby causing DC bus voltage VDC2. By regulating the duty cycle of switch Q1, the average charge on capacitor C2 can be regulated and therefore bus voltage VDC2 is also regulated.
Referring still to FIG. 2, voltage sensing circuit 36 includes an electrically isolated coupler U2, third and fourth resistors R3 and R4, respectively, and a sample and hold circuit U3. Electrically isolating coupler U2 is preferably an opticoupler and is linked to the trigger line of PWM regulator U1 via linking line 40. When controller U1 sends a trigger signal to switch Q1, coupler U2 generates a trigger signal on output line 42 which is provided to sample and hold circuit U3.
Sample and hold circuit U3 includes a trigger input P1, an analog sensing input P3 and an output terminal P4. Line 42 is linked to trigger input P1 and, when a trigger signal is received on line 42, sample and hold circuit U3 samples the voltage at terminal P3. The sampled voltage level is provided at output terminal P4 on an output line 44. The output signal on line 44 is maintained or held until another trigger signal is received at terminal P1 thereby causing circuit U3 to again sample the analog input voltage at terminal P3 and update the signal on output terminal P4.
Resistors R3 and R4 are arranged in series between the dot end of secondary S and ground 46. A common node 48 between resistors R3 and R4 is linked to sample and hold circuit input terminal P3. Thus, resistors R3 and R4 operate as a voltage divider providing an analog common node voltage signal VCN to terminal P3.
Operation of voltage sensing circuit 36 is as follows. Sample and hold circuit U3 is synchronized to the transformer TR1 output through switch U2 when the power transistor Q1 is turned on. As described above, at the moment switch Q1 is turned on, as in all flyback type circuits, output diode D2 is reverse biased so that no current flows in the output windings, the unregulated DC bus voltage VDC1 is applied to the transformer primary P, current starts to ramp up in primary P thereby causing a voltage across secondary winding S. Immediately upon turning on switch Q1, the voltage across the secondary S accurately reflects the DC bus voltage VDC1 when the transformer TR1 turns ratio is accounted for.
Upon turning on switch Q1, if the voltage sensing circuit 36 samples a transformer output before primary P the currents ramps to a high value, a very accurate measurement of unregulated DC bus voltage VDC1 can be made. To this end, when Q1 turns on, coupler U2 provides a trigger signal to input P1 thereby causing sample and hold circuit U3 to sample voltage VCN at common node 48 providing the sample voltage on output line 44.
When controller 16 receives output voltage VOUT, controller 16 mathematically combines the output voltage VOUT with a transformer turns ratio and a resistive voltage dividing ratio which correspond to transformer TR1 and resistors R3 and R4, respectively, and which are known. To this end, controller 16 estimates the instantaneous unregulated DC bus voltage VDC1 by solving the following equation: ##EQU2## wherein NP /NS is the transformer turns ratio and (R3+R4)/R4 is the voltage dividing resistive ratio corresponding to resistors R3 and R4. In this manner, converter 14 and controller 16 cooperate to generate an extremely accurate unregulated DC bus voltage VDC1 estimate for control purposes.
Referring now to FIGS. 2 and also 3 through 6, various voltage waveforms are illustrated in FIGS. 3 through 6 which correspond to the converter of FIG. 2 during system operation. To this end, FIG. 3 represents the voltage across switch Q1, FIG. 4 represents the voltage across secondary S, FIG. 5 represents the sample voltage sampled at sample and hold circuit input P3 and FIG. 6 represents the output voltage VOUT on output line 44.
Between times t0 and t1, switch Q1 is off or open. At time t1 switch Q1 is closed or turned on. Although not illustrated in FIGS. 3-6, when switch Q1 is turned on the unregulated DC bus voltage VDC1 is provided across primary winding P thereby causing current to rise in primary winding P. The change in current with respect to time through primary P causes voltage VS across secondary S as illustrated in FIG. 4. Initially, just after time t1, current in the primary is low, secondary current is zero and therefore errors due to IR drop in the primary and secondary are low.
Referring still to FIGS. 2 through 6, at time t1', just after time t1, opticoupler U2 causes sample and hold circuit U3 to sample voltage VCN at node 48 which reflects the secondary voltage VS through voltage dividing resistors R3 and R4. Circuit U3 only samples the voltage at node 48 for a short time and provides the output voltage VOUT (see FIG. 6) at output line 44.
At time t2 switch Q1 is again opened or turned off and remains off until time t3. At time t3, when switch Q1 is again turned on, once again voltage VS occurs across secondary winding S and instantaneously reflects the unregulated DC bus voltage VDC1. At time t3', coupler U2 again causes sample and hold circuit U3 to sample voltage VCN at node 48 providing the sampled voltage on output line 44.
It should be appreciated that a simple voltage sensing circuit has been described for sensing an unregulated DC bus voltage VDC1. It should also be appreciated that the inventive sensing circuit is relatively inexpensive, taking advantage of hardware required for a DC-to-DC converter to isolate the sensor from the unregulated DC bus voltage.
In addition to the inventive apparatus described above, the invention also includes an inventive method illustrated in FIG. 7. Referring to FIGS. 2 and 7, decision blocks 50 and 52 represent operation of opticoupler U2. At decision block 50, if Q1 is initially closed, control loops back through decision block 50 until switch Q1 is opened. After switch Q1 opens, at decision block 52, while switch Q1 remains open control continuously loops through decision block 52 and coupler U2 does not provide a signal on line 42. When switch Q1 is turned on and closes, at decision block 52, coupler U2 provides a trigger signal on line 42 causing circuit U3 to sample the common node voltage VCN at node 48. This occurs at process block 54. At block 56, output voltage VOUT is provided on line 44 and then control of coupler U2 and sample and hold circuit U3 loops again up to decision block 50. At process block 58 controller 16 (see FIG. 1) calculates the estimated unregulated DC bus voltage VDC1 according to Equation 1 above.
It should be understood that the methods and apparatuses described above are only exemplary and do not limit the scope of the invention, and that various modifications could be made by those skilled in the art that would fall under the scope of the invention. For example, while the invention is described in the context of a flyback converter, it is contemplated that the inventive voltage sensing circuit could be employed in other types of DC-to-DC converter configurations including forward converter, a buck converter, a boost converter and so on.
To apprise the public of the scope of the present invention the following claims are made.
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|U.S. Classification||363/21.15, 363/21.01, 363/97, 323/902|
|Cooperative Classification||Y10S323/902, H02M3/33561|
|Jun 10, 1999||AS||Assignment|
Owner name: ALLEN-BRADLEY COMPANY, LLC, WISCONSIN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:GILMORE, THOMAS P.;REEL/FRAME:010028/0209
Effective date: 19990429
|Feb 9, 2004||FPAY||Fee payment|
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|Feb 8, 2008||FPAY||Fee payment|
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