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Publication numberUS6455909 B1
Publication typeGrant
Application numberUS 09/726,591
Publication dateSep 24, 2002
Filing dateDec 1, 2000
Priority dateDec 3, 1999
Fee statusPaid
Publication number09726591, 726591, US 6455909 B1, US 6455909B1, US-B1-6455909, US6455909 B1, US6455909B1
InventorsYoshinori Muramatsu, Tsuyoshi Nagata
Original AssigneeNec Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Image sensor
US 6455909 B1
Abstract
A MOS type image sensor including a plurality of pixel array sections each including, as interconnects traversing the pixel array section, a signal reset line and a row selection line stacked with each other and sandwiching a dielectric film. In the image sensor, the areas of the signal reset line and the row selection line occupied in the pixel section can be reduced to consequently increase the area of the light-receiving section occupied in the pixel section, thereby increasing the sensitivity to light.
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Claims(12)
What is claimed is:
1. A MOS type image sensor comprising a pixel array including a plurality of pixel sections, each of the pixel sections generating a signal charge by photoelectric conversion, a row selection line disposed for each row of the pixel sections for selecting the row of the pixel sections, a signal reset line disposed for each row of the pixel sections for resetting the row of the pixel sections to a reset level, and a signal output line disposed for each column of the pixel sections for outputting the signal charge and the reset level from the corresponding column of the pixel sections selected by the row selection line, wherein the row selection line and the signal reset line are stacked sandwiching therebetween a dielectric film.
2. The MOS type image sensor as defined in claim 1, wherein a resistance per unit area of the row selection line is higher than that of the signal reset line.
3. The MOS type image sensor as defined in claim 2, wherein the row selection line is made of a first conductive material containing silicon and the signal reset line is made of a second conductive material containing aluminum.
4. The MOS type image sensor as defined in claim 1, wherein a sectional area of the row selection line is smaller than that of the signal reset line made of a conductive material substantially the same as that of the row selection line.
5. The MOS type image sensor as defined in claim 4, wherein the width of the row selection line is smaller than that of the signal reset line.
6. The MOS type image sensor as defined in claim 4, wherein the conductive material is substantially the same as that of a gate electrode of a transistor included in the image sensor.
7. A MOS type image sensor comprising a pixel array including a plurality of pixel sections, each of the pixel sections generating a signal charge by photoelectric conversion, a row selection line disposed for each row of the pixel sections for selecting the row of the pixel sections, a signal reset line disposed for each row of the pixel sections for resetting the row of the pixel sections to a reset level, and a signal output line disposed for each column of the pixel sections for outputting the signal charge and the reset level from the corresponding column of the pixel sections selected by the row selection line, wherein a resistance per unit area of the row selection line is higher than that of the signal reset line and the row selection line and the signal reset line are stacked sandwiching therebetween a dielectric film.
8. The MOS type image sensor as defined in claim 7, wherein the row selection line is made of a first conductive material containing silicon and the signal reset line is made of a second conductive material containing aluminum.
9. The MOS type image sensor as defined in claim 7, wherein the width of the row selection line is smaller than that of the signal reset line.
10. The MOS type image sensor as defined in claim 7, wherein a conductive material of the signal reset line and the row selection line is substantially the same as that of a gate electrode of a transistor included in the image sensor.
11. The MOS type image sensor as defined in claim 1, further comprising a photodiode and an amplifier in the pixel sections.
12. The MOS type image sensor as defined in claim 7, further rising a photodiode and an amplifier in the pixel sections.
Description
BACKGROUND OF THE INVENTION

(a) Field of the Invention

The present invention relates to a MOS type image sensor suitably used for a camera and a reading device.

(b) Description of the Related Art

The MOS (metal oxide Semiconductor) type image sensor can be fabricated in a standardized MOS process, different from a CCD image sensor requiring dedicated processes The MOS type image sensor attracting the public attention in these days has advantages that lower electric power consumption can be achieved by an operation with a lower voltage and a single electric power source, and peripheral logic elements and macroelements can be mounted on a single chip.

In FIG. 1, an exemplified layout of a pixel section of the conventional MOS type image sensor developed by E. R. Fossum et al. (SPIE, 1900, pp.2-14, 1993) is shown. In this layout, a MOS type image sensor includes a pixel array including a plurality of pixel areas, each of the pixel areas generating a signal charge by photoelectric conversion, a row selection line disposed for each row of the pixel areas for selecting the row of the pixel areas, a signal reset line disposed for each row of the pixel areas for resetting the row of the pixel areas to a reset level, and a signal output line disposed for each column of the pixel areas for outputting the signal charge and the reset level from the corresponding column of the pixel areas selected by the row selection line. The signal reset line “R” and the row selection line “S” made of the same interconnect material has substantially same width and thickness.

In each of the pixel sections, the signal charge generated by the photoelectric conversion in the pixel section is taken out by a transmission line “TX”by way of a transfer FET to an output line VOUT. The signal charge is taken out by raising the potential of the row selection line “S” to a high level to raise the gate potential of the transfer FET. The reset line “R” is activated when the row selection line “S” is maintained at the high level. After the resetting, a reference signal is taken out to the output line VOUT The irregularities among the pixel sections are cancelled by using the difference between the signal level by the signal charge and the reset level by the resetting.

In FIG. 2 showing the read timing of the conventional image sensor, the row selection line “S” is, at first, activated to a high level to take out a signal charge in a light-receiving section “PG” for reading. When the row selection line “S” is maintained at the high level, the signal reset line “R” is activated to a high level and the reset level is taken out for reading after the reading of the signal charge.

However, the conventional technique has the following problems. In the arrangement between the signal reset line “R” and the row selection line “S” in the conventional image sensor, the area occupied in the pixel lo section by the pair of the lines “R” and “S” increases to consequently reduce the area occupied in the pixel section by the light-receiving section “PG”, thereby reducing the sensitivity to light.

As shown in FIG. 2, further in the conventional image sensor in which the signal reset line “R” and the row selection line “S” having substantially same width and thickness are adjacent to each other, each of the lines may generate coupling noises 14 due to the capacitance between the interconnects at the time of the rise and the fall of the signal. Especially, when the signal reset is malfunctioned at the time of activating the row selection line “S”, the signal level subjected to the photoelectric conversion at the light-receiving section “PG” may be destroyed.

SUMMARY OF THE INVENTION

In view of the foregoing, an object of the present invention is to provide an image sensor in which a larger area for a light-receiving section can be secured by reducing an area occupied by lines in a row direction, and a signal subjected to photoelectric conversion at the light-receiving section is hardly destroyed.

The present invention provides a MOS type image sensor including a pixel array including a plurality of pixel areas, each of the pixel areas generating a signal charge by photoelectric conversion, a row selection line disposed for each row of the pixel areas for selecting the row of the pixel areas, a signal reset line disposed for each row of the pixel areas for resetting the row of the pixel areas to a reset level, and a signal output line disposed for each column of the pixel areas for outputting the signal charge and the reset level from the corresponding column of the pixel areas selected by the row selection line, wherein the row selection line and the signal reset line are stacked sandwiching therebetween a dielectric film.

In accordance with the present invention, the areas of the signal reset line and the row selection line occupied in the pixel section can be reduced to consequently increase the area of the light-receiving section occupied in the pixel section, thereby increasing the sensitivity to light. Further, when the resistance of the row selection line is higher than that of the signal reset line, coupling noises are mainly generated in the row selection side and seldom generated in the signal reset line side at the time of the rise and the fall of the signal. Accordingly, the signal level obtained by photoelectric conversion in the pixel section is not destroyed.

The above and other objects, features and advantages of the present invention will be more apparent from the following description.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic view showing a conventional is image sensor.

FIG. 2 is a diagram showing waveforms obtained in the conventional image sensor.

FIG. 3 is a schematic view showing an image sensor in accordance with a first embodiment of the present invention.

FIG. 4 is a diagram showing waveforms obtained in the image sensor of the first embodiment.

PREFERRED EMBODIMENTS OF THE INVENTION

Now, the present invention is more specifically described with reference to accompanying drawings.

In FIG. 3 showing an image sensor in accordance with a first embodiment of the present invention, a signal reset line 12 and a row selection line 13 traversing a pixel section 11 are stacked with each other and sandwiching a dielectric film. The signal reset line 12, the row selection line 13 and the dielectric film are formed in accordance with the conventional thin-film-deposition technique and the micro-processing technique, and the width of the row lo selection line 13 is narrower than that of the signal reset line 12.

The resistance of the row selection line 13 made of, for example, a polycrystalline silicon-based material is higher than that of the signal reset line 12 made of, for example, an aluminum-based material. The resistance per unit area of the polycrystalline silicon-based material is higher than that of the aluminum-based material.

Although not shown in the drawings, a power source line, a reading line, the light-receiving section for photoelectric conversion including a photodiode and a MOS switching transistor, an amplifier, a reset switch and a selection switch are included in the pixel section 11 formed in accordance with the conventional thin-film-deposition technique and the micro-processing technique, other than the signal reset line 12 and the row selection line 13.

In FIG. 4 showing the read timing of the signal charge at the light-receiving section of the image sensor of the first embodiment, the row selection line 13 is, at first, activated to a high level to take out a signal charge in the light-receiving section for reading similarly to the conventional technique. When the row selection line 13 is maintained in the high level, the signal reset line 12 is once activated to a high level and the reset level is taken out for reading after the reading of the signal charge. At this stage, since the resistance of the signal reset line 12 is lower than the row selection line 13, coupling noises 14 are generated at the signal level of the row selection line 13 at the time of the rise and the fall of the signal level of the signal reset line 12. On the other hand, since the resistance of the row selection line 13 is higher than that of the signal reset line 12, the signal level of the signal reset line 12 is not affected by the coupling noises 14 at the time of the rise and the fall of the signal level of the row selection line 13. Accordingly, the noise conventionally generated is not generated as shown in FIG. 4

In the image sensor of the first embodiment having the stacked signal reset line 12 and row selection line 13, the area of the row direction selection lines occupied in the pixel section 11 can be reduced to consequently increase the area of the light-receiving section occupied in the pixel section, thereby increasing the sensitivity to light.

The higher resistance of the row selection line 13 than that of the signal reset line 12 generates no coupling noise affecting the signal reset line 12 at the time of the rise and the fall of the row selection line 13 and does not destroy the signal level obtained by the photoelectric conversion in the pixel section. Although the row selection line 13 is affected by the coupling noise at the time of the rise and the fall of the signal reset line 12, the affection does not hinder the reading operation.

Although the signal reset line 12 and the row selection line 13 are activated to the high level in the first embodiment, these lines may be activated to a low level depending on kinds of switches for the row selection and the signal reset.

In another embodiment having the basic configuration similar to that of the first embodiment, materials such as polycrystalline silicon and tungsten silicide used as a gate electrode material of a transistor formed in the image sensor may be used as those for the signal reset line 12 and the row selection line 13. In the embodiment, in order to increase the resistance of the row selection line 13 higher than that of the signal reset line 12, the sectional area of the row selection line 13 is adjusted smaller than that of the signal reset line 12 to increase the resistance of the row selection line 13 in place of changing the interconnect materials.

In this embodiment, since the two lines 13 and 12 can also function as a gate of a transistor, no contact region for connecting the interconnect and the gate of the transistor is required, thereby reducing the layout area of the interconnect occupied in the pixel section 11. Further, the surface areas are adjusted by thinning the row selection line 13 than the signal reset line 12 to reduce the bonding capacitance with the signal reset line 12, thereby reducing the influence of the coupling noise. is Moreover, the higher resistance of the row selection line 13 can be realized by making the thickness thereof thinner than that of the signal reset line 12.

Since the above embodiments are described only for examples, the present invention is not limited to the above embodiments and various modifications or alternations can be easily made therefrom by those skilled in the art without departing from the scope of the present invention.

Patent Citations
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Non-Patent Citations
Reference
1Eric R. Fossum, "Active Pixel Sensors: Are CCD's Dinosaurs?", SPIE, vol. 1900, pp. 2-14, (1993), Jet Propulsion Laboratory, California Institute of Technology, 4800 Oak Grove Drive, Pasadena, California 91109.
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6774420Nov 19, 2002Aug 10, 2004Graphic Techno Japan Co., Ltd.Plurality of pixels having oxide film formed on semiconductor substrate; gate electrode; photodiode n-ype region interfaceing oxide film; reduction of leakage or heat noise
Classifications
U.S. Classification257/444, 257/E27.131, 257/459, 257/E27.132, 257/443
International ClassificationH04N5/357, H04N5/369, H04N5/335, H04N5/374, H01L31/00, H01L27/146
Cooperative ClassificationH01L27/14603, H01L27/14609
European ClassificationH01L27/146A2
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May 13, 2014ASAssignment
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Owner name: TESSERA ADVANCED TECHNOLOGIES, INC., CALIFORNIA
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Feb 19, 2003ASAssignment
Owner name: NEC ELECTRONICS CORPORATION, JAPAN
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Dec 1, 2000ASAssignment
Owner name: NEC CORPORATION, JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MURAMATSU, YOSHINORI;NAGATA, TSUYOSHI;REEL/FRAME:011323/0779
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Owner name: NEC CORPORATION 7-1 SHIBA 5-CHOME, MINATA-KU TOKYO