|Publication number||US6465374 B1|
|Application number||US 09/482,222|
|Publication date||Oct 15, 2002|
|Filing date||Jan 13, 2000|
|Priority date||Oct 21, 1997|
|Also published as||WO2001052309A1|
|Publication number||09482222, 482222, US 6465374 B1, US 6465374B1, US-B1-6465374, US6465374 B1, US6465374B1|
|Inventors||Jeffery W. Butterbaugh, Brent Schwab|
|Original Assignee||Fsi International, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (69), Non-Patent Citations (34), Referenced by (14), Classifications (16), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application is a Continuation-In-Part application from U.S. application Ser. No. 08/955,355, filed Oct. 21, 1997, now U.S. Pat. No. 6,165,273 the contents of which is hereby incorporated by reference.
The present invention pertains to a process for gas phase removal of contaminants such as oxides, organics and metals from the surface of a substrate.
The removal of contamination from a substrate is an important step in the semiconductor fabrication process. Trace metals and other contaminants can cause degradation of device performance if not removed from the substrate surface. Contamination, whether in the form of oxide, organics or metals, can arise from a number of sources including wet chemicals, photoresist, ion implantation and redeposition of sputtered materials from chamber surfaces during plasma processing.
Many different etching and cleaning techniques have been developed for various semiconductor processes. Typically in the past, wet etches, such as “RCA Clean”, dominated in semiconductor fabrication processes. Gradually, as device structures have shrunk and the move toward VLSI devices grown, dry etches have gained prominence. These dry etches include plasma and gas-based etches and many were developed originally for removing oxides and carbon-based contaminants.
For dry gas-phase metal removal, for example, several systems have been reported. U.S. Pat. Nos. 5,094,701 and 5,221,366 disclose use of beta-diketone and beta-ketoimine ligand forming compounds, which are dispersed in an oxidizing atmosphere. At a sufficient temperature, volatile metal-ligand complexes are reported to be formed and then sublimed from the surface. Temperatures of 200° C. to 300° C. are indicated to be required. U.S. Pat. Nos. 5,213,621, 5,213,622, and 5,332,444 disclose other ligand forming chemical reagents which reportedly can be used in a similar manner to form volatile metal-ligand complexes with surface impurities which then can be sublimed from the surface.
Other dry gas-phase removal techniques involve the use of ultraviolet radiation to generate cleaning radicals. Sugino et al. (IEIC Trans. Electron. Vol. E75-C, No. 7, July 1992) describe a system for removal of Fe and Al on a silicon surface using photoexcited chlorine radicals at approximately 20 Torr and 170° C. as a cleaning gas. U.S. Pat. No. 5,221,423 issued to Sugino discloses a method for removing Al, Fe, Na and Cr by irradiating chlorine gas at a partial chlorine pressure of 20 Torr to produce chlorine radicals. U.S. Pat. No. 5,178,721 issued to Sugino discloses a Uv radical generating cleaning method in which the pressure of the chlorine gas and the pathlength of the UV are varied to maximize radical generation and cleaning efficiency. In that system, the chlorine pressure ranges from 1 Torr to atmospheric pressure. Ito (Proc. Instit. for Environ. Studies 1991 p.808) discloses a method for cleaning using photoexcited chlorine radicals wherein the chlorine is delivered at a pressure of 20 Torr.
Commonly assigned U.S. Pat. No. 5,954,884 discloses a chlorine based dry-cleaning system appropriate for removing metal contaminants from the surface of substrate in which the metal contaminant is chlorinated and reduced to a volatile metal chloride by UV irradiation.
Along with the advances in process design, advances have been made in equipment design to facilitate efficient implementation of the ever-more complex treatment processes. To that end, commonly assigned U.S. application Ser. No. 08/955355 discloses an apparatus which provides for the dual use of a UV source to heat a substrate and to facilitate photochemistry necessary for the treatment of the substrate.
There continues, however, to be a need for improved processes for removal of contaminants from substrates such as semiconductor substrates and substrates in micromechanical devices and the like. This need is amplified by the increasingly stringent performance criteria associated with the continuing drive toward miniaturization of semiconductors.
All U.S. patents and applications and all other published documents mentioned anywhere in this application are incorporated herein by reference in their entirety.
The present invention is directed in one embodiment toward a gas phase process of removing contaminants from a semiconductor substrate without roughening the substrate. The method comprises the steps of irradiating the substrate in the absence of a halogen-containing gas followed by exposing the substrate to a halogen-containing gas in the absence of ultraviolet radiation. In another embodiment, the invention is directed toward a method of treating a semiconductor substrate to remove contaminants such as silicon oxides, organic and metallics from the surface of the substrate without excessive surface roughening and without destroying desirable features on the surface of the substrate such as shallow trench isolation. The method comprises the steps of heating the substrate via the application of ultraviolet radiation in the absence of a halogen-containing gas followed by exposing the heated substrate to a halogen-containing gas in the absence of ultraviolet radiation.
In yet another embodiment the invention is directed to a method of treating a substrate comprising the steps of performing an oxide etch, heating the substrate via the application of ultraviolet radiation in the absence of a halogen-containing gas, exposing the heated substrate to a halogen-containing gas in the absence of ultraviolet radiation and subsequently oxidizing the substrate.
FIG. 1 shows a schematic of a wafer processing tool suitable for use in the practice of the invention.
FIG. 2 shows a schematic of another wafer processing tool suitable for use in the practice of the intervention.
While this invention may be embodied in many different forms, there are described in detail herein specific preferred embodiments of the invention. This description is an exemplification of the principles of the invention and is not intended to limit the invention to the particular embodiments illustrated.
The present invention pertains to processes for gas phase removal of contaminants such as oxides, organics and metals from the surface of a substrate. In general, the invention may be used to treat any microelectronic device precursor. In accordance with various embodiments of the invention, contaminants may be removed without excessive surface roughening and without destroying desirable features on the surface of the substrate.
The inventive processes are particularly suitable for cleaning a silicon substrate before depositing a transistor gate oxide. Other applications of the inventive processes include cleaning the surface of a substrate in preparation for epitaxial silicon deposition.
In one embodiment, the present invention is directed to a method of cleaning a semiconductor substrate such as a silicon substrate without exposing the bare substrate to halogen radicals. The method comprises the steps of providing a semiconductor substrate in a process chamber such as an FSIŽ ORIONŽ dry gas phase wafer processing tool, applying ultraviolet radiation to the substrate substantially or entirely in the absence of a halogen-containing gas and subsequently exposing the substrate to a halogen-containing gas in the absence of ultraviolet radiation. Where a halogen-containing gas has been present in the process chamber prior to the UV heating step, it is desirable to evacuate the gas from the chamber. It may not be necessary to completely evacuate the gas, but the halogen-containing gas should be substantially evacuated from the chamber so that halogen radicals are not generated in the heating step. In certain circumstances, up to 1 Torr of the halogen-containing gas may be present during UV heating. Typically, however, no more than 10 to 100 milli-Torr of the halogen-containing gas is present during UV heating. Desirably, the ultraviolet radiation will heat the substrate effectively to remove contaminants therefrom. Desirably, the wafer will be heated to a temperature from about 40° C. to about 500° C. More desirably, the wafer will be heated to a temperature from about 80° C. to about 350° C. Most desirably, the wafer will be heated to a temperature of about 100° C. Typically, the UV radiation will heat the substrate to a temperature in excess of about 60° C. to 80° C. over the temperature of the substrate prior to UV heating.
As discussed above, the invention calls for the use of a halogen-containing gas to treat the substrate following WV heating. Desirably, the halogen-containing gas will contain chlorine. More desirably, the halogen-containing gas will be Cl2.
Without being bound thereby, it is believed that the application of UV energy prior to treatment with halogen gas provides a dual benefit of heating the substrate to the desired temperature and chemically preparing the surface in a way that is not possible with conventional heating techniques.
Optionally, the inventive method may further include steps preceding the inventive treatment and/or following the inventive treatment.
Where the substrate to be treated includes oxides or native oxides on the surface thereof, it may be desirable to include a preparatory step to remove some or all of the oxide from the surface of the substrate. One such suitable preparation step involves exposing the substrate to gaseous (optionally anhydrous) hydrogen fluoride (HF), gaseous isopropyl alcohol (IPA) and optionally water as known in the art. The use of gaseous anhydrous hydrogen fluoride (HF), gaseous isopropyl alcohol (IPA) and optionally a small amount of water is disclosed in U.S. Pat. No. 5,022,961 issued to Izumi. The use of HF and alcohol is discussed, inter alia, in commonly assigned U.S. Pat. No. 5,922,219 issued to Fayfield and Schwab and copending and commonly assigned U.S. application Ser. Nos. 08/824512 and 09/098096. In this way, sacrificial and/or chemical and/or native oxide contamination may be removed from the surface of the substrate in advance of the UV heating step. Another suitable preparation step involves exposing the substrate to a UV/halogen treatment step, as known in the art. In this case, the use of halogen radicals is suitable because the substrate does not contain bare silicon.
As an example of a post-treatment process, the substrate, having been treated in accordance with the inventive method, may be further subjected to a deposition process in which at least one predetermined substance is deposited on the substrate or a thin film grown on the substrate. Another post-treatment process involves an oxidation step, such as exposing the substrate to oxygen with or without the simultaneous exposure to UV radiation and UV wafer heating.
In addition to being useful as a treatment method for silicon and silicon containing substrates, the above-disclosed methods may also be used for treating other substrates including gallium arsenide-based substrates. The method finds particular use in the treatment of semiconductor substrates. Other substrates which may be used in the practice of the inventive method include multiple chip carriers, flat panel displays and other electronic devices. More generally, the inventive methods disclosed herein may be used to treat any microelectronic device precursor.
As mentioned above, a suitable tool for use in practicing many of the inventive methods disclosed herein is an FSIŽ ORIONŽ dry gas phase wafer processing tool. The tool is supplied by FSI International Inc. Chaska, Minn. and is capable of operating under vacuum conditions.
As shown schematically in FIG. 1 the ORION dry gas phase wafer processing tool includes a process chamber, shown generally at 10, a first UV radiation source comprising lamphouse 14 a mounted on the exterior of the frontside of the process chamber 10 and a second UV radiation source comprising lamphouse 14 b mounted on the exterior of the backside of the process chamber 10. The bottom lamphouse is optionally rotated 90 degrees relative to the front side lamphouse. The presence of lamphouses on both sides of the process chamber allows for illumination of both sides of the wafer. The frontside of the chamber 10 and the backside of the chamber include UV transparent windows 22 a,b to allow UV light to pass from lamphouse 14 a,b into the interior of the chamber to reach the substrate. A control system for controlling the UV radiation is shown at 28 a,b. The tool further comprises a chemical delivery system shown at 26 and a vacuum pump 30 connected to the chamber 10. In operation, chemicals are delivered into the chamber 10 through inlet 35 and are exhausted through outlet 36. Further details of the ORION dry gas phase wafer processing tool may be found in commonly assigned, copending U.S. applications Ser. Nos. 08/955355, 08/860071 and 08/824512 as well as in U.S. Pat. No. 5,580,421.
Another suitable dry gas phase wafer processing tool is shown schematically, in FIG. 2. The tool shown in FIG. 2 includes a process chamber, shown generally at 10 and a UV radiation source comprising a lamphouse 14 mounted on the exterior of the reaction chamber 10. The front of the chamber 10 includes a UV transparent window 22 to allow UV light to pass from the lamphouse 14 into the interior of the chamber to reach the substrate. A chemical delivery system is shown at 26 while a control system for controlling the UV radiation is shown at 28. A vacuum pump 30 is connected to the chamber 10. In operation, chemicals are delivered into the chamber 10 through inlet 35 and are exhausted through outlet 36.
Other suitable processing systems may also be used in the practice of the inventive methods.
A silicon or other wafer with oxide thereon may be placed into the process chamber of an FSIŽ ORION platform. The oxidized wafer may initially be treated to remove organic contamination by heating the wafer to a temperature above ambient and desirably to a temperature between about 40° C. and 100° C. via UV exposure in the presence of chlorine as is known in the art. Desirably, the chlorine will be provided at a pressure ranging from 0.1 Torr to 150 Torr and more desirably at a pressure of 10 Torr. The chlorine gas is then pumped out of the process chamber to below 1 Torr and more desirably, to a pressure of below 10 milliTorr to 100 milliTorr. An oxide etch may then be performed by exposing the wafer to gaseous anhydrous hydrogen fluoride (HF) and gaseous isopropyl alcohol (IPA), as is known in the art, to remove any undesirable oxide from the surface of the wafer to exposed bare, unoxidized surface. The process chamber may then be evacuated and the wafer heated by UV illumination. Desirably, the wafer will be heated to a temperature from about 40° C. to about 500° C. More desirably, the wafer will be heated to a temperature from about 80° C. to about 350° C. Most desirably, the wafer will be heated to a temperature of about 100° C. The UV radiation is then terminated and a halogen containing chemical such as chlorine gas supplied to the process chamber. Desirably, chlorine gas will be supplied at a pressure from about 0.1 Torr to 150 Torr and more desirably, at about 10 Torr. The chlorine gas reacts with the hot surface of the substrate causing the volatilization of metallic and other contaminants present on the surface of the wafer. It is believed that during this step, chlorine may be physi-sorbed or chemi-sorbed on the surface of the wafer.
The chlorine gas is then pumped out of the chamber and the wafer removed for a subsequent processing such as a thin film growth or deposition.
The treatment method results in the removal of contaminants such as silicon oxides, organics and metallics from the wafer surface without excessive surface roughening.
The invention is illustrated by the following non-limiting examples. In each of the examples, an FSIŽ ORIONŽ dry gas phase wafer processing tool was used.
In the examples below, UV radiation was provided by a pulsed UV source comprising a xenon lamp (CFQ clear fused quartz Xenon bulb manufactured by Xenon corporation with a spectral cutoff of 190 nm) powered by a 2000 watt Xenon RC 740 power supply. The power supply was configured as a pulse forming network with a 32μ farad capacitor and a 50μ henry inductor. The UV lamp was pulsed at a rate of 7 pulses per second and at a peak capacitor voltage of 3600 Volts resulting in a 1450 Watt power output. The substrate was positioned within approximately 3 to 4 inches from the lamp.
For each of examples 1-6, a silicon wafer was placed in a process chamber and prepared by exposing the wafer to chlorine gas (10 Torr, ˜400 sccm) in the presence of UV radiation for a period of time sufficient to heat the wafer to 45° C. (typically, 5 to 6 seconds). The process chamber was then evacuated to less than 1 Torr and the wafer exposed to gaseous anhydrous HF (1000 sccm—standard cc/minute) and gaseous IPA (40 sccm) in the presence of nitrogen (1000 sccm) for a sufficient period of time to remove 200 Å of thermal oxide from the surface of the substrate. The total pressure in the process chamber was 100 Torr. The chamber was then evacuated and the thus prepared wafer subject to treatment steps described below.
Following preparation of the wafer and treatment of the wafer, an oxygen cap was provided by flowing 1000 sccm of oxygen to the wafer for 120 seconds, optionally in the presence of UV radiation. The wafer was then analyzed to determine root mean square (RMS) surface roughness. RMS surface roughness was measured using atomic force microscopy. RMS surface roughness is reported in Table 1 below.
A wafer was prepared as described above in Wafer Preparation. Following preparation of the wafer and without further processing the wafer was subjected to a post-treatment as described above in Post-treatment. The Post-treatment was carried out in presence of UV radiation from a backside lamp for 120 seconds which heated the wafer to approximately 250° C.
A wafer was prepared as described above in Wafer Preparation. Following preparation of the wafer, the wafer was subjected to UV radiation in the presence of chlorine (10 Torr) using top and bottom lamps for 50 seconds which heated the wafer to a temperature in excess of 300° C. The chamber was evacuated and the wafer then processed in accordance with the Post-treatrnent in the absence of UV radiation.
A wafer was prepared as described above in Wafer Preparation. Following preparation of the wafer, the wafer was subjected to UV radiation using a backside lamp for 30 seconds and heated to about 130° C. The UV lamp was turned off and chlorine gas (10 Torr) supplied to the chamber for 30 seconds. The chamber was then evacuated and the wafer then processed in accordance with the Post-treatment. UV radiation was applied during the Post-treatment using the backside lamp.
A wafer was prepared as described above in Wafer Preparation. Following preparation of the wafer, the wafer was subjected to UV radiation using top and bottom lamps for 10 seconds and heated to about 120° C. During this time, the wafer was also exposed to chlorine gas (10 Torr). The UV lamp was turned off and the chamber evacuated. The wafer was then processed in accordance with the Post-treatment. UV radiation was applied during the Post-treatment using the backside lamp.
A wafer was treated in accordance with Example 4, the treatment differing in that following the oxide etch, the simultaneous UV heating and chlorine exposure lasted for 30 seconds and heated the wafer to about 230° C.
A wafer was treated in accordance with Example 4, the treatment differing in that the wafer was exposed to UV radiation at a heating level in the absence of the halogen-containing gas using two lamps for 50 seconds subsequent to the oxide etch. The wafer was heated to about 300° C. The UV lamp was turned off and chlorine gas supplied to the chamber for 30 seconds. The chamber was then evacuated and the wafer was processed in accordance with the Post-treatment. UV radiation was applied during the Post-treatment using the backside lamp.
In Table 1, Pre-measure rms designates the root mean square surface roughness prior to treatment of the wafer. Post-measure rms designates the root mean square surface roughness following treatment of the wafer. Z-range (Pre) designates the difference in surface roughness from peak to valley prior to treatment of the wafer. Z-range (Post) designates the difference in surface roughness from peak to valley following treatment of the wafer. Finally, thickness designates the thickness of the oxide layer following the oxide cap. Roughness measurements were made using Atomic Force Microscopy.
As shown in table 1, the wafer of Example 2 showed an increased rms surface roughness relative to the wafers of Examples 1 and 3. This increased rms surface roughening is believed to result from the simultaneous exposure of the wafer to chlorine gas and heating of the wafer with UV radiation following preparation.
Further, the wafer of Example 6, treated in accordance with the inventive method, showed a reduced rms surface roughness relative to the wafers of Examples 4 and 5. The wafers of Examples 4 and 5 were simultaneously exposed to chlorine gas and heating of the wafer with UV radiation.
The invention is further directed to substrates treated in accordance with the inventive methods disclosed herein as well as to devices containing such substrates.
In addition to the specific embodiments claimed below, the invention is also directed to other embodiments having any other possible combination of the dependent features claimed below.
The above Examples and disclosure are intended to be illustrative and not exhaustive. These examples and description will suggest many variations and alternatives to one of ordinary skill in this art. All these alternatives and variations are intended to be included within the scope of the attached claims. Those familiar with the art may recognize other equivalents to the specific embodiments described herein which equivalents are also intended to be encompassed by the claims attached hereto.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4028135||Apr 22, 1976||Jun 7, 1977||The United States Of America As Represented By The Secretary Of The Army||Method of cleaning surfaces by irradiation with ultraviolet light|
|US4167669||Mar 29, 1978||Sep 11, 1979||Xenon Corporation||Apparatus for rapid curing of resinous materials and method|
|US4443533||Jul 23, 1982||Apr 17, 1984||Panico C Richard||Photoresist curing method|
|US4522674||Jan 24, 1984||Jun 11, 1985||Hitachi, Ltd.||Surface treatment apparatus|
|US4540466||Apr 26, 1984||Sep 10, 1985||Semiconductor Research Foundation||Method of fabricating semiconductor device by dry process utilizing photochemical reaction, and apparatus therefor|
|US4568632||Dec 14, 1983||Feb 4, 1986||International Business Machines Corporation||Patterning of polyimide films with far ultraviolet light|
|US4615756||Jul 11, 1985||Oct 7, 1986||Hitachi, Ltd.||Dry etching apparatus|
|US4643799||Dec 16, 1985||Feb 17, 1987||Hitachi, Ltd.||Method of dry etching|
|US4678536||Nov 20, 1985||Jul 7, 1987||Hitachi, Ltd.||Method of photochemical surface treatment|
|US4687544||Apr 14, 1986||Aug 18, 1987||Emergent Technologies Corporation||Method and apparatus for dry processing of substrates|
|US4689112||Oct 10, 1986||Aug 25, 1987||Emergent Technologies Corporation||Method and apparatus for dry processing of substrates|
|US4693779||Nov 14, 1985||Sep 15, 1987||Hitachi, Ltd.||Manufacturing apparatus for semiconductor devices|
|US4705593||Jun 26, 1986||Nov 10, 1987||British Telecommunications||Etching method|
|US4711790||Jul 16, 1986||Dec 8, 1987||Nec Corporation||Optical CVD method with a strong optical intensity used during an initial period and device therefor|
|US4741800||Jan 28, 1986||May 3, 1988||Semiconductor Energy Laboratory Co., Ltd.||Etching method for the manufacture of a semiconductor integrated circuit|
|US4749440||May 12, 1987||Jun 7, 1988||Fsi Corporation||Gaseous process and apparatus for removing films from substrates|
|US4756047||Oct 15, 1986||Jul 12, 1988||Dainippon Screen Mfg. Co., Ltd.||Apparatus for removing organic substance from substrate|
|US4857382||Apr 26, 1988||Aug 15, 1989||General Electric Company||Apparatus and method for photoetching of polyimides, polycarbonates and polyetherimides|
|US4871416||Nov 15, 1988||Oct 3, 1989||Oki Electric Industry Co., Ltd.||Method and device for cleaning substrates|
|US4919077||Dec 26, 1987||Apr 24, 1990||Mitsubishi Denki Kabushiki Kaisha||Semiconductor producing apparatus|
|US4986216||Jul 31, 1989||Jan 22, 1991||Mitsubishi Denki Kabushiki Kaisha||Semiconductor manufacturing apparatus|
|US5022961||Jul 24, 1990||Jun 11, 1991||Dainippon Screen Mfg. Co., Ltd.||Method for removing a film on a silicon layer surface|
|US5094701||Apr 1, 1991||Mar 10, 1992||Air Products And Chemicals, Inc.||Cleaning agents comprising beta-diketone and beta-ketoimine ligands and a process for using the same|
|US5112437||Feb 20, 1991||May 12, 1992||Dainippon Screen Mfg. Co., Ltd.||Oxide film removing apparatus and removing method thereof using azeotropic vapor mixture|
|US5119760||Jan 26, 1990||Jun 9, 1992||Symetrix Corporation||Methods and apparatus for material deposition|
|US5178721||Aug 8, 1991||Jan 12, 1993||Fujitsu Limited||Process and apparatus for dry cleaning by photo-excited radicals|
|US5183531||Aug 9, 1990||Feb 2, 1993||Sanyo Electric Co., Ltd.||Dry etching method|
|US5198388||Nov 20, 1990||Mar 30, 1993||Mitsubishi Denki Kabushiki Kaisha||Method of forming interconnection patterns|
|US5213621||Oct 11, 1991||May 25, 1993||Air Products And Chemicals, Inc.||Halogenated carboxylic acid cleaning agents for fabricating integrated circuits and a process for using the same|
|US5213622||Oct 11, 1991||May 25, 1993||Air Products And Chemicals, Inc.||Cleaning agents for fabricating integrated circuits and a process for using the same|
|US5217559||Dec 10, 1990||Jun 8, 1993||Texas Instruments Incorporated||Apparatus and method for in-situ deep ultraviolet photon-assisted semiconductor wafer processing|
|US5221366||Apr 1, 1991||Jun 22, 1993||Air Products And Chemicals, Inc.||Etching agents comprising β-diketone and β-ketoimine ligands and a process for using the same|
|US5221423||Aug 19, 1991||Jun 22, 1993||Fujitsu Limited||Process for cleaning surface of semiconductor substrate|
|US5228206||Jan 15, 1992||Jul 20, 1993||Submicron Systems, Inc.||Cluster tool dry cleaning system|
|US5288333||Jul 29, 1992||Feb 22, 1994||Dainippon Screen Mfg. Co., Ltd.||Wafer cleaning method and apparatus therefore|
|US5288684||Mar 22, 1991||Feb 22, 1994||Semiconductor Energy Laboratory Co., Ltd.||Photochemical vapor phase reaction apparatus and method of causing a photochemical vapor phase reaction|
|US5332442||Nov 12, 1992||Jul 26, 1994||Tokyo Electron Kabushiki Kaisha||Surface processing apparatus|
|US5332444||Nov 25, 1992||Jul 26, 1994||Air Products And Chemicals, Inc.||Gas phase cleaning agents for removing metal containing contaminants from integrated circuit assemblies and a process for using the same|
|US5356514||Aug 27, 1991||Oct 18, 1994||Nec Corporation||Process and apparatus for etching iron-containing materials|
|US5439553||Mar 30, 1994||Aug 8, 1995||Penn State Research Foundation||Controlled etching of oxides via gas phase reactions|
|US5470799||Apr 24, 1989||Nov 28, 1995||Mitsubishi Denki Kabushiki Kaisha||Method for pretreating semiconductor substrate by photochemically removing native oxide|
|US5571375||Aug 13, 1992||Nov 5, 1996||Dainippon Screen Mfg. Co., Ltd.||Method of removing native oxide film from a contact hole on silicon wafer|
|US5578133||Jan 12, 1993||Nov 26, 1996||Fujitsu Limited||Dry cleaning process for cleaning a surface|
|US5580421||Dec 21, 1994||Dec 3, 1996||Fsi International||Apparatus for surface conditioning|
|US5589422||Jan 15, 1993||Dec 31, 1996||Intel Corporation||Controlled, gas phase process for removal of trace metal contamination and for removal of a semiconductor layer|
|US5725677||Jun 19, 1996||Mar 10, 1998||Fujitsu Limited||Dry cleaning process for cleaning a surface|
|US5762755||Dec 21, 1992||Jun 9, 1998||Genus, Inc.||Organic preclean for improving vapor phase wafer etch uniformity|
|US5789755||Aug 28, 1996||Aug 4, 1998||New Star Lasers, Inc.||Method and apparatus for removal of material utilizing near-blackbody radiator means|
|US5814156||Nov 12, 1996||Sep 29, 1998||Uvtech Systems Inc.||Photoreactive surface cleaning|
|US5814562||Nov 16, 1995||Sep 29, 1998||Lucent Technologies Inc.||Process for semiconductor device fabrication|
|US5922219||Oct 31, 1996||Jul 13, 1999||Fsi International, Inc.||UV/halogen treatment for dry oxide etching|
|US5954644||Mar 24, 1997||Sep 21, 1999||Ohmeda Inc.||Method for ambient light subtraction in a photoplethysmographic measurement instrument|
|US5954884||Mar 17, 1997||Sep 21, 1999||Fsi International Inc.||UV/halogen metals removal process|
|US5992429||Mar 13, 1997||Nov 30, 1999||Itt Manufacturing Enterprises||Method for cleaning semiconductor wafers with an external heat source|
|US5998305||Mar 29, 1996||Dec 7, 1999||Praxair Technology, Inc.||Removal of carbon from substrate surfaces|
|US5998766||Jan 31, 1997||Dec 7, 1999||Tokyo Electron Limited||Apparatus and method for cleaning substrate surface by use of Ozone|
|US6015503||Dec 21, 1995||Jan 18, 2000||Fsi International, Inc.||Method and apparatus for surface conditioning|
|US6015759||Dec 8, 1997||Jan 18, 2000||Quester Technology, Inc.||Surface modification of semiconductors using electromagnetic radiation|
|US6065481||Mar 26, 1997||May 23, 2000||Fsi International, Inc.||Direct vapor delivery of enabling chemical for enhanced HF etch process performance|
|GB1180187A||Title not available|
|GB2181458A||Title not available|
|JPH0425116A||Title not available|
|JPH0464225A||Title not available|
|JPH0469933A||Title not available|
|JPH0547741A||Title not available|
|JPH01235232A||Title not available|
|JPS62116723A||Title not available|
|WO1990013910A1||May 4, 1990||Nov 15, 1990||The Regents Of The University Of California||Method and apparatus for processing materials|
|WO1991003075A1||Aug 21, 1990||Mar 7, 1991||Fsi International, Inc.||Gas substrate processing module|
|1||Aoyama, T. et al., "Surface Cleaning for Si Epitaxy Using Photoexcited Flourine Gas," J. Electrochem Soc., 140:366-371, (Feb. 1993).|
|2||Butterbaugh et al., "Recent Results of Ultraviolet-Initiated Processes for Cleaning and Etching of Silicon", Proceedings of the Second International Symposium on Ultra-clean Processing of Silicon Surfaces, (Acco Leuven, 1994), p. 229-233.|
|3||Daffron et al., "Removal of A1 from Silicon Surfaces using UV/C12", Proceedings of the Third International Symposium on Cleaning Technology in Semiconductor Device Manufacturing, ECS Proceedings, vol. 94-7, pp. 281-287, (Electrochemical Society, 1994).|
|4||Deal et al., "Vapor Phase Cleaning of Silicon Wafers," Mat. Res. Soc. Symp. Proc., vol. 259, pp. 361-373 (Materials Research Society, 1992).|
|5||Deal et al., "Vapor Phase Wafer Cleaning Technology," Handbook of Semiconductor Wafer Cleaning Technology, W. Kern ed., pp. 274-339 (Noyes Publications, 1993).|
|6||DeLarios et al., "Gas-Phase Cleaning of Trace Metal and Organic Contaminants from Wafers: Ultravioley Irradiated Oxygen-Based and Chlorine-Based Chemistries," Proceedings of Microcontamination 92, Oct. 27-30, 1992, Santa Clara, Ca, pp. 706-717 (1992).|
|7||Derwent patent abstract, JP 5070295 (3/93).|
|8||Derwent patent abstract, JP 52144021 (12/77).|
|9||Derwent patent abstract, JP 61-053731 (3/86).|
|10||Derwent patent abstract, JP 61-51585 (5/94).|
|11||Derwent patent abstract, JP 62086731 (4/87).|
|12||Derwent patent abstract, JP 62-166529, (7/87).|
|13||Derwent patent abstract, JP 62-174925 (7/87).|
|14||Derwent patent abstract, KR 9301193 (2/93).|
|15||Derwent patent abstract, KR 9405754 (6/94).|
|16||IFI/Plenum patent abstract, US 4,798,960 (1/89).|
|17||IFI/Plenum patent abstract, US 5,451,425 (9/95).|
|18||Ito et al., "Photo-Excited Cleaning of Silicon with Chlorine and Fluorine," Mat. Res. Soc. Symp. Proc., vol. 259, pp. 195-205 (Materials Research Society, 1992). Published by: Canon Communications, 1992, Santa Monica, Ca, USA.|
|19||Ito et al., "UV-Enhanced Dry Cleaning of Silicon Wafers", Proceedings of the First International Symposium on Cleaning Technology in Semiconductor Device Manufacturing, ECS Proceedings, vol. 90-9, (Electrochemical Society, 1990), pp. 114-120.|
|20||Ito, Takashi, "Wafer, Cleaning with Photo-Excited Halogen Radicals," Proceedings, 808-811 (1991).|
|21||JAPIO patent abstract, JP 01-104682 (4/89).|
|22||JAPIO patent abstract, JP 01-235232 (9/89).|
|23||JAPIO patent abstract, JP 06-157190 (6/94).|
|24||Lawing, Scott A. et al., "UV/C12 Etching andn Cleaning of Wafer Surfaces," FSI Internation Technical Report, (Fall, 1995).|
|25||Lawing, Scott. A. Et al., "The Mechanism of Copper Removal from a Bare Silicon Surface with Ultraviolet Excited Chlorine," Electrochemical Society Proceedings, vol. 97-35, pp. 299-306.|
|26||Limb et al., "Removal of Fe and A1 Pyrochemical Cleaning", Proceedings of the Thrid International Symposium on Cleaning Technology in Semiconductor Device Manufacturing, vol. 94-7, pp. 409-415 (1994).|
|27||Ma et al., "Vapor Phase Sio 2 Etching and Metallic Contamination Removal in an Integrated Cluster System," J. Vac. Sci Technol. B, vol. 13, No. 4, pp. 1460-1465 (1995).|
|28||Meguro, T., "Tunable UV laser induced digital etching of Ca As: wavelength dependence of etch rate and surface processes," Applied Surface Science, 106:365-368 (1996).|
|29||Patent abstract of Japan, abstract of JP 63-297563 (5/88).|
|30||Ruzyllo, Section 7-3 of Semiconductor Wafer Cleaning Technology, (2/93).|
|31||Sesselmann, W., "Chemical etching of silicon induced by excimer laser radiation," Chemtronics, 4:135-140 (Sep. 1989).|
|32||Sugino et al., "Removal of Fe and A1 on a Silicon Surface Using UV-Excited Dry Cleaning," IEICE Transactions on Electronics, vol. E75-C, No. 7, pp. 829-833, Jul. 1992.|
|33||Wolf et al., "Silicon Processing for the VLSIERA", Process Technology, vol. 1, Second Edition (2000). CK1 Section 5.5.2-p. 131-133 and CK2 Section 7.5.1-p. 238-239.|
|34||Wolf et al., "Silicon Processing for the VLSIERA", Process Technology, vol. 1, Second Edition (2000). CK1 Section 5.5.2—p. 131-133 and CK2 Section 7.5.1—p. 238-239.|
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|U.S. Classification||438/795, 977/841, 257/E21.226, 438/796, 438/906|
|International Classification||H01L21/306, H01L21/00, C23C16/48|
|Cooperative Classification||Y10S438/906, Y10S977/841, C23C16/481, H01L21/67115, H01L21/02046|
|European Classification||H01L21/67S2H6, C23C16/48B, H01L21/02F2B|
|Jan 13, 2000||AS||Assignment|
Owner name: FSI INTERNATIONAL, INC., MINNESOTA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BUTTERBAUGH, JEFFERY W.;SCHWAB, BRENT;REEL/FRAME:010509/0191
Effective date: 20000113
|May 3, 2006||REMI||Maintenance fee reminder mailed|
|Oct 16, 2006||LAPS||Lapse for failure to pay maintenance fees|
|Dec 12, 2006||FP||Expired due to failure to pay maintenance fee|
Effective date: 20061015