|Publication number||US6828859 B2|
|Application number||US 09/932,817|
|Publication date||Dec 7, 2004|
|Filing date||Aug 17, 2001|
|Priority date||Aug 17, 2001|
|Also published as||US7145396, US7352240, US8274333, US20040056719, US20040070457, US20070103238, US20080278235, WO2003017477A2, WO2003017477A3|
|Publication number||09932817, 932817, US 6828859 B2, US 6828859B2, US-B2-6828859, US6828859 B2, US6828859B2|
|Inventors||Timothy J. DuPuis|
|Original Assignee||Silicon Laboratories, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (84), Non-Patent Citations (9), Referenced by (33), Classifications (11), Legal Events (12)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The following U.S. patent application is expressly incorporated herein by reference: Ser. No. 09/842,456, entitled “RF POWER DETECTOR” by Timothy J. Dupuis et al, filed on Apr. 26, 2001 now U.S. Pat. No. 6,727,754 which is a continuation-in-part of U.S. application Ser. No. 09/660,123, filed on Sep. 12, 2000 now U.S. Pat. No. 6,549,071, entitled “POWER AMPLIFIER CIRCUITRY AND METHOD”.
This invention relates to the field of power amplifiers. More particularly, this invention relates to circuitry for protecting devices in an RF power amplifier.
In some applications utilizing a power amplifier, it is desirable to limit peak voltages to which active devices of the power amplifier are subjected. For example, in CMOS devices, the transistor breakdown voltage may be only slightly greater than the supply voltage. In RF power amplifiers, high peak voltages can be caused by load mismatches, temperature extremes, and device variations, for example. High peak voltages are capable of causing breakdown of the active devices, which can lead to reliability problems.
It can therefore be seen that there is a need for amplifier designs where peak voltages applied to active devices of the amplifier are limited so that the peak voltages are below the transistor breakdown voltages of the devices being used to implement the design.
An apparatus of the present invention provides a circuit for protecting devices in an RF power amplifier comprising: a peak detector coupled to an output of the power amplifier for detecting peak voltages at the output of the power amplifier; and control circuitry coupled to the peak detector and to the power amplifier for controlling the gain of the power amplifier, wherein the control circuitry decreases the gain of the power amplifier when the peak detector detects a voltage above a voltage threshold.
One embodiment includes a circuit comprising: an RF power amplifier having an input and an output; a peak detector coupled to the power amplifier for detecting a peak voltage at a node of the power amplifier; and power control circuitry coupled to the peak detector and to the power amplifier for controlling the gain of the power amplifier, wherein the power control circuitry limits the power at the output of the power amplifier when the peak detector detects a peak voltage greater than a threshold voltage.
Another embodiment of the invention provides a method of protecting devices in an RF power amplifier comprising the steps of: detecting a peak voltage at a first node of the power amplifier; determining whether the detected peak voltage is higher than a threshold voltage; and if it is determined that the detected peak voltage is higher than the threshold voltage, decreasing the gain of the power amplifier.
Another embodiment of the invention provides a method of controlling an RF power amplifier comprising the steps of: detecting the output power of the RF power amplifier; detecting a peak voltage at a first node of the power amplifier; increasing the gain of the power amplifier if the detected output power is less than a desired output power level and if the detected peak voltage does not exceed a threshold voltage; and decreasing the gain of the power amplifier if the detected output power is greater than the desired output power level or if the detected peak voltage exceeds a threshold voltage.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:
FIG. 1 is a block diagram of a protection circuit of the present invention used with a power amplifier.
FIG. 2 is a flowchart illustrating the operation of the power control circuitry shown in FIG. 1.
FIG. 3 is a block diagram of a circuit similar to the circuit shown in FIG. 1 illustrating one implementation of a peak detector.
FIGS. 4 and 5 are timing diagrams illustrating the use of the invention in applications where power is ramped.
In order to provide a context for understanding this description, the following illustrates an example of a typical application of the present invention. A power amplifier using the protection techniques of the present invention may be used with a wireless transmission system such as a wireless telephone or other device. In a wireless device such as a cellular telephone, the wireless device may include a transceiver, an antenna duplexer, and an antenna. Connected between the transceiver and the antenna duplexer is an RF power amplifier for amplifying signals for transmission via the antenna. This is one example of an application of a power amplifier utilizing the present invention. Of course, the invention may be used in any other application requiring a power amplifier. In the case of a wireless telephone application, the invention may be applied to GSM, CDMA, PCS, DCS, etc., or other wireless systems.
FIG. 1 is a block diagram of a protection circuit of the present invention used with a power amplifier. FIG. 1 shows a circuit 100 including a power amplifier 102 and an antenna 104 coupled to the output 106 of the power amplifier 102. A transformation network 108 is connected between the antenna 104 and the output 106 of the power amplifier 102. The input 110 of the power amplifier 102 is connected to an RF input signal RFI.
During operation, the power amplifier 102 amplifies the input signal RFI to achieve a desired output power at the antenna 104. A power detector, such as directional coupler 112, is used to detect the output power. The directional coupler 112 generates an power control signal 114 which is provided to power control circuitry 116. The power control circuitry 116 has a first input 118 for receiving an input signal relating to the requested power (i.e., the desired power level provided to the antenna 104). The desired power level may depend on various factors such that is the physical distance between a cellular phone and a base station (in a cellular phone environment). The power control circuitry 116 generates a control signal 120 which is provided to the power amplifier 102 to control the gain of the power amplifier 102.
As mentioned above, it is desirable to limit the peak voltages applied to active devices of a power amplifier resulting from a load mismatches, temperature extremes, device variations, etc. The present invention utilizes a peak detector 122 to detect the presence of peak voltages at any critical nodes of the power amplifier 102 and create a peak detection signal. An example of one suitable peak detector is described below. In the example shown in FIG. 1, the input 124 of the peak detector 122 is connected to the output 106 of the power amplifier 102. In other examples, the peak detector could be connected to other critical nodes of the power amplifier 102. In addition, the peak detector 122 (or multiple peak detectors) may be connected to multiple nodes of the power amplifier 102 to detect peak voltages at multiple nodes. The output 126 of the peak detector 122 is provided as an input to the power control circuitry 116. The power control circuitry 116 uses the output 126 from the peak detector 122 to control the power amplifier 102 in such a way that dangerous peak voltages are avoided or minimized.
FIG. 2 is a flowchart illustrating the operation of the power control circuitry shown in FIG. 1. As mentioned above, the power control circuitry 116 generates a control signal 120 based on three inputs. These inputs include the desired output power level of the power amplifier 102 (input 118), the actual detected power output level (power control signal 114), and the output of the peak detector 122 (output 126). At step 2-10, the peak voltage is detected by the peak detector 122. Next, at step 2-12, the output power is detected by the directional coupler 112. Note that the order of the steps illustrated in FIG. 2 is not essential to the invention. At step 2-14, it is determined whether the detected output power (step 2-12) is less than or equal to the requested power (as determined by the signal at input 118). If the detected output power is less than or equal to the requested power, the process proceeds to step 2-16 where it is determined whether the detected peak voltage (step 2-10) is less than the a threshold voltage (i.e., a maximum allowed voltage). The maximum allowed voltage can relate to a voltage level that does not adversely affect the active devices of the power amplifier 102, but at the same time is adequate to deliver a suitable output power level to the antenna 104. If the detected peak voltage is less than the maximum allowed voltage, the process proceeds to step 2-18 where the gain of the power amplifier 102 is increased. While FIG. 2 shows the process ending at that point, during use, the process will repeat. If, at step 2-14, it is determined that the detected output power is greater than the requested power, then the process proceeds to step 2-20 where the gain of the power amplifier 102 is decreased. Similarly, if it is determined at step 2-16 that the detected peak voltage is greater than or equal to the maximum allowed voltage, the process proceeds to step 2-20 where the gain of the power amplifier 102 is decreased.
In general, the power control circuitry 116 will adjust the gain of the power amplifier 102 until the output signal power matches the requested power. In the example described, the power control circuitry 116 increases the gain of the power amplifier 102 when the detected output power is less than the desired output power and decreases the gain when the detected output power is greater than the desired output power. However, even if the detected output power is less than the desired output power, the power control circuitry 116 will decrease the gain of the power amplifier 102 (and thereby limiting the power at the output) if the peak detector 122 has detected a peak voltage. In this way, the active devices of the power amplifier 102 are protected from high voltages, which could lead to device breakdown and overall reliability problems. The power control circuitry 116 may implement the algorithm described using analog or digital signal processing using many different techniques well known in control theory.
In some implementations, for example, if the invention is implemented using CMOS, the peak detection circuitry can be difficult to design and build with a desired accuracy. FIG. 3 is a block diagram of a circuit similar to the circuit shown in FIG. 1 illustrating one implementation of a peak detector. The circuitry illustrated in the block diagram of FIG. 3 may be used with a non-linear power amplifier and utilizes two simple peak detector circuits. FIG. 3 shows a circuit 300 which includes a power amplifier 102 and an antenna 104 coupled to the output 106 of the power amplifier 102. A transformation network 108 is connected between the antenna 104 and the output 106 of the power amplifier 102. The input 110 of the power amplifier 102 is connected to an RF input signal RFI. A directional coupler 112 generates a power control signal 114 which is provided to power control circuitry 116. The power control circuitry 116 is coupled to the power amplifier 102 and to peak detector 322.
Peak detector 322 is implemented using a first peak detector 324 and a second peak detector 326. The first peak detector 324 has an input 328 which is coupled to the output 106 of the power amplifier 102. In the example shown in FIG. 3, the input 328 is connected to a divider circuit formed by capacitors C1 and C2 connected between the power amplifier output 106 and ground. Of course, other implementations are possible. The peak detector 326 has an input 330, which is coupled to a reference tone. The reference tone may be comprised of a signal having a known amplitude at the carrier frequency. In another example, the reference tone may be comprised of a constant amplitude modulated signal (e.g., the RF input in a GSM system which has a constant amplitude and consists of GMSK modulation). The reference tone may be provided from an existing signal in the device. For example, the reference tone could come from the transmit signal of the power amplifier 102 prior to final stage amplification. In this implementation, the peak detectors 324 and 326 are matched so there are no absolute accuracy requirements on the peak detectors. The output 126 of the peak detector 322 is generated by subtracting the output of the second peak detector 326 from the output of the first peak detector 324. The output 126 provides a peak feedback signal (PFB) represented by the following the equation:
where “peak_RFO” is the peak voltage of the output of the power amplifier 102 as detected by the first peak detector 324 and “peak_tone” is the peak voltage of the reference tone as detected by the second peak detector 326. If the peak feedback signal FBS at output 126 is positive, then the peak voltage detected by the peak detector 322 is too high. Otherwise, the peak voltage is satisfactory.
Note that the peak feedback signal at output 126 may be generated using various types of peak detectors. In one example, the peak detectors may be comprised of conventional peak detectors that simply detect the peak voltage of a signal. In another example, where the signal detected is of a known type (such as a sine wave, square wave, etc.), each peak detector may be provided by the combination of an RMS detector followed by a correction circuit. Other examples may include other types of circuits that can detect some function of the waveform that relates to the peak voltage of the waveform.
In the case where the invention is used with applications where power is ramped up from zero in a controlled manner, the invention will not allow peak voltages on the output of the power amplifier to get higher than the maximum allowed voltage. This protects the active devices in the power amplifier, while limiting the ability of the power amplifier to deliver power to the load. FIGS. 4 and 5 are timing diagrams illustrating the use of the invention in applications where power is ramped. FIG. 4 shows an example where no peak voltages are detected which exceeds the maximum allowed peak voltage. FIG. 4 shows a first plot 410 which represents the requested power signal at input 118 shown in the Figures. As shown, the plot 410 starts at zero and ramps up until it reaches a desired level (e.g., 1 W). A second plot 412 is shown which represents the power measured by the directional coupler. Since no excessive peak voltages were detected in this example, the measured power ramps up and down along with the requested power signal.
FIG. 5 shows an example where a peak voltage is detected that exceeds the maximum allowed peak voltage. The arrow 508 shown in FIG. 5 illustrates the point at which a peak voltage is detected by the peak detector. When the peak voltage is detected, the power control circuitry protects the active devices in the power amplifier by reducing the gain and thus the output power of the power amplifier. In the example shown, the power measured at the output of the power amplifier (plot 512) is reduced to 0.75 Watts.
In the preceding detailed description, the invention is described with reference to specific exemplary embodiments thereof. Various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US3900823||Mar 28, 1973||Aug 19, 1975||Alan D Sokal||Amplifying and processing apparatus for modulated carrier signals|
|US4021751||Nov 3, 1975||May 3, 1977||Sony Corporation||Field effect transistor amplifier|
|US4075574||Jul 15, 1976||Feb 21, 1978||Tektronix, Inc.||Wideband differential amplifier|
|US4165493||Apr 17, 1978||Aug 21, 1979||Rockwell International Corporation||Protected amplifier apparatus|
|US4590436||Apr 27, 1984||May 20, 1986||Gte Laboratories Incorporated||High voltage, high frequency amplifier circuit|
|US4604532||Jan 24, 1985||Aug 5, 1986||Analog Devices, Incorporated||Temperature compensated logarithmic circuit|
|US4649467||Jul 31, 1985||Mar 10, 1987||United Technologies Corporation||High efficiency MOSFET sine wave generator|
|US4772856||Jul 10, 1987||Sep 20, 1988||Nippon Telegraph And Telephone Corporation||Power amplifier|
|US4808907||May 17, 1988||Feb 28, 1989||Motorola, Inc.||Current regulator and method|
|US4857865||Nov 10, 1988||Aug 15, 1989||Hughes Aircraft Company||Self equalizing multi-stage radio frequency power amplifier|
|US4893030||Aug 16, 1988||Jan 9, 1990||Western Digital Corporation||Biasing circuit for generating precise currents in an integrated circuit|
|US4990803||Mar 27, 1989||Feb 5, 1991||Analog Devices, Inc.||Logarithmic amplifier|
|US5023566||Dec 21, 1989||Jun 11, 1991||General Electric Company||Driver for a high efficiency, high frequency Class-D power amplifier|
|US5118997||Aug 16, 1991||Jun 2, 1992||General Electric Company||Dual feedback control for a high-efficiency class-d power amplifier circuit|
|US5274341||Jul 17, 1992||Dec 28, 1993||Hitachi, Ltd.||High-frequency power amplifier|
|US5291123||Sep 9, 1992||Mar 1, 1994||Hewlett-Packard Company||Precision reference current generator|
|US5298811||Aug 3, 1992||Mar 29, 1994||Analog Devices, Inc.||Synchronous logarithmic amplifier|
|US5327337||Sep 1, 1992||Jul 5, 1994||Broadcast Electronics, Inc.||Resonant push-pull switching power amplifier|
|US5343162||Apr 6, 1993||Aug 30, 1994||At&T Bell Laboratories||RF variable gain tuned output amplifier which maintains high Q in saturation|
|US5345185||Apr 14, 1992||Sep 6, 1994||Analog Devices, Inc.||Logarithmic amplifier gain stage|
|US5420537||Sep 30, 1993||May 30, 1995||Analogic Corporation||High power solid state R.F. amplifier|
|US5434537||Feb 8, 1994||Jul 18, 1995||Nokia Mobile Phones Ltd.||Circuit for measuring the output power from an amplifier|
|US5450036||Feb 22, 1994||Sep 12, 1995||Rohm Co., Ltd.||Power amplifier circuit for audio signal and audio device using the same|
|US5477188||Jul 14, 1994||Dec 19, 1995||Eni||Linear RF power amplifier|
|US5604383||May 11, 1995||Feb 18, 1997||Fuji Electric Co., Ltd.||Stabilized power supply device using a flip chip as an active component|
|US5612647||Jun 30, 1995||Mar 18, 1997||Harris Corporation||RF power amplifier system having an improved drive system|
|US5623231||Nov 8, 1995||Apr 22, 1997||Endgate Corporation||Push-pull power amplifier|
|US5625205||Sep 24, 1996||Apr 29, 1997||Nec Corporation||Bipolar transistor circuit|
|US5635872||Nov 16, 1995||Jun 3, 1997||Maven Peal Instruments, Inc.||Variable control of electronic power supplies|
|US5646578 *||Jul 30, 1996||Jul 8, 1997||Lucent Technologies Inc.||Wide dynamic range power amplifier|
|US5648743||Mar 25, 1994||Jul 15, 1997||Fujitsu Limited||Amplifying circuit for an integrated circuit with low-noise characteristic|
|US5726603||Feb 14, 1997||Mar 10, 1998||Eni Technologies, Inc.||Linear RF power amplifier|
|US5742205||Jul 25, 1996||Apr 21, 1998||Scientific-Atlanta, Inc.||Field effect transistor cable television line amplifier|
|US5831331||Nov 22, 1996||Nov 3, 1998||Philips Electronics North America Corporation||Self-shielding inductor for multi-layer semiconductor integrated circuits|
|US5834978||Dec 23, 1996||Nov 10, 1998||Samsung Electronics Co., Ltd.||Apparatus for protecting power amp module|
|US5867061||Dec 4, 1996||Feb 2, 1999||Northern Telecom Limited||Transformer coupled stacked power amplifier|
|US5880635||Apr 16, 1997||Mar 9, 1999||Sony Corporation||Apparatus for optimizing the performance of a power amplifier|
|US5942946||Oct 10, 1997||Aug 24, 1999||Industrial Technology Research Institute||RF power amplifier with high efficiency and a wide range of gain control|
|US5955926||Oct 2, 1997||Sep 21, 1999||Sanyo Electric Co., Ltd.||Power amplifier and chip carrier|
|US5969582||Jul 3, 1997||Oct 19, 1999||Ericsson Inc.||Impedance matching circuit for power amplifier|
|US5973368||Jun 5, 1996||Oct 26, 1999||Pearce; Lawrence G.||Monolithic class D amplifier|
|US5974041||Dec 27, 1995||Oct 26, 1999||Qualcomm Incorporated||Efficient parallel-stage power amplifier|
|US5986500||Dec 30, 1997||Nov 16, 1999||Samsung Electronics Co., Ltd.||Combined linear power amplifying device and method|
|US6008698||May 18, 1998||Dec 28, 1999||Omnipoint Corporation||Amplifier with dynamically adaptable supply current|
|US6011438||Nov 19, 1998||Jan 4, 2000||Nec Corporation||Push-pull wideband semiconductor amplifier|
|US6016075||Jun 4, 1997||Jan 18, 2000||Lord Corporation||Class-D amplifier input structure|
|US6047167||Mar 3, 1997||Apr 4, 2000||Nec Corporation||Output power control device|
|US6047168||Jun 23, 1997||Apr 4, 2000||Telefonaktiebolaget Lm Ericsson||Device and method for radio transmitters|
|US6069528 *||Jul 31, 1998||May 30, 2000||Matsushita Electric Industrial Co., Ltd.||Automatic microwave gain control device|
|US6133793||Jul 27, 1998||Oct 17, 2000||Motorola, Inc.||Circuit and method of amplifying a signal for a receiver|
|US6137273||Oct 15, 1998||Oct 24, 2000||Em Microelectronic-Marin Sa||Circuit for supplying a high precision current to an external element|
|US6147511||May 27, 1997||Nov 14, 2000||Altera Corporation||Overvoltage-tolerant interface for integrated circuits|
|US6157258||Mar 17, 1999||Dec 5, 2000||Ameritherm, Inc.||High frequency power amplifier|
|US6167134||Mar 4, 1998||Dec 26, 2000||Silicon Laboratories, Inc.||External resistor and method to minimize power dissipation in DC holding circuitry for a communication system|
|US6181207||Oct 22, 1999||Jan 30, 2001||U.S. Philips Corporation||Current amplifier having a low input impedance|
|US6198347||Jul 29, 1999||Mar 6, 2001||Tropian, Inc.||Driving circuits for switch mode RF power amplifiers|
|US6203516||Aug 21, 1997||Mar 20, 2001||Bausch & Lomb Surgical, Inc.||Phacoemulsification device and method for using dual loop frequency and power control|
|US6208549||Feb 24, 2000||Mar 27, 2001||Xilinx, Inc.||One-time programmable poly-fuse circuit for implementing non-volatile functions in a standard sub 0.35 micron CMOS|
|US6208875||Apr 8, 1998||Mar 27, 2001||Conexant Systems, Inc.||RF architecture for cellular dual-band telephones|
|US6222788||May 30, 2000||Apr 24, 2001||Micron Technology, Inc.||Vertical gate transistors in pass transistor logic decode circuits|
|US6232634||Jul 29, 1998||May 15, 2001||Motorola, Inc.||Non-volatile memory cell and method for manufacturing same|
|US6265939||Mar 24, 2000||Jul 24, 2001||International Business Machines Corporation||Linear power detectors and methods for power amplifiers|
|US6274937||Feb 1, 1999||Aug 14, 2001||Micron Technology, Inc.||Silicon multi-chip module packaging with integrated passive components and method of making|
|US6319829||Aug 18, 1999||Nov 20, 2001||International Business Machines Corporation||Enhanced interconnection to ceramic substrates|
|US6323735||May 25, 2000||Nov 27, 2001||Silicon Laboratories, Inc.||Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors|
|US6362606||Sep 12, 2000||Mar 26, 2002||Silicon Laboratories, Inc||Method and apparatus for regulating a voltage|
|US6384540||Feb 24, 1998||May 7, 2002||Advanced Energy Industries, Inc.||System for high power RF plasma processing|
|US6392488||Sep 12, 2000||May 21, 2002||Silicon Laboratories, Inc.||Dual oxide gate device and method for providing the same|
|US6407639||May 25, 1999||Jun 18, 2002||Koninklijke Philips Electronics N.V.||Radio frequency device including a power amplifier circuit and a stabilizer circuit, and mobile transceiver terminal including such a device|
|US6448847||Sep 12, 2000||Sep 10, 2002||Silicon Laboratories, Inc.||Apparatus and method for providing differential-to-single ended conversion and impedance transformation|
|US6462620||Sep 12, 2000||Oct 8, 2002||Silicon Laboratories, Inc.||RF power amplifier circuitry and method for amplifying signals|
|US6492872||Sep 7, 2000||Dec 10, 2002||Hitachi, Ltd.||High frequency power amplifying module and wireless communication apparatus|
|US6525611||Aug 1, 2001||Feb 25, 2003||Rf Micro Devices, Inc.||Power amplifier protection|
|US6646511||Nov 12, 2002||Nov 11, 2003||Skyworks Solutions, Inc.||Power amplifier with provisions for varying operating voltage based upon power amplifier output power|
|US20020044018||Apr 26, 2001||Apr 18, 2002||Dupuis Timothy J.||RF Power detector|
|DE4419318A1||Jun 1, 1994||Dec 7, 1995||Microelectronics Tech Inc||HF single-pole throw switch e.g. for switching satellite signals to receiver|
|EP0399561A2||May 25, 1990||Nov 28, 1990||Hughes Aircraft Company||VHF DC-DC power supply|
|EP0654898A2||Nov 18, 1994||May 24, 1995||Matsushita Communication Industrial Co., Ltd.||Transmission circuit|
|GB2123231A||Title not available|
|JP2000174559A||Title not available|
|JPH03128513A *||Title not available|
|WO1998037627A1||Feb 24, 1998||Aug 27, 1998||Advanced Energy Ind Inc||Series powered, parallel output radio frequency generator|
|WO2000016492A1||Sep 10, 1999||Mar 23, 2000||Cho Thomas B||A single-chip cmos direct-conversion transceiver|
|WO2002023716A2||Sep 11, 2001||Mar 21, 2002||Silicon Lab Inc||Power amplifier circuitry and method|
|1||G. Trauth V. Vanhufffel J. Trichet, "An Advanced Controller for Multi-Band Open Loop Power Control Mode RF Power Amplifier", Microwave Engineering, Jul. 2002, pp. 39-40.|
|2||*||Huang et al "A BiCMOS Automatic Gain Control Amplifier for SONET OC-3" Proceeding of the IEEE Custom Integrated Circuits Conference May 1-4, 1995, pp 103-106.*|
|3||Makihara, Chihiro et al., "The Possibility of High Frequency Functional Ceramics Substrate", International Symposium on Mulilayer Electronic Ceramic Devices, May 5, 1998 in Cincinnati, Ohio.|
|4||RF Micro Devices, Inc., RF3110 Triple-Band GSM/DCS/PCS Power AMP Module Data Sheet, pp. 2-401-2-412.|
|5||Scuderi et al., "A High Performance RF Power Amplifier with protection against load mismatches", IEEE Microwave Symposium Digest, vol. 2, Jun. 8-13, 2003, pp. 699-702.|
|6||Sokal, N. O. and Sokal, A. D., "Class E-A new class of high-efficiency tuned single ended switching power amplifiers," IEEE Journal of Solid State Circuits, vol. SC-10, No. 3, Jun. 1975, pp. 168-176.|
|7||Sokal, N. O. and Sokal, A. D., "Class E—A new class of high-efficiency tuned single ended switching power amplifiers," IEEE Journal of Solid State Circuits, vol. SC-10, No. 3, Jun. 1975, pp. 168-176.|
|8||Toffolo et al., "Development of a CMOS switched capacitor instrumentation amplifier", IEEE Colloquium on ASICS, Apr. 10, 1992 pp 2/1.|
|9||Webster, "Websters Ninth New Collegiate Dictionary", Merriam-Webster, 1991, p. 971.|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US7064605||Dec 22, 2003||Jun 20, 2006||Silicon Laboratories Inc.||Circuit and method of establishing DC bias levels in an RF power amplifier|
|US7106137||Jun 30, 2004||Sep 12, 2006||Silicon Laboratories Inc.||Method and apparatus for controlling the output power of a power amplifier|
|US7113045||Dec 22, 2003||Sep 26, 2006||Silicon Laboratories Inc.||Power amplifier input structure having a differential output|
|US7161427||Dec 22, 2003||Jan 9, 2007||Silicon Laboratories Inc.||Input structure for a power amplifier and associated methods|
|US7173491||Mar 31, 2004||Feb 6, 2007||Silicon Laboratories Inc.||Fast settling power amplifier regulator|
|US7212070||Dec 22, 2003||May 1, 2007||Silicon Laboratories Inc.||Circuit and method of reducing noise in an RF power amplifier|
|US7233199||Mar 30, 2006||Jun 19, 2007||Silicon Laboratories Inc.||Circuit and method of establishing DC bias levels in an RF power amplifier|
|US7382166 *||Sep 7, 2006||Jun 3, 2008||Fujitsu Limited||Signal amplification device|
|US7454179 *||Nov 15, 2005||Nov 18, 2008||Rf Micro Devices, Inc.||Radio frequency power detector and decision circuit used with DC supply voltage controlled power amplifiers|
|US7502601||Dec 22, 2003||Mar 10, 2009||Black Sand Technologies, Inc.||Power amplifier with digital power control and associated methods|
|US7522892||Dec 22, 2003||Apr 21, 2009||Black Sand Technologies, Inc.||Power amplifier with serial interface and associated methods|
|US7539613 *||Feb 10, 2004||May 26, 2009||Oki Electric Industry Co., Ltd.||Device for recovering missing frequency components|
|US7751783||Jun 30, 2004||Jul 6, 2010||Black Sand Technologies, Inc.||Power amplifier protection circuit and associated methods|
|US7751784||Jun 30, 2004||Jul 6, 2010||Black Sand Technologies, Inc.||Method of protecting power amplifiers|
|US7944196 *||Dec 22, 2009||May 17, 2011||Hittite Microwave Corporation||RF detector with crest factor measurement|
|US7974596 *||Dec 27, 2006||Jul 5, 2011||Silicon Laboratories Inc.||Power control scheme for a power amplifier|
|US8283931 *||Oct 9, 2012||Stmicroelectronics S.A.||Qualifying of a detector of noise peaks in the supply of an integrated circuit|
|US8471629||Jun 30, 2011||Jun 25, 2013||Silicon Laboratories Inc||Providing automatic power control for a power amplifier|
|US20050024145 *||Mar 31, 2004||Feb 3, 2005||Bocock Ryan M.||Fast settling power amplifier regulator|
|US20050030100 *||Jun 30, 2004||Feb 10, 2005||Dupuis Timothy J.||Method and apparatus for controlling the output power of a power amplifier|
|US20050134375 *||Dec 22, 2003||Jun 23, 2005||Westwick Alan L.||Circuit and method of reducing noise in an RF power amplifier|
|US20050134376 *||Dec 22, 2003||Jun 23, 2005||Westwick Alan L.||Circuit and method of establishing DC bias levels in an RF power amplifier|
|US20050134378 *||Dec 22, 2003||Jun 23, 2005||Westwick Alan L.||Input structure for a power amplifier and associated methods|
|US20050134386 *||Dec 22, 2003||Jun 23, 2005||Westwick Alan L.||Power amplifier input structure having a differential output|
|US20050136865 *||Dec 22, 2003||Jun 23, 2005||Dupuis Timothy J.||Power amplifier with digital power control and associated methods|
|US20050136866 *||Dec 22, 2003||Jun 23, 2005||Dupuis Timothy J.||Power amplifier with serial interface and associated methods|
|US20060003711 *||Jun 30, 2004||Jan 5, 2006||Ouzillou Mendy M||Power amplifier protection circuit and associated methods|
|US20060003713 *||Jun 30, 2004||Jan 5, 2006||Ouzillou Mendy M||Method of protecting power amplifiers|
|US20060244525 *||Mar 30, 2006||Nov 2, 2006||Westwick Alan L||Circuit and method of establishing dc bias levels in an rf power amplifier|
|US20070168185 *||Feb 10, 2004||Jul 19, 2007||Oki Electric Industry Co., Ltd.||Device for recovering missing frequency components|
|US20080012574 *||Jun 15, 2007||Jan 17, 2008||Stmicroelectronics S.A.||Qualifying of a detector of noise peaks in the supply of an integrated circuit|
|US20080122539 *||Sep 7, 2006||May 29, 2008||Fujitsu Limited||Signal amplification device|
|US20100097143 *||Dec 22, 2009||Apr 22, 2010||Hittite Microwave Corporation||Rf detector with crest factor measurement|
|U.S. Classification||330/279, 330/285, 330/207.00P, 330/298|
|Cooperative Classification||H03G3/3042, H03G3/3047, H03F1/52|
|European Classification||H03G3/30D2B, H03F1/52, H03G3/30D2|
|Aug 17, 2001||AS||Assignment|
|Jun 6, 2008||FPAY||Fee payment|
Year of fee payment: 4
|Jun 16, 2008||REMI||Maintenance fee reminder mailed|
|Jul 16, 2008||AS||Assignment|
Owner name: BLACK SAND TECHNOLOGIES, INC.,TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SILICON LABORATORIES INC.;REEL/FRAME:021243/0389
Effective date: 20080417
|Mar 5, 2009||AS||Assignment|
Owner name: COMERICA BANK,TEXAS
Free format text: SECURITY AGREEMENT;ASSIGNOR:BLACK SAND TECHNOLOGIES, INC.;REEL/FRAME:022343/0475
Effective date: 20071115
|Jul 14, 2009||AS||Assignment|
Owner name: SILICON LABORATORIES INC., TEXAS
Free format text: SECURITY AGREEMENT;ASSIGNOR:BLACK SAND TECHNOLOGIES, INC.;REEL/FRAME:022951/0423
Effective date: 20080417
|May 9, 2012||FPAY||Fee payment|
Year of fee payment: 8
|Jun 27, 2014||AS||Assignment|
Owner name: BLACK SAND TECHNOLOGIES, INC., CALIFORNIA
Free format text: MERGER;ASSIGNOR:WAVEFORM ACQUISITION CORPORATION;REEL/FRAME:033247/0787
Effective date: 20140618
|Jun 30, 2014||AS||Assignment|
Owner name: BLACK SAND TECHNOLOGIES, INC., TEXAS
Free format text: RELEASE OF SECURITY INTEREST;ASSIGNOR:COMERICA BANK;REEL/FRAME:033258/0225
Effective date: 20140627
|Aug 7, 2014||AS||Assignment|
Owner name: BLACK SAND TECHNOLOGIES, INC., TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SILICON LABORATORIES INC.;REEL/FRAME:033500/0122
Effective date: 20140612
|Sep 12, 2014||AS||Assignment|
Owner name: BLACK SAND TECHNOLOGIES INC., CALIFORNIA
Free format text: RELEASE OF SECURITY INTEREST;ASSIGNOR:SILICON LABORATORIES INC.;REEL/FRAME:033729/0183
Effective date: 20140610
|Oct 28, 2014||AS||Assignment|
Owner name: QUALCOMM INCORPORATED, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:BLACK SAND TECHNOLOGIES, INC.;REEL/FRAME:034077/0072
Effective date: 20141024