|Publication number||US6864696 B2|
|Application number||US 10/285,223|
|Publication date||Mar 8, 2005|
|Filing date||Oct 31, 2002|
|Priority date||Oct 31, 2002|
|Also published as||US20040085081|
|Publication number||10285223, 285223, US 6864696 B2, US 6864696B2, US-B2-6864696, US6864696 B2, US6864696B2|
|Inventors||Donald M. Logelin, Bob J. Self, Robert H. Wardwell|
|Original Assignee||Agilent Technologies, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (2), Referenced by (19), Classifications (8), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
Designers of test and measurement equipment face a variety of challenges in creating cables and connectors that form probes for interfacing with a device under test (DUT). Designers are always trying to fit an ever-increasing number of connections into a constantly decreasing area on the DUT for interfacing. At the same time, the signaling rate and frequency content of the signals being probed is also increasing. This presents several challenges to the designers of such probes.
For example, it has proven difficult to provide a highly compact array of connections that minimize the footprint and at the same time place probe tip networks, such as isolation circuits, extremely close to the pads of the grid array on the DUT. More specifically, manufacturers of devices being tested with such probes desire an array having a center-to-center distance of less than 1 millimeter. Further, when such probes are used to transfer high bandwidth (greater than 1 Ghz) signals, signal isolation and signal fidelity become a problem, especially when attempting to interface with a large number of signals (greater than 100) in a small area (less than 0.25 sq. in.). It has also proven quite difficult to minimize the capacitive loading of the probe, to less than 1 pF per signal, on a DUT with such a great number of connections. Finally, it is desirable that probes have a minimal electrical transmission line stub length between the probed pad and the isolation components minimizing the effects of the probe on the high-speed signals of the DUT.
The Inventors of the present invention have determined a need for a probe that increases the density of connections, while minimizing capacitance loading and stub length while maximizing usability of the probe.
An understanding of the present invention can be gained from the following detailed description of the invention, taken in conjunction with the accompanying drawings of which:
Reference will now be made in detail to the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout.
The probe assembly 100 basically comprises a probe 110, a clamp block 114 and an elastomeric connector 118. The probe 110 generally comprises a board stack 112, comprising a plurality of stacked board assemblies (described hereinafter), connected to a plurality of cables 114. The board stack 112 forms a planer array of conductive pads suitable for interfacing with an array 122 on the DUT 120. Signals output by the DUT 120 are transmitted to the cables 114 by the board stack 112. The cables 114 preferably comprise coaxial ribbon cables, including, for example, ribbonized coxial cables. A clamp block 116 serves to secure and align the board stack 112, via screws 116 a and 116 b, and provide the force necessary to bring the planer array of pads into finn contact with the array 122 on the DUT 120 via the elastomneric connector 118.
The elastomeric connector 118 preferably comprises a conductive compliant membrane that facilitates contact between the planer array of pads on the end of the board stack 112 and the array 122 on the DUT 120. The elastomeric connector 118 can comprise, for example a LGA connector like those provided by TYCO (rubber conductive bumps in a carrier), High Connection Density Inc. (rubber with coil springs in a carrier), Intercon Systems cLGA (BECU “c” shaped springs in carrier), Teledyne Interconnect Devices (BECU springs molded in a carrier) or the Agilent Technologies Bumplett Connector described in co-pending U.S. patent application Ser. No. 10/232,800 filed Aug. 30, 2002 assigned to the assignee of the present invention. Preferably, the elastomeric connector 118 provides an array of compliant contacts on 1 mm pitch in a configuration matching the array 120. Also preferably, the elastomeric connector 118 is provided with alignment pins or holes that assure proper alignment. The compliant portions, i.e. springs, provide the necessary compliance to allow deviations in the contact surface. Each example listed above is different and some have advantages over the others. Selection of an appropriate solution for the elastomeric connector 118 is left to those of ordinary skill in the art.
In accordance with perhaps the preferred embodiment, the probe tip network 208 is formed of components, such as RCR's, that serve as an isolation circuit. The RCRs may be attached by soldering discrete resistors and capacitors to the board 202. Alternatively, the components can be printed on a substrate, such as ceramic. The substrate may be soldered or glued into place. The probe tip components may also be formed by any number of other structures, such as integrated circuits, or even embedded into the printed circuit board. Two possible configuration are presented in detail in
Electrically, the probe tip network 208 is interposed between the cable 204 and the series of pads 210 on the near edge of the board 202. The selection of components and the formation of networks thereof is beyond the scope of the present description. It is suffice to say that those of ordinary skill in the art of probe development understand the creation of probe tip networks.
One benefit provided by the present invention is that the stepped nature of the board 202 permits multiple boards 202 to be placed adjacent to one another with a pitch of less than 1 millimeter. Also the fact that the isolation components are in a plane that is orthoganal to the DUT pads 122 being probed allows the component pitch along the board 202 to be less than 1 millimeter. Because the probe pads 210 are formed on the edge of the board allowing the these pads 210 to be connected to the isolation components 208 without layer to layer vias minimizes the electrical stub length and capacitive load on the DUT signals.
The series of pads 210 may be formed on the edge of the board 202 using any of a variety of techniques. For example, vias can be formed in proximity to the near edge. The board 202 is then be cut through the middle of the vias, leaving one half of the via exposed as a contact (castilated I/O) thereby forming a new near edge. Alternatively, small metal components can be mounted over the edge of the board 202 with the entire assembly being lapped to ensure planarity. By way of yet another example, wrap around printed circuit planes could be created, with a pre-mask or post-route operation used to form individual pads. In accordance with the preferred embodiment, there are 49 pads per board. The pads are preferably 0.25 mm wide with 1 mm between centers.
The internal ground plane 416 is preferably formed on top of the base layer 402. The shield braids 408 of the coaxial cable 204 a are soldered to the ground plane 416. The signal layer 404 is formed on top of the base layer 402 (and hence the ground plane 416) and is also preferably 0.010 inches thick (0.020 inches thick total). An inner insulation layer 410 of the coaxial cable 204 abuts the signal layer 404, while a center conductor 412 of the coaxial cable 204 lays on top of the signal layer 402. Each center conductor 412 of the coaxial cable 204 is preferably soldered to the signal layer 402 with a solder joint 414. The component layer 406 comprises the ground plane 206 and the probe tip network 208. Preferably, the ground plane 206 is 0.015 inches thick (0.035 inches thick total) while the components of the probe tip network 208 are preferably less than 0.015 inches thick. The maximum thickness of the board 202 is preferably 0.035 inches thick (1 mm) which, when all the boards 202 are laminated together, provides a 1 mm pitch. Those of ordinary skill in the art will recognize that the overall thickness of the board 202 may be thicker or thinner depending on the thickness of the layers and the ground plane 206 in particular. In general, the thickness of the board 202 will depend on the clock speeds of the DUT and materials used.
Referring back to
Although couple embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.
By stepping the board thickness for the coaxial cables 204 and the components 208, the boards 202 can be placed adjacent to one another on a pitch of 1 mm or less. Placing the boards 202 orthogonal to the DUT 120 permits the placement of components 208 on a pitch 1 mm or less. This allows the density of components 208 to match DUT arrays 122 having a pitch of 1 mm and less. Having the contacts 210 on the edge of the board 202 allows the signal to contact the probe point without layer-to-layer vias and allows the placement of the components 208 very close to the DUT 120 contact point. This minimizes the capacitive load and electrical stub length that the signals on the DUT 120 as a result of connecting the probe 110, minimizing the electrical effects of connecting the probe 110. The ground planes 206 and 416 in the boards 202 are co-planer with the propagation of the probed signals, providing a controlled impedance environment and help isolate the signals on the individual probe boards 202 as well as isolate signals between adjacent probe boards 202. This results in a high bandwidth connection between the DUT 120 and the test/measurement equipment.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4340858 *||Aug 13, 1979||Jul 20, 1982||Philip M. Hinderstein||Test fixture|
|US4724377 *||Nov 4, 1983||Feb 9, 1988||Martin Maelzer||Apparatus for testing electrical printed circuit boards|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US7074047||Nov 5, 2003||Jul 11, 2006||Tensolite Company||Zero insertion force high frequency connector|
|US7180321 *||Sep 27, 2005||Feb 20, 2007||Teradyne, Inc.||Tester interface module|
|US7249953||May 3, 2006||Jul 31, 2007||Tensolite Company||Zero insertion force high frequency connector|
|US7307437||Mar 24, 2005||Dec 11, 2007||Hewlett-Packard Development Company, L.P.||Arrangement with conductive pad embedment|
|US7404718||May 20, 2005||Jul 29, 2008||Tensolite Company||High frequency connector assembly|
|US7503768||Jan 31, 2007||Mar 17, 2009||Tensolite Company||High frequency connector assembly|
|US7748990||Mar 13, 2009||Jul 6, 2010||Tensolite, Llc||High frequency connector assembly|
|US7815466||Dec 4, 2008||Oct 19, 2010||Teradyne, Inc.||Coaxial cable to printed circuit board interface module|
|US7977583||Dec 21, 2007||Jul 12, 2011||Teradyne, Inc.||Shielded cable interface module and method of fabrication|
|US7997907||Jul 1, 2010||Aug 16, 2011||Tensolite, Llc||High frequency connector assembly|
|US8159250 *||Jul 10, 2009||Apr 17, 2012||Fujitsu Semiconductor Limited||Testing device for testing a semiconductor device|
|US8201328 *||Dec 4, 2008||Jun 19, 2012||Tyco Electronics Corporation||Coaxial cable to printed circuit board interface module|
|US20050095896 *||Nov 5, 2003||May 5, 2005||Tensolite Company||Zero insertion force high frequency connector|
|US20060071680 *||Sep 27, 2005||Apr 6, 2006||Arash Behziz||Tester interface module|
|US20090151993 *||Dec 21, 2007||Jun 18, 2009||Roya Yaghmai||Shielded cable interface module and method of fabrication|
|US20090176406 *||Dec 4, 2008||Jul 9, 2009||Roya Yaghmai||Coaxial cable to printed circuit board interface module|
|US20090258538 *||Dec 4, 2008||Oct 15, 2009||Roya Yaghmai||Coaxial cable to printed circuit board interface module|
|US20090267630 *||Jul 10, 2009||Oct 29, 2009||Fujitsu Microelectronics Limited||Testing device of semiconductor device|
|US20100273350 *||Jul 1, 2010||Oct 28, 2010||Christopher Alan Tutt||High frequency connector assembly|
|U.S. Classification||324/754.07, 324/756.03|
|International Classification||G01R1/073, G01R1/067|
|Cooperative Classification||G01R1/06772, G01R1/07314|
|European Classification||G01R1/073B2, G01R1/067H|
|Jul 2, 2003||AS||Assignment|
Owner name: AGILENT TECHNOLOGIES, INC., COLORADO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LOGELIN, DONALD M.;SELF, BOB J.;WARDWELL, ROBERT H.;REEL/FRAME:014225/0371;SIGNING DATES FROM 20030113 TO 20030605
|Sep 15, 2008||REMI||Maintenance fee reminder mailed|
|Mar 8, 2009||LAPS||Lapse for failure to pay maintenance fees|
|Apr 28, 2009||FP||Expired due to failure to pay maintenance fee|
Effective date: 20090308