Search Images Maps Play YouTube News Gmail Drive More »
Sign in
Screen reader users: click this link for accessible mode. Accessible mode has the same essential features but works better with your reader.

Patents

  1. Advanced Patent Search
Publication numberUS6888171 B2
Publication typeGrant
Application numberUS 09/748,801
Publication dateMay 3, 2005
Filing dateDec 22, 2000
Priority dateDec 22, 2000
Fee statusPaid
Also published asCN1516901A, CN100367508C, EP1344255A1, EP1344255A4, EP1344255B1, US20020079500, WO2002056386A1
Publication number09748801, 748801, US 6888171 B2, US 6888171B2, US-B2-6888171, US6888171 B2, US6888171B2
InventorsHeng Liu, Changhua Chen
Original AssigneeDallan Luming Science & Technology Group Co., Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Light emitting diode
US 6888171 B2
Abstract
A semi-conductor light emitting diode includes closely spaced n and p electrodes formed on the same side of a substrate to form an LED with a small foot-print. A semi-transparent U shaped p contact layer is formed along three sides of the top surface of the underlying window layer. The p electrode is formed on the p contact layer centered on the closed end of the U shaped layer. An n contact layer is formed on an n cladding layer and centered in the open end of the U of the p contact layer. The n electrode is formed on the n contact layer. The n and p electrodes are electrically isolated from one another by either a trench or an insulator, situated between the electrodes.
Images(2)
Previous page
Next page
Claims(15)
1. A semi-conductor light emitting diode structure comprising:
a sapphire substrate;
a GaN based light emitting structure;
first and second electrodes laterally spaced apart on a same side of said substrate; and
means formed in said diode structure for isolating said electrodes from one another;
wherein said first electrode comprises a U shaped semi transparent conductive p contact layer; and a metal p contact centered on a closed end of the U shaped layer; and
wherein said second electrode comprises an n contact layer and a metal n contact centered in an open end of the U shaped layer.
2. A semi-conductor light emitting diode structure in accordance with claim 1,
wherein said isolating means comprises a trench situated between said electrodes.
3. A semi-conductor light emitting diode structure in accordance with claim 1,
wherein said isolating means comprises an insulator situated between said electrodes.
4. A semi-conductor light emitting diode structure comprising:
a substrate;
first and second electrodes laterally spaced apart on a same side of said substrate; and
means formed in said diode structure for isolating said electrodes from one another;
wherein said first electrode comprises a U shaped semi transparent conductive p contact layer; and a metal p contact centered on a closed end of the U shaped layer; and
wherein said second electrode comprises an n contact layer and a metal n contact centered in an open end of the U shaped layer.
5. A semi-conductor light emitting diode structure in accordance with claim 4,
wherein said isolating means comprises a trench situated between said electrodes.
6. A semi-conductor light emitting diode structure in accordance with claim 4,
wherein said isolating means comprises an insulator disposed between said electrodes.
7. A semiconductor light emitting diode structure comprising:
a substrate;
a first electrode formed on said substrate in a U shape;
a second electrode formed on said substrate and spaced apart from said first electrode by an isolation trench, said second electrode being disposed in an open end of said U shape.
8. A semi-conductor light emitting diode in accordance with claim 1 or 4,
wherein said p contact layer comprises a NiOx/Au layer; and said metal p contact comprises a Ti layer and an Au layer;
wherein said n contact layer comprises layers of Ti, Ni, and Al; and
wherein said metal n contact comprises Au.
9. A semiconductor light emitting diode structure comprising:
a substrate;
first and second electrodes laterally spaced apart on a same side of said substrate; and
an isolation mechanism formed in said diode structure which isolates said electrodes from one another;
wherein said first electrode comprises:
a U-shaped semi-transparent conductive p contact layer; and
a metal p contact centered on a closed end of the U-shaped layer; and
wherein said second electrode comprises:
an n contact layer and a metal n contact centered in an open end of the U-shaped layer.
10. The semiconductor light emitting diode in accordance with claim 9,
wherein said p contact layer comprises a NiOx/Au layer;
wherein said metal p contact comprises a Ti layer and an Au layer;
wherein said n contact layer comprises layers of Ti, Ni, and Al; and
wherein said metal n contact comprises Au.
11. The semiconductor light emitting diode in accordance with claim 9, wherein said substrate is a sapphire substrate.
12. The semiconductor light emitting diode in accordance with claim 9, wherein said isolation mechanism comprises a trench situated between said electrodes and formed through to said substrate.
13. The semiconductor light emitting diode in accordance with claim 9, wherein said isolation mechanism comprises an insulator situated between said electrodes and disposed adjacent said substrate.
14. The semiconductor light emitting diode in accordance with claim 9, wherein said first and second electrodes are arranged at different height levels above said substrate.
15. A semiconductor light emitting diode structure comprising:
a substrate;
a buffer region disposed on said substrate;
an n cladding layer disposed on said buffer region;
an active region disposed on said n cladding layer;
a p cladding layer disposed on said active region;
a p window region disposed on said p cladding region;
a p contact region disposed on said p window region;
a p contact layer and a p metal contact disposed on said p contact region, which forms an ohmic contact with the p window region;
an n contact region disposed on said n cladding layer; and
an n metal contact disposed on said n contact region, which forms an ohmic contact with the n cladding layer;
wherein said n contact region and said n metal contact are isolated from said active region, said p cladding layer, said p window region, said p contact layer, and said p metal contact.
Description

The present invention relates to light emitting diodes which have metal contacts on the same side of a substrate.

BACKGROUND OF THE INVENTION

Although the structures of light emitting diodes (LED's) and the manufacturing processes for making those structures have matured through the years, there remain technical and economic challenges to the industry. Because of the high costs of substrates and growth processes, it is essential to the success of the manufacturing processes, that the footprint of each device be kept as small as possible that is consistent with the target light output requirements.

A particular challenge to reduction of the footprint exists in the case of LED's which employ insulating substrates and metal contacts which are situated on the same side of the substrate. In such structures, there is a tendency for current flowing between the metal contacts to concentrate in a small, lower impedance, preferred path through the light emitting surface. Consequently, much of the light emitting surface is not activated. To date this problem has been addressed by the provision of conductive, semi-transparent, window contact layers and by maintaining physical lateral separation of the contacts. Such separation seriously limits the number of devices that can be constructed on a substrate of any given size; and thus is an economic burden to the manufacturer.

SUMMARY OF THE INVENTION

A light emitting diode, in accordance with one embodiment consistent with the present invention, includes a complementary pair of electrodes and a mechanism for isolating their corresponding metal contacts, to force current flowing between the contacts to flow more fully throughout the active layer.

Advantageously, these measures increase the light output efficiency of the device; and permit a higher density of devices on a substrate of any given size.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic top view of an LED in accordance with one embodiment consistent with the present invention; and

FIG. 2 is schematic side view of the LED of FIG. 1 taken along line A—A.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

For purposes of illustration, an LED depicted in FIGS. 1 and 2 is a gallium nitride (GaN) based structure formed on an insulating substrate. The device of FIG. 1 is surrounded by four plus symbols, i.e., reference numerals 151 through 154, and by a boundary line of the substrate 100 to demonstrate an illustrative footprint of a device on the substrate. The devices of FIG. 1, as formed on substrate 100, are separated by “streets” which have been formed by etching. Separation of the devices is nominally along the center lines of the streets.

In FIGS. 1 and 2, the same reference numerals depict the same elements. The features of FIG. 2, which are not illustrated in FIG. 1, are identified with reference numerals starting at 202.

The illustrative GaN device consistent with one embodiment of the present invention, and as shown in FIGS. 1 and 2, is formed on a sapphire substrate 100. FIG. 2 illustrates the components of the LED as seen at the section line A—A of FIG. 1. The LED of FIGS. 1 and 2 includes a sapphire substrate 100; a buffer region 202 for overcoming the lattice mismatch between the sapphire substrate and GaN layers; an n cladding layer 203; an active region 204; a p cladding layer 205; a p window region 101; a p contact layer 102; a p metal contact 103, 104; an n contact region 105; and an n metal contact 106. The p contact layer 102 along with the p metal contact 103, 104 forms an ohmic contact with the p window region 101. The n contact region 105 along with n metal contact 106 forms an ohmic contact with the n cladding layer 203.

The elements of the LED which are labeled 101 and 202 through 205, are formed by MOCVD processes. The elements which are labeled 102 through 106 are formed by evaporation. After completion of the MOCVD processing, etching which is controlled by photolithography, exposes the portion of the n cladding layer on which the n contact assembly 105, 106 is to be formed. A subsequent deep etching step, again under control by photolithography, opens the “streets” between the individual devices. At the same time, the deep isolation trench 107 can be formed. If isolation between the metal contacts is to be provided by an insulator formed by ion implantation, etching of the deep isolation trench is omitted.

In the illustrative embodiment of FIG. 1 which is consistent with one embodiment of the present invention, p window region 101 includes: (a) a first window layer which is formed of GaN doped with magnesium (Mg); and (b) an overlying second GaN window layer which is more highly doped Mg+. As seen in FIG. 1, the layers of the p window region 101 embrace the entire footprint of the device other than: (a) the surface area defined by circle 103; (b) the surface area defined by rectangle 105; and (c) the surface area of the trench or ditch 107.

Contact layer 102 is a thin, semi-transparent, conductive layer of NiOx/Au which is deposited over the exposed face of the top layer of region 101. A first opening therein, identified as 103 in FIG. 1, is etched through layer 102 to reach the highly doped layer of window region 101. A Ti metal contact 103 is formed as shown in FIG. 2 to provide adhesion to the exposed surface of window region 101 and to layer 102. Gold contact layer 104 is deposited over the Ti metal contact 103. NiOx/Au layer 102 and Ti metal contact 103 form an ohmic contact with layer 101.

The n contact region 105 is formed of a number of layers of metals including Ti, Ni, and Al to provide adhesion to n cladding layer 203 and to provide an ohmic contact foundation for the deposit of Au contact 106.

Contact layer 102 tends to spread the current evenly over the underlying surface area of the active region 204. However, the shape and physical relation of the n contact to the remainder of the device, produces a physically small, relatively low impedance path which concentrates the current flowing between the contacts to a limited area of the active region 204.

Isolation of metal contacts 104 and 106 by a deep trench 107, or by a similarly located implanted insulator as an isolation means, formed through to the substrate as shown in FIG. 2, which eliminates the low impedance path between the contacts, and thus permits reduced lateral separation between contacts 104 and 106.

The “U” shape of semi-transparent conductive layer 102 provides a large light emitting surface; and the “U” shape, in cooperation with the n electrode which is centered in the open end of the “U”, efficiently spreads the activation current throughout the active layer. The parallel legs of the U shape provide current paths around the isolation means 107, in both the p cladding layer 205 and the n cladding layer 203.

The invention has been described with particular attention to its preferred embodiment; however, it should be understood that variations and modifications within the spirit and scope of the invention may occur to those skilled in the art to which the invention pertains. For example the metal contacts can be situated either diagonally in opposing corners, or in adjacent corners, of the device, with insulation provided therebetween. Similarly, although the device foot print is a rectangle, a device with a square foot print can accommodate laterally spaced apart metal contacts which are isolated by a deep trench or by an insulator.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US5281829 *Sep 11, 1992Jan 25, 1994Kabushiki Kaisha ToshibaOptical semiconductor device having semiconductor laser and photodetector
US6121638 *Oct 22, 1997Sep 19, 2000Kabushiki Kaisha ToshibaMulti-layer structured nitride-based semiconductor devices
US6180960 *Sep 24, 1996Jan 30, 2001Nippon Sheet Glass Co., Ltd.Surface light-emitting element and self-scanning type light-emitting device
US6204512 *Nov 24, 1999Mar 20, 2001Nichia Chemical Industries, Ltd.Provided with a p-electrode that allows observation of the light emitted from the device from a side of the substrate and an n-electrode that establishes an ohmic contact with an n-type gallium nitride-based compound semiconductor layer
US6281524 *Feb 20, 1998Aug 28, 2001Kabushiki Kaisha ToshibaSemiconductor light-emitting device
US6287947 *Jun 8, 1999Sep 11, 2001Lumileds Lighting, U.S. LlcMethod of forming transparent contacts to a p-type GaN layer
US20020074553 *Dec 15, 2000Jun 20, 2002David StarikovOne-chip micro-integrated optoelectronic sensor
US20030010994 *Jul 15, 2002Jan 16, 2003Axt, Inc.Window for GaN LED
USRE36747 *Apr 18, 1997Jun 27, 2000Toyoda Gosei Co., LtdLight-emitting device of gallium nitride compound semiconductor
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7989825 *Jun 24, 2004Aug 2, 2011Fuji Xerox Co., Ltd.Lens-attached light-emitting element and method for manufacturing the same
US8368100May 11, 2009Feb 5, 2013Cree, Inc.Semiconductor light emitting diodes having reflective structures and methods of fabricating same
US8384115 *Aug 1, 2008Feb 26, 2013Cree, Inc.Bond pad design for enhancing light extraction from LED chips
US8741715Apr 29, 2009Jun 3, 2014Cree, Inc.Gate electrodes for millimeter-wave operation and methods of fabrication
US20100025719 *Aug 1, 2008Feb 4, 2010Cree, Inc.Bond pad design for enhancing light extraction from led chips
Classifications
U.S. Classification257/99, 257/79, 257/626, 257/615, 257/613, 257/612, 257/624
International ClassificationH01L33/38, H01L33/20, H01L33/14, H01L33/32
Cooperative ClassificationH01L33/32, H01L33/145, H01L33/38, H01L33/20
European ClassificationH01L33/38, H01L33/20, H01L33/14C
Legal Events
DateCodeEventDescription
Oct 17, 2012FPAYFee payment
Year of fee payment: 8
Aug 6, 2008FPAYFee payment
Year of fee payment: 4
Nov 15, 2005CCCertificate of correction
Aug 2, 2005CCCertificate of correction
Jun 30, 2004ASAssignment
Owner name: DALIAN LUMING SCIENCE & TECHNOLOGY GROUP CO., LTD.
Free format text: CORRECTIVE ASSIGNMENT TO CORRECT ASSIGNEE, PREVIOUSLY RECORDED ON REEL/FRAME 0145;ASSIGNOR:DALIAN LUMING SCIENCE AND TECHNOLOGY GROUP, CO., LTD.;REEL/FRAME:016229/0642
Effective date: 20030927
Free format text: CORRECTIVE ASSIGNMENT TO CORRECT ASSIGNEE, PREVIOUSLY RECORDED ON REEL/FRAME 014588/0425.;ASSIGNOR:DALIAN LUMING SCIENCE AND TECHNOLOGY GROUP, CO., LTD. /AR;REEL/FRAME:016229/0642
Oct 14, 2003ASAssignment
Owner name: DALIAN LUMING SCIENCE AND TECHNOLOGY GROUP, CHINA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AXT, INC.;REEL/FRAME:014588/0425
Effective date: 20030927
Owner name: DALIAN LUMING SCIENCE AND TECHNOLOGY GROUP 10 HOAD
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AXT, INC. /AR;REEL/FRAME:014588/0425
Jan 14, 2002ASAssignment
Owner name: AXT, INC., A CORPORATION OF DELAWARE, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AMERICAN XTAL TECHNOLOGY, INC., A CORPORATION OF DELAWARE;REEL/FRAME:012478/0281
Effective date: 20011031
Owner name: AXT, INC., A CORPORATION OF DELAWARE 4281 TECHNOLO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AMERICAN XTAL TECHNOLOGY, INC., A CORPORATION OF DELAWARE/AR;REEL/FRAME:012478/0281
Dec 22, 2000ASAssignment
Owner name: AMERICAN XTAL TECHNOLOGY, INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIU, HENG;CHEN, CHANGHUA;REEL/FRAME:011397/0661
Effective date: 20001222
Owner name: AMERICAN XTAL TECHNOLOGY, INC. MAUREEN WANG 4281 T
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIU, HENG /AR;REEL/FRAME:011397/0661