|Publication number||US6954190 B2|
|Application number||US 10/062,651|
|Publication date||Oct 11, 2005|
|Filing date||Jan 31, 2002|
|Priority date||Feb 8, 2001|
|Also published as||CN1374820A, CN100380674C, EP1231593A2, EP1231593A3, US20030030601|
|Publication number||062651, 10062651, US 6954190 B2, US 6954190B2, US-B2-6954190, US6954190 B2, US6954190B2|
|Original Assignee||Sanyo Electric Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (7), Non-Patent Citations (2), Referenced by (7), Classifications (24), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
The present invention relates to an organic EL circuit including, corresponding to each of a plurality of pixels, a plurality of driving transistors switched on and off in accordance data from a plurality of data lines and a plurality of EL elements corresponding to the plurality of driving transistors.
2. Description of the Related Art
Conventionally, use of an organic EL panel as a flat panel display is known. Because each pixel in an organic EL panel is self-emitting, an organic EL panel has advantages including that, unlike a liquid crystal display, no backlight is required and that the display is relatively bright.
A gate line which extends in the row direction is connected to the gate of a scan TFT1 which is an n channel thin film transistor selected by the gate line. The drain of the scan TFT1 is connected to a data line which extends in the column direction, and the source of the scan TFT1 is connected to a storage capacitor SC, the other terminal of which is connected to a storage capacitance power source line VSC. The connection point between the source of the scan TFT1 and the storage capacitor SC is also connected to the gate of a driving TFT2 which is a p channel thin film transistor. The source of the driving TFT2 is connected to a power source PVDD and the drain of the driving TFT2 is connected to an organic EL element EL. The other terminal of the organic EL element EL is connected to a cathode power source VC.
When the gate line of the above circuit is at H level, the scan TFT1 is switched on, and the data in the data line at that point of time is stored in the storage capacitor SC. According to the data (electric potential) maintained in the storage capacitor SC, the driving TFT2 is switched on and off. When the driving TFT2 is switched on, an electric current flows through the organic EL element EL and light is emitted.
The data lines are sequentially switched on at a timing at which corresponding data is supplied to the video signal line. Therefore, the brightness of the organic EL element EL is controlled based on the video signal supplied to the data line. In other words, the gray scale display of each pixel is effected by controlling the gate potential of the driving TFT2, to control the electric current flowing through the organic EL element.
However, because there is an intrinsic difference in the threshold voltage (Vth) of the driving TFT2 for each pixel, the display of each pixel will not be equal, and, thus, the display will be uneven.
The present invention was conceived to address the above mentioned problem, and one object of the present invention is to provide an organic EL circuit which can perform desirable gray scale control such that display unevenness is not generated.
In order to achieve at least the object mentioned above, according to the present invention, a plurality of organic EL elements (sub-pixels) are provided in a pixel, the plurality of organic EL elements are switched on and off, and driving transistors of different size are provided. With such a structure, the gray scale can be controlled by switching the driving transistors fully on. Therefore, the effect of the threshold voltage of the driving transistor can be removed and a preferable gray scale control can be achieved.
According to another aspect of the present invention, the size of each of the driving transistors is varied in order to vary the amount of light emission by the EL element. With such structure, the gray scale can be controlled by switching appropriate driving transistors fully on. In this manner, the effect of the threshold voltage of the driving transistor can be removed.
According to another aspect of the present invention, it is possible to perform a finer gray scale control by incorporating time division light emission.
A preferred embodiment of the present invention will now be described referring to the figures.
The drain of each of the scan TFTs 1-1, 1-2, and 1-3 is respectively connected to a separate data line DATA1, DATA2, and DATA 3. The source of each of the scan TFTs 1-1, 1-2, and 1-3, on the other hand, is respectively connected to a separate storage capacitor SC1, SC2, and SC3. The other terminal of each of the storage capacitors SC1, SC2, and SC3 is connected to a storage capacitance power source line VSC which is a power source line.
The connecting points between the sources of scan TFTs 1-1, 1-2, and 1-3 and the storage capacitors SC1, SC2, and SC3 are respectively connected to the gate of driving TFTs 2-1, 2-2, and 2-3, all of which are p channel TFTs. The sources of the driving TFTs 2-1, 2-2, and 2-3 are all connected to a power source line PVDD and the drains of the driving TFTs 2-1, 2-2, and 2-3 are respectively connected to anodes of separate organic EL elements EL1, EL2, and EL3. The cathodes of the organic EL elements EL1, EL2, and EL3 are connected to a cathode power source. In other words, one pixel is made of three EL elements EL1, EL2, and EL3, each of which forms a sub-pixel.
In such a circuit, the sizes of the driving TFTs 2-1, 2-2, and 2-3 are set at a ratio of 1:2:4. Signals representing the first, second, and third bit in the brightness data are respectively supplied to the data lines DATA1, DATA2, and DATA3. In this manner, an organic EL driving current having 3 bits and corresponding to 8 gray scale data of “000” to “111” can be obtained. The size of the TFTs 2-1, 2-2 and 2-3 are set by adjusting the gate lengths and/or the gate widths.
With such a configuration, the amount of current can be controlled by varying the size for the driving TFTs 2-1, 2-2, and 2-3, and switching the TFTs fully on. Because the control is an on/off control and the amount of current is approximately constant, the lifetime of the driving TFTs 2-1, 2-2, and 2-3 can be increased. Moreover, because the brightness signal can be supplied to the data lines DATA1, DATA2, and DATA3 as digital data, the brightness data for each pixel obtained by a digital process can be directly supplied to the data lines DATA1, DATA2, and DATA3, and a D/A converter or the like is no longer necessary. Because the data is digital, a significantly lower level of degradation of data through the communication routes can be maintained.
The TFTs 2-1, 2-2, and 2-3 are p channel transistors, and thus, the amount of current is increased as the potential at the gate is lowered. Because, as a result, the brightness is increased as the amount of charges stored in the storage capacitors SC1, SC2, and SC3 is decreased, it is preferable to use inverted brightness data as the data to be supplied to the data lines DATA1, DATA2, and DATA3. The LSB of the brightness data is supplied to the gate of the smallest driving transistor TFT2 and the MSB of the brightness data is supplied to the gate of the largest driving transistor TFT2.
For a color display, pixels are separately provided for R, G, and B, and each of the R, G, and B pixels can be driven by separate video signals.
Although in the above example the gray scale is controlled by controlling light emission of organic EL elements EL1, EL2, and EL3 each of which has different amount of light emission (amount of drive current) and constitutes a sub-pixel, in addition to this approach, it is also preferable to control the light emission period of each sub-pixel. For example, as shown in
For example, time division light emission can be achieved by setting the length of the time period of the first sub-field to 7.5 msec (120 Hz) and the length of the time period of the second sub-field to 15 msec (60 Hz), and providing a predetermined shutout period between each sub-field.
It is also preferable to vary the light emission area for each sub-pixel to control the amount of light emission for each pixel.
An example of light emission control including time division, current control, and area variation among sub-pixels will next be described. In order to simplify the description, in this example two driving TFT2s 2-1 and 2-2 are provided as shown in FIG. 3. Accordingly, two scan TFT1s, two storage capacitors SC, and two organic EL elements EL are provided.
The sizes of the TFTs 2-1 and 2-2 are set at a ratio of 1:4, while the light emission area ratio of the organic EL elements EL1 and EL2, each of which constitutes a sub-pixel, is set at a ratio of 1:2.
The frequency of the first sub-field is set at twice the frequency of the second sub-field. In this manner, as shown in
As shown in
By employing such time division light emission, the number of gray scale levels can be doubled, and, a display with a relatively large number of gray scale levels can be achieved by combining the time division light emission with control of the amount of current as described above.
In the example shown in
Instead of setting the size of the driving TFTs at a ratio of 1:4, it is also possible to provide a plurality of driving TFTs of the same size in each pixel, with the number of TFTs being at a ratio of 1:4.
Similarly, instead of setting the light emission area of the EL element at a ratio of 1:4, it is also possible to provide a plurality of EL elements having the same light emission area in each pixel, with the number of TFTs being at a ratio of 1:4.
It should also be noted that the scan TFTs and driving TFTs are not limited to n channel and p channel TFTs as described above.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
|US7405712||Oct 8, 2004||Jul 29, 2008||Seiko Epson Corporation||Method for driving electro-optical device, electro-optical device and electronic equipment|
|US7928929||Apr 19, 2011||Semiconductor Energy Laboratory Co., Ltd.||Display device and driving method thereof|
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|U.S. Classification||345/76, 345/82|
|International Classification||H01L27/32, H01L51/50, G09G3/20, G09F9/30, H05B33/08, G09G3/30, H05B33/14, H05B33/00, G09G3/32, G09G3/38|
|Cooperative Classification||G09G3/2022, G09G3/2074, G09G3/2081, G09G2300/0828, G09G2300/0852, G09G3/3258, G09G2300/0809, G09G3/2077, G09G2300/0842|
|European Classification||G09G3/20G20A, G09G3/20G14, G09G3/32A8V|
|Jun 11, 2002||AS||Assignment|
Owner name: SANYO ELECTRIC CO., LTD., JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KOMIYA, NAOAKI;REEL/FRAME:012989/0596
Effective date: 20020527
|Mar 11, 2009||FPAY||Fee payment|
Year of fee payment: 4
|Mar 6, 2013||FPAY||Fee payment|
Year of fee payment: 8