US 7006016 B1 Abstract A data encoding system for a data stream comprises a data dependent scrambler that receives the data stream including K m-bit symbols, that selects a seed based on the K m-bit symbols, that scrambles the K m-bit symbols using the seed and that outputs a codeword including the scrambled K m-bit symbols and the seed. A DC control module receives a plurality of the codewords from the data dependent scrambler, selectively inverts selected ones of the plurality of codewords to reduce a difference between a total number of zeroes and total number of ones in the plurality of codewords and outputs an encoded data stream.
Claims(42) 1. A data encoding system for a data stream, comprising:
a data dependent scrambler that receives the data stream including K m-bit symbols, that selects a seed based on the K m-bit symbols, that scrambles the K m-bit symbols using the seed and that outputs a codeword including the scrambled K m-bit symbols and the seed; and
a DC control module that receives a plurality of the codewords from the data dependent scrambler, that selectively inverts selected ones of the plurality of codewords to reduce a difference between a total number of zeroes and total number of ones in said plurality of codewords and that outputs an encoded data stream.
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13. A system comprising the data encoding system of
14. A read channel circuit comprising the data encoding system of
15. A storage device comprising the data encoding system of
16. A disk drive comprising the data encoding system of
17. A data encoding system for a data stream, comprising:
data dependent scrambling means for receiving the data stream including K m-bit symbols, for selecting a seed based on the K m-bit symbols, for scrambling the K m-bit symbols using the seed and for outputting a codeword including the scrambled K m-bit symbols and the seed; and
DC control means for receiving a plurality of the codewords from the data dependent scrambling means, for selectively inverting selected ones of the plurality of codewords to reduce a difference between a total number of zeroes and total number of ones in said plurality of codewords and for outputting an encoded data stream.
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29. A system comprising the data encoding system of
30. A read channel circuit comprising the data encoding system of
31. A storage device comprising the data encoding system of
32. A disk drive comprising the data encoding system of
33. A method for encoding data in a data stream, comprising:
selecting a seed based on K m-bit symbols in the data stream;
scrambling the K m-bit symbols using the seed;
outputting a codeword including the scrambled K m-bit symbols and the seed;
selectively inverting selected ones of the plurality of codewords to reduce a difference between a total number of zeroes and total number of ones in said plurality of codewords; and
outputting an encoded data stream.
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Description This application is related to U.S. Ser. No. 10/423,552, filed Apr. 25, 2003, entitled, “Improved Data Coding For Enforcing Constraints On Ones And Zeros In A Communications Channel”, U.S. Ser. No. 10/639,796, filed Aug. 12, 2003, entitled, “Methods And Apparatus For Improving Minimum Hamming Weights Of A Sequence”, U.S. Ser. No. 10/701,271, filed Nov. 4, 2003, entitled, “Methods Of Supporting Host CRC In Data Storage Systems Without RLL Coding”, U.S. Ser. No. 10/715,551, filed Nov. 17, 2003, entitled, “Data Dependent Scrambler With Reduced Overhead”, U.S. Ser. No. 10/701,661, filed Nov. 5, 2003, entitled, “Reducing Number Of Consecutive Ones In Data Dependent Scrambler”, U.S. Ser. No. 10/714,804, filed Nov. 17, 2003, entitled, “Data Dependent Scrambler With Improved Global Constraint”. This application claims the benefit of U.S. Provisional Application No. 60/510,266, filed on Oct. 10, 2003. The disclosure of the above applications are incorporated herein by reference. The present invention relates to data coding in communications channels, and more particularly to DC-free data coding. Many communication systems are constrained as to the types of signals that can be communicated. Often, energy at low frequencies is undesirable for reasons such as greater power dissipation in the receiver/transmitter and high-pass frequency characteristics of the communications channel. In a binary data stream, the amount of low frequency content is determined by the number of consecutive 1's or 0's in the data stream, and by imbalance in the total number of 1's and 0's transmitted. Line codes are used in digital communication systems to reduce this low frequency energy. The widely used 8b/10b line code generates a binary data stream containing no more than five consecutive 1's or 0's, and is DC-free. DC-free means that the total number of 1's transmitted minus the total number of 0's transmitted is bounded on either side of zero by two constants. The two constants are often opposites of each other. The 8b/10b code replaces each 8 bits of user data with 10 bits of coded data. Increasing the number of bits by 2, from 8 to 10, means that there is 25% (2/8) redundancy in the 8b/10b code. A data encoding system for a data stream comprises a data dependent scrambler that receives the data stream including K m-bit symbols, that selects a seed based on the K m-bit symbols, that scrambles the K m-bit symbols using the seed and that outputs a codeword including the scrambled K m-bit symbols and the seed. A DC control module receives a plurality of the codewords from the data dependent scrambler, selectively inverts selected ones of the plurality of codewords to reduce a difference between a total number of zeroes and total number of ones in the plurality of codewords and outputs an encoded data stream. In some embodiments, the data dependent scrambler includes a seed selector that receives the K m-bit symbols and that selects the m-bit seed. The data dependent scrambler further includes a scrambling module that scrambles the K m-bit symbols using the m-bit seed to create the scrambled K m-bit symbols. In some embodiments, the seed selector selects the m-bit seed such that the m-bit seed is not equal to the K m-bit symbols and inversions thereof. The seed selector selects the m-bit seed such that the seed is not equal to the K m-bit symbols and inversions thereof, an all-zero symbol, and an all-one symbol. In some embodiments, the DC control module comprises a digital sum (DS) calculator that receives the codeword and that calculates the DS of the codeword. The DS is equal to the number of ones in the codeword minus the number of zeroes in the codeword. In some embodiments, the DC control module further comprises an inverter that selectively inverts the codeword when an enable signal is received. The DC control module further comprises a running digital sum (RDS) module that receives the DS and that calculates the RDS of a plurality of codewords. The DC control module further comprises an RDS comparing module that receives the DS and the RDS and that selectively generates the enable signal. The RDS comparing module selectively reverses the sign of the DS. The RDS comparing module selectively generates the enable signal and reverses the sign of the DS when the RDS and the DS have the same sign. A read channel circuit comprises the data encoding system. A storage device comprises the data encoding system. A disk drive comprising the data encoding system. Further areas of applicability of the present invention will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention. The present invention will become more fully understood from the detailed description and the accompanying drawings, wherein: The following description of the preferred embodiments is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses. For purposes of clarity, the same reference numbers will be used in the drawings to identify similar elements. As used herein, the term module refers to an application specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and memory that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality. Referring now to The seed selector The number of different m-bit binary symbols is 2 The second buffer However, simply because the number of consecutive 0's and 1's is limited, a sequence is not guaranteed to be DC-free. A digital sum (DS) can be defined that is equal to the number of 1's minus the number of 0's in a codeword. A summation of the digital sums of all previous codewords is referred to as a running digital sum (RDS). It is well known that if the RDS is bounded, then the coded sequence is DC-free. In The DC control module To achieve DC-free output, the RDS must be kept as close to zero as possible. The RDS is summed with the DS of each codeword. Therefore, if DS is greater than zero and RDS is already greater than zero in step The maximum divergence of RDS from zero (i.e., the greatest absolute value of RDS) can be determined analytically. If RDS is positive, the DC control module The maximum value of DS will occur when the largest number of identical bits in a codeword are present. As discussed above, the seed selection guarantees that the codeword will contain no all-zero or all-one symbols. The maximum number of either 1's or 0's in a symbol is thus equal to m−1. A codeword contains K+1 symbols. The maximum possible value of DS is then equal to the number of symbols (K+1) times the maximum number of identical bits in a symbol (m−1). Therefore, RDS is bounded by +/−(m−1)*(K+1). That is, |RDS|≦(m−1)*(K+1). Parameters of merit for various embodiments are presented in the following table.
The column m denotes the number of bits in a symbol. K Referring now to Referring now to Referring now to During a write operation, the read/write channel circuit (or read channel circuit) One or more platters A read/write device The data encoding system can be incorporated into other storage devices as shown in Those skilled in the art can now appreciate from the foregoing description that the broad teachings of the present invention can be implemented in a variety of forms. Therefore, while this invention has been described in connection with particular examples thereof, the true scope of the invention should not be so limited since other modifications will become apparent to the skilled practitioner upon a study of the drawings, the specification and the following claims. Patent Citations
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