|Publication number||US7061407 B1|
|Application number||US 11/151,935|
|Publication date||Jun 13, 2006|
|Filing date||Jun 14, 2005|
|Priority date||Jun 14, 2005|
|Publication number||11151935, 151935, US 7061407 B1, US 7061407B1, US-B1-7061407, US7061407 B1, US7061407B1|
|Inventors||Hyun Soo Lee|
|Original Assignee||Xilinx, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (6), Referenced by (13), Classifications (6), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention generally relates to encoding of 8B10B control characters.
Many communication protocols use data that is encoded using an 8b/10b encoding scheme. The 8b/10b encoding scheme encodes 8 bits of data into 10 bits of encoded data. In addition to encoding data, the 8b/10b encoding scheme permits a limited number of control characters to be encoded. For each of the 256 possible values for 8 bits of data and each of the typically 12 possible control characters, the 8b/10b encoding scheme has one, or a pair of, corresponding 10 bit encodings.
The 8b/10b encoding scheme permits the data and control codes to be communicated over communication media in a manner that is band limited and is run-length limited. The communication media may be copper cable, fiber optic cable, or traces on a printed circuit board.
The 8b/10b encoding scheme is band limited because the frequency components of a signal encoded using the 8b/10b encoding scheme are limited to a band of frequencies, and this band of frequencies does not include a DC component. The band limiting may reduce the distortion of the signal by the communication media due to dispersion of the various frequency components. The lack of a DC component may permit capacitive coupling of the signal.
The limited run-length and associated high transition density of the 8b/10b encoding scheme may permit a phase locked loop to recover from a received signal the clock used to transmit the signal. Because a separate clock signal may not be needed, the 8b/10b encoding scheme may reduce the number of signals needed to transmit data over a communication media.
The control characters of the 8b/10b encoding scheme are typically used to encode protocol data, such as transmitter-receiver synchronization, protocol initialization, control packet framing, and data packet framing. While many communication standards use the 8b/10b encoding scheme, such as Ethernet, Infiniband, and PCI Express, the meanings assigned to the control characters and control information generally vary between the various standards.
The generic framing procedure (GFP) is an emerging standard, ITU-T G.7041/Y.1303, for converting into a data stream the low-level encoded protocol data for various communication standards that use the 8b/10b encoding scheme. The data stream includes both the data and the control characters of the 8b/10b encoding scheme. The low-level encoded protocol data is remotely reconstructed from the data stream, typically after the data stream is transferred over a telecommunication network. GFP permits various communication standards using the 8b/10b encoding scheme to be transparently transported over a telecommunication network.
Part of the GFP is conversion of the format of the control characters from a format for the 8b/10b encoding scheme into a GFP format. There is a general need to efficiently convert between formats that represent control characters in an 8b/10b encoding using a reduced amount of logic and to complete a conversion between formats in a short period of time.
The present invention may address one or more of the above issues.
Various embodiments of the invention provide an encoder including a first storage array, a second storage array, and a selection circuit. The first storage array is configured with a first set of values and the second storage array configured with a second set of values. The first storage array has an address port coupled to receive a first portion of an input value, and is adapted to output a first value of the first set in response to a value of the first portion of the input value. The second storage array has an address port coupled to receive a second portion of the input value, and is adapted to output a second value of the second set in response to a value of the second portion of the input value. The selection circuit has input ports coupled to the first storage array, and the second storage array. The selection circuit is adapted to output the second value from the second storage array as an encoded value of the input value in response to the first portion having a third value, output the first value from the first storage array as the encoded value in response to the first portion not having the third value and the second portion having a fourth value, and output a default value as the encoded value in response to the first portion not having the third value and the second portion not having the fourth value.
Various other embodiments of the invention provide a method for encoding an 8-bit input value into an n-bit encoded value, wherein n is greater than or equal to four. A first value addressed by a first portion of the 8-bit input value is read from a first storage array. A second value addressed by a second portion of the 8-bit input value is read from a second storage array. The second value is output as the n-bit encoded value in response to the first portion having a third value. The first value is output as the n-bit encoded value in response to the first portion not having the third value and the second portion having a fourth value. A default value is output as the n-bit encoded value in response to the first portion not having the third value and the second portion not having the fourth value.
It will be appreciated that various other embodiments are set forth in the Detailed Description and claims which follow.
Various aspects and advantages of the invention will become apparent upon review of the following detailed description and upon reference to the drawings in which:
Typically, 8b/10b encoded data is serially received by receiver 102 one bit at a time. Deserializer 108 may collect a sequence of the serially received bits to form one or more code words each containing 10-bits of 8b/10b encoded data. The 8b/10b decoder 110 may convert each 10-bit code word into a corresponding 8-bit data value. For a 10-bit code word corresponding to a data character the 10-bit code word is converted into the 8-bit value for the data character. For a 10-bit code word corresponding to one of the twelve control characters of the 8b/10b encoding, the 10-bit code word is converted into a corresponding 8-bit value for the control character. For both data characters and control characters the corresponding 8-bit value is output from the 8b/10b decoder 110 on line 112, and a character type signal on line 114 indicates whether the 8-bit value on line 112 is for a data character or a control character. It will be appreciated that transceiver 110 may include additional receiver functions not shown, such as recovery of a clock from the received 8b/10b encoded data, synchronization of the bit alignment of code words, and detection of invalid code words.
A control character converter 116 may convert the 8-bit value on line 112 into another encoding. In one embodiment, the 8-bit value on line 112 for a control character is converted into a 4-bit value on line 118 as specified by the generic framing procedure (GFP) of emerging standard, ITU-T G.7041/Y.1303. In another embodiment, the 8-bit value on line 112 for a control character is converted into an n-bit value, such as a proprietary n-bit value having four or more bits. Control and data multiplexer 120 may generate a data stream including the 8-bit value for each 8b/10b data character and the 4-bit GFP value for each 8b/10b control character. Control and data multiplexer 120 may use the character type on line 114 to determine whether to accept the 8-bit value on line 112 for a data character or the 4-bit GFP value on line 118 for a control character.
A data stream from a remote transceiver (not shown) is provided to the control and data demultiplexer 122 from data transport 106. The 8-bit value for a data character is provided directly to the 8b/10b encoder 124 from the demultiplexer 122 and the 4-bit GFP value for a control character from the demultiplexer 122 is converted to an 8-bit value by the control character lookup 126. The 8b/10b encoder converts the 8-bit value for data and control characters into a corresponding 10-bit value. Certain data and control characters may have two possible 10-bit values, and the 8b/10b encoder may select a 10-bit value that reduces the running disparity between the number of transmitted zero bits and the number of transmitted one bits. The serializer 128 may convert one or more 10-bit code words received in parallel from the 8b/10b encoder into a serial bit stream for transmission by transmitter 104.
The 8-bit values shown in column 152 may result from the decoding of the 10-bit encoded values for control characters using the same circuitry that is used for decoding of the 10-bit encoded values for data characters of the 8b/10b encoding. Each of the 8-bit values shown in column 152 is a two-digit hexadecimal value that has a most significant hexadecimal digit of “F”, and/or a least significant hexadecimal digit of “C”. For the “K28.7” control character of row 156, the 8-bit value shown in column 152 has a most significant hexadecimal digit of “F” and a least significant hexadecimal digit of “C”.
The 8-bit value received on line 202 is split into the four most significant bits on line 206 and the four least significant bits on line 208. AND gate 210 receives the four most significant bits on line 206 to provide a match circuit that determines whether the four most significant bits on line 206 correspond to a hexadecimal value of “F”. AND gate 212 with two inverting inputs receives the four least significant bits on line 208 to provide a match circuit that determines whether the four least significant bits on line 208 correspond to a hexadecimal value of “C”.
Multiplexer 214 is a selection circuit that has two control inputs from the AND gates 210 and 212. If the AND gate 210 does not indicate that the four most significant bits of the 8-bit value on line 202 correspond to a hexadecimal value of “F” and the AND gate 212 does not indicate that the four least significant bits of the 8-bit value on line 202 correspond to a hexadecimal value of “C” then the 8-bit value on line 202 cannot be any one of the twelve 8-bit values in column 152 of
When the AND gate 210 indicates that that the 8-bit value on line 202 has the four most significant bits with hexadecimal value of “F”, then the 8-bit value on line 202 may be one of the bottom five control characters shown in the table of
Similarly, when the AND gate 212 indicates that that the 8-bit value on line 202 has the four least significant bits of hexadecimal “C”, then the 8-bit value on line 202 may be one of the top eight control characters shown in the table of
The values in column 256 are either the default value of “1111” or the GFP values in column 154 of
The values in column 252 are either the default value of “1111” or certain of the GFP values in column 154 of
Row 156 in
Typically, each LUT 308 may be configured by programming data from serial PROM 310 to implement any possible logic function of the inputs to the LUT 308. For example, a LUT 308 may have a 4-bit input used to select and output one of sixteen 1-bit values in the LUT 308. Appropriate configuration of the sixteen 1-bit values in the LUT 308 permits the LUT 308 to implement any 1-bit logic function of the 4-bit input. Parallel LUTs 308 may implement any n-bit function of a 4-bit input.
Referring back to
At step 358, one of the first value from the first storage array, the second value from the second storage array, and a default value is output as the encoded value resulting from the format conversion. The default value is output when the 8-bit input value does not correspond to a valid control character of the 8b/10b encoding. Typically, the second value is output when the first portion has a value of fifteen, the first value is output when the first portion does not have a value of fifteen and the second portion has a value of twelve, and otherwise the default value is output. Typically, for an 8-bit value corresponding to a control character of the 8b/10b encoding, the value output is a 4-bit GFP value corresponding to the control character and for an 8-bit value that does not correspond to a control character of the 8b/10b encoding, the value output is the default value indicating an invalid control character.
The present invention is thought to be applicable to a variety of systems for encoding control characters. Other aspects and embodiments of the present invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and illustrated embodiments be considered as examples only, with a true scope and spirit of the invention being indicated by the following claims.
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|U.S. Classification||341/50, 341/106, 341/78|
|Jun 14, 2005||AS||Assignment|
Owner name: XILINX, INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LEE, HYUN SOO;REEL/FRAME:016692/0254
Effective date: 20050613
|Dec 14, 2009||FPAY||Fee payment|
Year of fee payment: 4
|Dec 13, 2013||FPAY||Fee payment|
Year of fee payment: 8