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Publication numberUS7123667 B2
Publication typeGrant
Application numberUS 10/070,449
PCT numberPCT/JP2001/005883
Publication dateOct 17, 2006
Filing dateJul 6, 2001
Priority dateJul 21, 2000
Fee statusLapsed
Also published asCA2384773A1, CN1251426C, CN1386335A, EP1213853A1, US20020136334, WO2002009316A1
Publication number070449, 10070449, PCT/2001/5883, PCT/JP/1/005883, PCT/JP/1/05883, PCT/JP/2001/005883, PCT/JP/2001/05883, PCT/JP1/005883, PCT/JP1/05883, PCT/JP1005883, PCT/JP105883, PCT/JP2001/005883, PCT/JP2001/05883, PCT/JP2001005883, PCT/JP200105883, US 7123667 B2, US 7123667B2, US-B2-7123667, US7123667 B2, US7123667B2
InventorsTakayuki Nagayasu
Original AssigneeMitusbishi Denki Kabushiki Kaisha
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Receiver for wireless communication
US 7123667 B2
Abstract
Analog processing sections (3 a to 3 b) generate base band analog signal from the received signal. A/D converting sections (4 a to 4 b) the outputs of the analog processing sections into digital signals. Soft-decision output equalizers (11 a to 11 b) make soft decisions on the digital signals. A combining section (12) combines the results of the soft decisions to output a soft-decision value. An error correcting section (13) performs error correction processing with respect to the soft-decision value.
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Claims(4)
1. A radio communication receiver comprising:
analog signal generating units in number P (where P is a natural number more than one) each of which receives a signal and generates a base band analog signal from the received signal;
A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals; and
a demodulator which demodulates the digital signal output by the corresponding A/D converter based on a desired method, the demodulator comprising;
soft-decision output equalizers in number P each of which makes a soft decision on the digital signal output by the corresponding A/D converter;
a combining unit which sums up the results of the soft decisions by the soft-decision output equalizers and outputs the result as a soft-decision value; and
an error correcting unit which performs error correction processing with respect to the soft-decision value output by the combining unit.
2. A radio communication receiver comprising:
analog signal generating units in number P (where P is a natural number) each of which receives a signal and generates a base band analog signal from the received signal;
A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals; and
a demodulator which demodulates the digital signal output by the corresponding A/D converter based on a desired method, said demodulator comprising:
level-adjusting units in number P each of which adjusts a power level of the digital signal output by the corresponding A/D converter;
soft-decision output equalizers in number Peach of which makes a soft decision with respect to the signal output by the corresponding level-adjusting unit;
a combining unit which returns a result of the soft decision to a status before the level adjustment, combines the results of the soft decisions by the soft-decision output equalizers at the original power levels and outputs the result as a soft-decision value; and
an error correcting unit which performs error correction processing with respect to the soft-decision value output by the combining unit.
3. A radio communication receiver comprising:
analog signal generating units in number P (where P is a natural number) each of which receives a signal and generates a base band analog signal from the received signal;
A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals; and
a demodulator which demodulates the digital signal output by the corresponding A/D converter based on a desired method, said demodulator comprising:
soft-decision output equalizers in number P each of which makes a soft decision on the digital signal output by the corresponding A/D converter;
noise-power estimating units in number P each of which estimates noise power of the digital signal output by the corresponding A/D converter;
a combining unit which divides results of the soft decisions by corresponding noise power respectively, and combines the results of the division to output a soft-decision value; and
an error correcting unit which performs error correction processing with respect to the soft-decision value output by the combining unit.
4. A radio communication receiver comprising: analog signal generating units in number P (where P is a natural number) each of which receives a signal and generates a base band analog signal from the received signal;
A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals; and
a demodulator which demodulates the digital signal output by the corresponding A/D converter based on a desired method, said demodulator comprising:
soft-decision output equalizers in number P each of which makes a soft decision on the digital signal output by the corresponding A/D converter based on common reliability information that is fed back after error correction;
a combining unit which combines the results of the soft decisions by the soft-decision output equalizers and outputs the result as a soft-decision value; and
an error correcting unit which performs error correction processing with respect to the soft-decision value output by the combining unit, generates reliability information of decoded bits, and feeds back the reliability information to the soft-decision output equalizers.
Description
TECHNICAL FIELD

The present invention relates to a receiver which can be employed in the radio communication such as in automobile telephones, portable telephones, or cordless telephones. More particularly, this invention relates to a radio communication receiver which provides high-quality communications based on the use of diversity reception.

BACKGROUND ART

A conventional radio communication receiver (hereinafter to be simply referred to as a receiver) will be explained below. In the communication environment of portable telephones or the like, there is risk of distortion in the reception signals due to frequency selective fading which involves intersymbol interference. Persons skilled in the art have used, in order to prevent occurrence of this type of distortion, a method of demodulating a signal by utilizing an intersymbol component with an equalizer.

A receiver which uses diversity reception in the communication environment of the above frequency selective fading has been disclosed in “A Maximum Likelihood Sequence Estimation Equalizer based on Maximal Ratio Combining” (1996 general meeting of The Institute of Electronic Information Communication Engineers of Japan, B-478), by Denno and Saito (“conventional example (1)”). According to this conventional example (1), signals of two systems are received, and a maximum likelihood sequence is estimated using one equalizer. In the estimation of the maximum likelihood sequence, branch metrics corresponding to respective reception signals are calculated, and the branch metrics of the two systems are combined, thereby to realize the diversity reception.

In the mean time, there is a technique, “Equalizer and Decoder, for Mobile Communication System” that is described in Japanese Patent Application Laid-open No. 2000-91967 (“conventional example (2)”). According to the conventional example (2), an error correcting section generates reliability information of a reception signal in simultaneous with an error correction processing. This reliability information is fed back to the equalizer, and the equalizer equalizes the signal again. The equalization processing and the error correction processing are repeated.

The conventional radio communication receivers described above have had the following problems.

In the conventional example (1), one equalizer demodulates the reception signals of the two systems. Therefore, at the time of manufacturing devices having different numbers of antennas in order to realize the diversity reception, it is necessary to design and manufacture the equalizers again by matching the numbers of the antennas. This results in high manufacturing cost.

It is possible to realize the equalizers using H/W like LSI's. However, in that case, since the reception signals of the two systems are received and the demodulation processing like Viterbi algorithm is required to be carried out, the wiring becomes complex and the packaging area becomes large.

According to the conventional example (2), it is not possible to implement the diversity reception. Since the diversity reception is not possible, there is a problem that the quality of the communication can not be improved.

It is an object of the present invention to provide a radio communication receiver which can realize the reduction in manufacturing cost and reduction in the packaging area, and which can improve communication quality as compared with the conventional technique even if diversity reception is employed.

DISCLOSURE OF THE INVENTION

The radio communication receiver according to one aspect of the present invention comprises, analog signal generating units in number P (where P is a natural number) (corresponding to analog processing sections 3 a to 3 b in an embodiment to be described later) each of which receives a signal and generates a base band analog signal from the received signal, A/D converters in number P (corresponding to A/D converting sections 4 a to 4 b) each of which converts the analog signal of the corresponding analog signal generating unit into digital signals, and a demodulator (corresponding to a digital processing section 1) which demodulates the digital signal output by the corresponding A/D converter based on a desired method. The demodulator comprises, soft-decision output equalizers in number P (corresponding to soft-decision output equalizers 11 a to 11 b) each of which makes a soft decision on the digital signal output by the corresponding A/D converter, a combining unit (corresponding to a combining section 12) which combines the results of the soft decisions by the soft-decision output equalizers and outputs the result as a soft-decision value, and an error correcting unit (corresponding to an error correcting section 13) which performs error correction processing with respect to the soft-decision value output by the combining unit.

The radio communication receiver according to another aspect of the present invention comprises, analog signal generating units in number P (where P is a natural number) each of which receives a signal and generates a base band analog signal from the received signal, A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals, and a demodulator (corresponding to a digital processing section 1 a) which demodulates the digital signals output by the corresponding A/D converter based on a desired method. The demodulator comprises, level-adjusting units in number P (corresponding to level-adjusting sections 21 a to 21 b) each of which adjusts a power level of the digital signal output by the corresponding A/D converter, soft-decision output equalizers in number P each of which makes a soft decision with respect to the signal output by the corresponding level-adjusting unit, a combining unit (corresponding to a combining section 22) which returns a result of the soft decision to a status before the level adjustment, combines the results of the soft decisions by the soft-decision output equalizers at the original power levels and outputs the result as a soft-decision value, and an error correcting unit which performs error correction processing with respect to the soft-decision value output by the combining unit.

The radio communication receiver according to another aspect of the present invention comprises, analog signal generating units in number P (where P is a natural number) each of which receives a signal and generates a base band analog signal from the received signal, A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals, and a demodulator (corresponding to a digital processing section 1 b) which demodulates the digital signals output by the corresponding A/D converter based on a desired method. The demodulator comprises, soft-decision output equalizers in number P each of which makes a soft decision on the digital signal output by the corresponding A/D converter, noise-power estimating units in number P (corresponding to noise-power estimating sections 31 a to 31 b) each of which estimates noise power of the digital signal output by the corresponding A/D converter, a combining unit (corresponding to a combining section 32) which divides results of the soft decisions by corresponding noise power respectively, combines the results of the division to output a soft-decision value, and an error correcting unit which performs error correction processing with respect to the soft-decision value output by the combining unit.

The radio communication receiver according to another aspect of the present invention comprises, analog signal generating units in number P (where P is a natural number) each of which receives a signal and generates a base band analog signal from the received signal, A/D converters in number P each of which converts the analog signal of the corresponding analog signal generating unit into digital signals, and a demodulator (corresponding to a digital processing section 1 c) which demodulates the digital signals output by the corresponding A/D converter based on a desired method. The demodulator comprises, soft-decision output equalizers in number P (corresponding to soft-decision output equalizers 41 a to 41 b) each of which makes a soft decision on the digital signal output by the corresponding A/D converter based on common reliability information that is fed back after error correction, a combining unit (corresponding to a combining section 42) which combines the results of the soft decisions by the soft-decision output equalizers and outputs the result as a soft-decision value, and an error correcting unit (corresponding to an error correcting section 43, subtractors 51 and 55, a deinterleaver 52, a soft-decision output decoding section 53, are-encoding section 54, and an interleaver 56) which performs error correction processing with respect to the soft-decision value output by the combining unit, generates reliability information of decoded bits, and feeds back the reliability information to the soft-decision output equalizers.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram which shows a structure of a receiver relating to the present invention, and a structure of a digital processing section according to a first embodiment;

FIG. 2 is a diagram which shows a structure of a digital processing section according to a second embodiment;

FIG. 3 is a diagram which shows a structure of a digital processing section according to a third embodiment;

FIG. 4 is a diagram which shows a structure of a digital processing section according to a fourth embodiment, and

FIG. 5 is a diagram which shows a structure of an error correcting section according to the fourth embodiment.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of a radio communication receiver (“receiver”) relating to the present invention will be explained in detail below with reference to the accompanying drawings. It should be noted that the present invention is not limited to these embodiments.

First Embodiment:

FIG. 1 is a diagram which shows a structure of a receiver relating to the present invention. More specifically, FIG. 1 shows a structure of a digital processing section 1 according to a first embodiment. In FIG. 1, a reference numeral 1 denotes a digital processing section of the second embodiment, 2 a, . . . , and 2 b denote antennas, 3 a, . . . , and 3 b denote analog processing sections, and 4 a, . . . , and 4 b denote analog/digital converting sections (hereinafter to be referred to as A/D converting sections). In the digital processing section 1, reference numerals 11 a, . . . , and 11 b denote soft-decision output equalizers, 12 denotes a combining section, and 13 denotes an error correcting section.

An outline of the operation of the receiver relating to the present invention will be briefly explained. The analog processing sections 3 a to 3 b receive reception waves via P (a natural number) antennas 2 a to 2 b respectively. The analog processing sections 3 a to 3 b limit band, down-convert, and convert the reception signals into analog signals of the base band respectively. The A/D converting sections 4 a to 4 b convert the analog signals of the base band into digital reception signals (hereinafter to be simply referred to as reception signals). Last, the digital processing section 1 receives the P reception signals, and carries out demodulation and error correction according to a predetermined method.

The structure and the operation of the digital processing section 1 of the second embodiment will be explained in detail. The soft-decision output equalizers 11 a, . . . , and 11 b that correspond to P reception signals receive respective reception signals, and output soft-decision values by taking into account distortion due to a multi-path like frequency selective fading. The soft-decision output equalizers 11 a to 11 b output these soft-decision values to the combining section 12.

For the soft-decision output equalizers 11 a to 11 b, it is possible to use equalizers of known art that utilize the algorithms of SOVA (Soft-Output Viterbi Algorithm), MAP (Maximum a Posteriori), Max-log-MAP, and Log-MAP. It is also possible to use equalizers which are the modification of these equalizers. It is possible to use equalizers which output hard decisions, like a DFE (Decision-Feedback Equalizer) that carries out MLSE (Maximum-Likelihood Sequence Estimation) and DFSE (Decision-Feedback Sequence Estimation, or DDFSE (Delayed Decision-Feedback Sequence Estimation), an LVE (List-output Viterbi Equalizer) which carries out RSSE (Reduced-State Sequence Estimation), and an equalizer which utilizes M algorithm. It is also possible to use equalizers which have been modified to be able to output soft-decision values.

The combining section 12 which has received the P soft-decision values sums up the soft-decision values, and outputs a result of this calculation to the error correcting section 13 as a soft-decision value after the combining. The error correcting section 13 executes known error correction processing like deinterleaving and decoding.

As explained above, the present embodiment realizes the diversity reception which combines the soft-decision values that are the outputs of the equalizers. Based on the diversity reception, it is possible to obtain satisfactory communication quality. Further, in the case of manufacturing a plurality of types of devices having different numbers of antennas, it is possible to demodulate the reception signals by using a common equalizer. Therefore, it becomes possible to substantially reduce the manufacturing cost as compared with the conventional practice of manufacturing equalizers by matching the numbers with the numbers of antennas. Further, as the equalization processing of only the reception signal of one system is carried out based on the combining of the soft-decision values, it becomes possible to reduce the packaging area of the equalizers. As a result, it becomes possible to reduce the total packaging area of the device.

Second Embodiment:

FIG. 2 is a diagram which shows a structure of a digital processing section la according to a second embodiment. In FIG. 2, a reference numeral 1 a denotes a digital processing section of the second embodiment, 21 a, . . . , and 21 b denote level-adjusting section, and 22 denotes a combining section. Portions similar to those of the first embodiment are attached with like reference numerals, and their explanation will be omitted. The receiver as a whole carries out a similar operation to that of the first embodiment, and therefore, the explanation of this operation will be omitted. Only the portions different from those of the first embodiment will be explained below.

The operation of the digital processing section 1 a of the second embodiment will be explained in detail below. The level-adjusting sections 21 a, . . . , and 21 b carry out level adjustments to P reception signals respectively, and output results of the level adjustments to the combining section 22. The combining section 22 receives soft-decision values of the P systems which are output from soft-decision output equalizers 11 a to 11 b like in the first embodiment, and level adjustments of the P systems which are output from the level-adjusting sections 21 a to 21 b, and combines the soft-decision value in the following manner.

When the level-adjusting sections 21 a to 21 b have carried out level adjustments of the reception signals using level adjustment values A1, . . . , and AP, as shown in the following equation (1), the combining section combines the soft-decision values as shown in the equation (2).
ri′(n)=ri(nAi  (1)
s(n)=Σ{si(n)/(Ai×Ai)}  (2)
where, i expresses i=1, 2, . . . , P, ri(n) expresses a reception signal at time n, ri′(n) expresses a reception signal after level adjustment at time n, Σ expresses sum of i=1, 2, . . . , P, s (n) expresses a soft-decision value after the combining, and si (n) expresses a soft-decision value at time n which is output from each soft-decision output equalizer.

As explained above, according to the present embodiment, it is possible to obtain similar effects to those of the first embodiment. As the soft decision is made using the reception signal after the level adjustment, it is possible to obtain a soft-decision value in higher precision. Therefore, it is possible to provide communications in higher quality.

While the level-adjusting sections 21 a, . . . , and 21 b execute the level adjustments of reception signals in the present embodiment, analog processing sections 3 a, . . . , and 3 b can also execute these level adjustments in place of the level-adjusting sections. In this case, the analog processing sections 3 a, . . . , and 3 b output level adjustment values to the combining section 22, in addition to the analog signals of the base band.

Third Embodiment:

FIG. 3 is a diagram which shows a structure of a digital processing section 1 b according to a third embodiment. In FIG. 3, a reference numeral 1 b denotes a digital processing section of the third embodiment, 31 a, . . . , and 31 b denote noise-power estimating sections, and 32 denotes a combining section. Portions similar to those of the first embodiment are attached with like reference numerals, and their explanation will be omitted. The receiver as a whole carries out a similar operation to that of the first embodiment, and therefore, the explanation of this operation will be omitted. Only the portions different from those of the first embodiment will be explained below.

The operation of the digital processing section 1 b of the third embodiment will be explained in detail below. The noise-power estimating sections 31 a to and 31 b estimate noise power of received reception signals respectively, and output results of the estimates to the combining section 32. The combining section 32 receives soft-decision values of the P systems which are output from soft-decision output equalizers 11 a to 11 b like in the first embodiment, and estimated noise powers N1, . . . , and NP of the P systems which are output from the noise-power estimating sections 31 a to 31 b, and combines the soft-decision value in the following manner.
S(n)=Σ{si(n)/Ni}  (3)
where, i expresses i=1, . . . , and P , Σ expresses sum of i=1, . . . , and P, s (n) expresses a soft-decision value after the combining, and si (n) expresses a soft-decision value at time n which is output from each soft-decision output equalizer.

As explained above, according to the present embodiment, it is possible to obtain similar effects to those of the first embodiment. As each soft-decision value is weighted according to the estimated noise power, it is possible to obtain a result of the combining in higher precision. Therefore, it is possible to provide communications in higher quality.

Fourth Embodiment:

FIG. 4 is a diagram which shows a structure of a digital processing section 1 c according to a fourth embodiment. In FIG. 4, a reference numeral 1 c denotes a digital processing section of the fourth embodiment, 41 a, . . . , and 41 b denote soft-decision output equalizers which are different from those shown in FIGS. 1 to 3, 42 denotes a combining section, and 43 denotes an error correcting section. FIG. 5 is a diagram which shows a structure of the error correcting section 43. Reference numbers 51 and 55 denote subtractors, 52 denotes a deinterleaver, 53 denotes a soft-decision output decoding section, 54 denotes a re-encoding section, and 56 denotes an interleaver. Portions similar to those of the first embodiment are attached with like reference numerals, and their explanation will be omitted. The receiver as a whole carries out a similar operation to that of the first embodiment, and therefore, the explanation of this operation will be omitted. Only the portions different from those of the first embodiment will be explained below.

The operation of the digital processing section 1 c will be explained. The soft-decision output equalizers 41 a to 41 b that correspond to P reception signals receive respective reception signals, and reliability information of the reception signals which are output from the error correcting section 43 to be described later. The soft-decision output equalizers 41 a to 41 b output soft-decision values by taking into account distortion due to a multi-path like frequency selective fading, and output these soft-decision values to the combining section 42. The initial value of the reliability information of the reception signal is 0, for example. For the soft-decision output equalizers 41 a to 41 b, the equalizers similar to those used in the first embodiment will be used.

The combining section 42 which has received the P soft-decision values sums up the soft-decision values, and outputs a result of this calculation to the error correcting section 43 as a soft-decision value after the combining. The error correcting section 43 executes the error correction processing like deinterleaving and decoding, and feeds back a result of the processing to the soft-decision output equalizers 41 a to 41 b as common reliability information.

The operation of the error correcting section 43 of the fourth embodiment will be explained. First, the subtractor 51 subtracts the reliability information of the reception signal output from the interleaver 56, from a result of combined soft-decision values obtained by the combining section 42. The calculation is carried out by assuming that the initial value of the reliability information of the reception signal is 0, for example.

The deinterleaver 52 re-arranges the soft-decision value after the subtraction, in an opposite order to that of the interleaving at a transmitter side. In other words, the deinterleaver 52 returns the soft-decision value to the order of an original information bit sequence. The soft-decision output decoding section 53 outputs a result of the calculation of the reliability information of the decoded bit and a result of the decoding, based on the soft-decision value after the deinterleaving. The re-encoding section 54 receives there liability information, encodes there liability information based on the coding rule, and outputs a result of the encoding to the subtractor 55 as the reliability information of the encoded bit. The subtractor 55 subtracts a soft-decision value which is output from the deinterleaver 52, from the reliability information of the encoded bit, and outputs a result of this subtraction to the interleaver 56. The interleaver 56 re-arranges the soft-decision value in the same order as that of the interleaving at the transmitter side, and outputs a result of this to each soft-decision output equalizer as common reliability information of the reception signal.

According to the fourth embodiment, it is possible to obtain similar effects to those of the first embodiment. Further, the reliability of the reception signal is calculated in the error correction processing, and this reliability information is fed back to the equalizer. Thereafter, the equalization processing and the error correction processing are repeated. Based on this structure, it is possible to obtain both effects of the repetition processing and the diversity processing. Therefore, it is possible to provide communications in higher quality.

As explained above, according to one aspect of the present invention, it is possible to obtain satisfactory communication quality based on the diversity effect, by realizing the diversity reception which combines results of soft decisions that are output from the soft-decision output equalizers. Further, in the case of manufacturing a plurality of types of devices having different numbers of antennas, it is possible to demodulate reception signals by using a common soft-decision output equalizing unit. Therefore, it becomes possible to substantially reduce the manufacturing cost as compared with the conventional practice of manufacturing equalizers by matching the numbers with the numbers of antennas. Further, as the equalization processing of only the reception signal of one system is carried out based on the combining of the soft-decision values, it becomes possible to reduce the packaging area of the soft-decision output equalizing unit. As a result, there is an effect that it becomes possible to reduce the total packaging area of the device.

According to another aspect of the present invention, as the soft decision is made using the reception signal after the level adjustment, it is possible to obtain a soft-decision value in higher precision. Therefore, there is an effect that it is possible to provide communications in higher quality.

According to still another aspect of the present invention, as each soft-decision value is weighted according to the estimated noise power, it is possible to obtain a result of the combining in higher precision. Therefore, there is an effect that it is possible to provide communications in higher quality.

According to still another aspect of the present invention, the reliability of the reception signal is calculated in the error correction processing, and this reliability information is fed back to the equalizer. Thereafter, the equalization processing and the error correction processing are repeated. Based on this structure, it is possible to obtain both effects of the repetition processing and the diversity processing. Therefore, there is an effect that it is possible to provide communications in higher quality.

INDUSTRIAL APPLICABILITY

The radio communication receiver relating to the present invention is effective in the radio communication field like an automobile telephone, a portable telephone, and a cordless telephone. Further, this receiver is suitable for the manufacturing cost reduction, the packaging area reduction, and improvement of the communication quality.

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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7382841 *Sep 4, 2003Jun 3, 2008Alps Electric Co., LtdOFDM receiver for easily synchronizing base band signal
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US7694206 *Sep 18, 2007Apr 6, 2010Denso CorporationReception method, reception apparatus, and program for decoding an error correction code using soft-decision value
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Classifications
U.S. Classification375/316, 375/324
International ClassificationH04B7/08, H04B7/005, H04L1/00, H04L27/06
Cooperative ClassificationH04B7/0845
European ClassificationH04B7/08C4C
Legal Events
DateCodeEventDescription
Dec 7, 2010FPExpired due to failure to pay maintenance fee
Effective date: 20101017
Oct 17, 2010LAPSLapse for failure to pay maintenance fees
May 24, 2010REMIMaintenance fee reminder mailed
May 31, 2002ASAssignment
Owner name: MITSUBISHI DENKI KABUSHIKI KAISHA, JAPAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NAGAYASU, TAKAYUKI;REEL/FRAME:012942/0151
Effective date: 20020226