|Publication number||US7202109 B1|
|Application number||US 10/993,570|
|Publication date||Apr 10, 2007|
|Filing date||Nov 17, 2004|
|Priority date||Nov 17, 2004|
|Publication number||10993570, 993570, US 7202109 B1, US 7202109B1, US-B1-7202109, US7202109 B1, US7202109B1|
|Inventors||David Zakharian, Gary H. Yamashita, Gary M. Broussard|
|Original Assignee||National Semiconductor Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (13), Referenced by (7), Classifications (25), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates generally to wire bonded integrated circuit packages and, more particularly, to methods and arrangements for isolation and reinforcement of individual bonding wires in integrated circuit packages.
In a wire bonded integrated circuit package, a die is attached and wire bonded to a lead frame (or other substrate) and then molded. During the molding process, the flow of the mold may displace some bonding wires, a phenomenon commonly referred to as “wire sweep”. As a result of wire sweep, some displaced bonding wires may come in contact with other bonding wires and produce short circuits. Wire sweep generally causes a decrease in package yields, since packages with shorts are rejected (“short rejects”). In other situations, wire sweep may push adjacent bonding wires closer together than is desired even though they do not actually touch. This can lead to increased inductive coupling and/or crosstalk interference between adjacent bonding wires, which can decrease the performance of the resulting packaged integrated circuit and lead to further reductions in package yields.
One approach to addressing the wire sweep problem has been to insulate the bonding wires before molding. By way of example, U.S. Pat. Nos. 5,455,745 and 5,527,742 describe methods of insulating bonding wires. Although the existing wire insulation techniques work well, in the semiconductor industry, there are continuing efforts to improve packaging techniques and/or reduce costs.
To achieve the foregoing and other objects and according to the purpose of the present invention, a method for insulating and reinforcing individual bonding wires in integrated circuit packages is disclosed. In one embodiment, bonding wires are coated with an insulating material prior to the molding process. The insulating coating comprises a coating mixture that is applied to the bonding wires using an airbrush. The method enables assembly of packages with bonding wires exceeding industry specification for wire length (per wire diameter) as well as development of inboard and stacked bonding applications by eliminating mold flow induced short rejects. This is accomplished by: (a) Electrically insulating the bonding wires by coating them with an insulating mixture; (b) physically isolating the bonding wires as a result of bead formation around individual bonding wires, with the insulating beads acting as contact barriers as well as reducing the likelihood and intensity of inductive coupling and/or crosstalk interference between adjacent bonding wires due to proximity of bonding wires; and (c) enhancing the structural rigidity of the bonding wires as a result of the coating.
The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
Methods for isolation and reinforcement of individual bonding wires in integrated circuit packages are described below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be understood, however, by one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.
During the molding process, a phenomenon commonly referred to as “wire sweep” may occur, wherein the mold flow causes displacement of some of the bonding wires 11. Such displaced bonding wires 11 may end up touching other bonding wires 11 and produce short-circuits. Wire sweep generally causes a decrease in package yields, since packages having shorts between bonding wires are rejected. Wire sweep is a problem especially when the bonding wires 11 are close together and/or have large wire length to wire diameter ratio, as is the case for example with a die 10 having high pin-count.
In accordance with a first aspect of the present invention the bonding wires 11 are electrically insulated using a coating applied prior to the molding process. The insulating coating reduces the likelihood of short-circuits due to the bonding wires 11 coming in contact with electrically conducting elements in their environment. In accordance with a second aspect of the present invention, the bonding wires 11 are kept physically separate from each other with the help of beads made of insulating material and formed on the bonding wires 11. The beads 11 physically isolate the bonding wires 11 by keeping them at a distance from adjacent bonding wires 11, thereby decreasing inductive coupling and/or crosstalk interference between adjacent bonding wires 11. In accordance with a third aspect of the present invention, the structural rigidity of the bonding wires 11 is enhanced by virtue of the insulating coating, thereby reducing the tendency of the bonding wires 11 to move with the flow of the mold.
An airbrush 14 is used to spray an insulating material onto the bonding wires 11 in order to coat them. If the viscosity of the insulating material is too high to result in an even spray mist and flow when using the airbrush 14, the insulating material may be mixed with a solvent in order to reduce the viscosity and provide better flow. By way of example, an insulating mixture 15 of one part Dow Corning 3-1965 conformal coating (acting as insulator) and one to two parts Dow Corning OS-20 low molecular weight siloxane (recommended solvent for Dow Corning 3-1965) has been found to work well. As should be apparent to one of ordinary skill in the art, other insulators and solvents in other mixing ratios can be used as well.
In a preferred embodiment, a mask overlay 13 is placed over the package prior to spraying the insulating material 15 onto the bonding wires 11.
The pressure of the compressed air source 17 for the airbrush 14 is set at a compressed air pressure of about 15–25 psi (with atmospheric pressure serving as reference pressure). By way of example, a pressure of about 20 psi has been found to work well. The airbrush 14 is of a conventional type, available for example at art or craft supply stores. With the mask overlay 13 covering the lead frame 12, the airbrush 14 is held perpendicularly above the mask overlay 13 at a distance appropriate for uniform spraying of the bonding wires 11, for example at a distance of about 2–10 inches. By way of example, a distance of about 4 inches has been found to work well. The airbrush 14 is then activated to spray and coat the bonding wires 11 with the insulating mixture 15.
Aided by adhesion and surface tension, the sprayed mixture 15 covers the bonding wires 11 and as a result insulates them electrically and reinforces them mechanically. The result is increased mechanical resistance to wire sweep, as well as electrical insulation in the case that wire sweep does put one or more bonding wires 11 in contact with other bonding wires 111 or with other electrically conducting surfaces. Note that although some exposed surfaces of the die 10 and the lead frame 12 do get sprayed and insulated along with the bonding wires 11, this does not adversely affect the properties or the usability of the package.
As a further result of the adhesion and surface tension of the insulating mixture 15, the mixture 15 forms beads 16 on the bonding wires 11.
If during the spaying of the insulating mixture 15 the bonding wires 11 are sufficiently close to each other, beads 16 may form between adjacent bonding wires 11. An example is shown in
After completing the spraying process, the mask overlay 13 can be removed. At about room temperature (20°–25° C.), the solvent will evaporate and the insulating mixture will cure after a period of a few hours. By way of example, the above described mixture of one part Dow Corning 3-1965 conformal coating (insulator) and one to two parts Dow Corning OS-20 DC low molecular weight siloxane (solvent) has been found to cure at room temperature in about one hour. Optionally, this process can be accelerated by curing the mixture at a temperature of about 50° to 80° C. for a period of about 5 to 15 minutes. By way of example, the curing has been found to complete in 10 minutes at 65° C. After the insulating mixture 15 is cured, the package can undergo molding without suffering mold flow induced shorts and with reduced likelihood of inductive coupling and/or crosstalk interference due to bonding wire proximity.
The invention has been described in the context of insulating bonding wires 11 in order to eliminate mold flow induced shorts and decrease inductive coupling and/or crosstalk interference between adjacent bonding wires. However, it should be appreciated that the same techniques can be used to insulate the bonding wires 11 and/or the die 10 from their ambient environment, for example in a package where the wire bonded die 10 and lead frame 12 are sealed by the attachment of a lid. In such a case, insulating the die 10 and the bonding wires 11 protects them from the ambient air, or from accidental bonding wire 11 displacement by hand or by a tool, such as might happen when removing the lid. Another example is a test package wherein the wire bonded die 10 and lead frame 12 are not molded, but are instead passed on for testing or for further work. In general, insulation of the bonding wires 11, the die 10 and/or the lead frame 12 protects them from harmful or unwanted interaction with their environment. It should also be appreciated that the described techniques can be used with packages comprising a die wire bonded to an electrical component (such as another die) or a substrate other than a lead frame, as well as with stacked die packages. It should be further appreciated that the same techniques can be used with integrated circuit packages having as protective casing molded plastic material, dispensed epoxy, ceramic or metallic casing, or other similar protective casing.
Foregoing described embodiments of the invention are provided as illustrations and descriptions. They are not intended to limit the invention to precise form described. Other variations and embodiments are possible in light of above teachings, and it is thus intended that the scope of the invention not be limited by this Detailed Description, but rather by Claims following.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US5396104 *||Mar 27, 1990||Mar 7, 1995||Nippon Steel Corporation||Resin coated bonding wire, method of manufacturing the same, and semiconductor device|
|US5455745||Jul 26, 1993||Oct 3, 1995||National Semiconductor Corporation||Coated bonding wires in high lead count packages|
|US5527742||Jun 28, 1995||Jun 18, 1996||National Semiconductor Corporation||Process for coated bonding wires in high lead count packages|
|US5950100 *||May 31, 1996||Sep 7, 1999||Nec Corporation||Method of manufacturing semiconductor device and apparatus for the same|
|US6033937 *||Dec 23, 1997||Mar 7, 2000||Vlsi Technology, Inc.||Si O2 wire bond insulation in semiconductor assemblies|
|US6040633 *||Feb 11, 1999||Mar 21, 2000||Vlsi Technology, Inc.||Oxide wire bond insulation in semiconductor assemblies|
|US6177726 *||Feb 11, 1999||Jan 23, 2001||Philips Electronics North America Corporation||SiO2 wire bond insulation in semiconductor assemblies|
|US6445060 *||Aug 22, 2000||Sep 3, 2002||Micron Technology, Inc.||Coated semiconductor die/leadframe assembly and method for coating the assembly|
|US20010017221 *||Feb 24, 2001||Aug 30, 2001||Michio Horiuchi||Wiring boards, semiconductor devices and their production processes|
|JP2000031195A *||Title not available|
|JP2004282021A *||Title not available|
|JPH0567708A *||Title not available|
|JPS59123249A *||Title not available|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US7932131 *||Nov 5, 2007||Apr 26, 2011||Spansion Llc||Reduction of package height in a stacked die configuration|
|US9673137||Jul 2, 2014||Jun 6, 2017||Rosenberger Hochfrequenztechnik Gmbh & Co. Kg||Electronic device having a lead with selectively modified electrical properties|
|US20070287771 *||Jun 7, 2007||Dec 13, 2007||Shin-Etsu Chemical Co., Ltd.||Silicone ink composition for inkjet printing, and image-forming method|
|US20080296780 *||Apr 17, 2008||Dec 4, 2008||Samsung Electronics Co., Ltd.||Memory devices including separating insulating structures on wires and methods of forming|
|US20090115033 *||Nov 5, 2007||May 7, 2009||Spansion Llc||Reduction of package height in a stacked die configuration|
|US20170125327 *||Jun 8, 2016||May 4, 2017||Mediatek Inc.||Semiconductor package with coated bonding wires and fabrication method thereof|
|WO2015000595A1 *||Jul 2, 2014||Jan 8, 2015||Rosenberger Hochfrequenztechnik Gmbh & Co. Kg||Electronic device having a lead with selectively modified electrical properties|
|U.S. Classification||438/118, 438/119, 257/E23.033|
|Cooperative Classification||H01L2924/00014, H01L24/48, H01L23/4952, H01L2924/14, H01L2924/01006, H01L2924/01076, H01L2224/48091, H01L2924/01033, H01L2224/49171, H01L2924/01005, H01L21/568, H01L2224/8592, H01L2224/4899, H01L2924/01082, H01L2224/48247, H01L21/6835, H01L24/49|
|European Classification||H01L21/683T, H01L24/49, H01L23/495C2, H01L21/56T|
|Nov 17, 2004||AS||Assignment|
Owner name: NATIONAL SEMICONDUCTOR CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ZAKHARIAN, DAVID;YAMASHITA, GARY H.;BROUSSARD, GARY M.;REEL/FRAME:016027/0852
Effective date: 20041116
|Oct 12, 2010||FPAY||Fee payment|
Year of fee payment: 4
|Sep 24, 2014||FPAY||Fee payment|
Year of fee payment: 8