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Publication numberUS7214327 B2
Publication typeGrant
Application numberUS 10/517,764
PCT numberPCT/US2003/016240
Publication dateMay 8, 2007
Filing dateJun 27, 2003
Priority dateJun 28, 2002
Fee statusPaid
Also published asUS20050224456, WO2004003256A1
Publication number10517764, 517764, PCT/2003/16240, PCT/US/2003/016240, PCT/US/2003/16240, PCT/US/3/016240, PCT/US/3/16240, PCT/US2003/016240, PCT/US2003/16240, PCT/US2003016240, PCT/US200316240, PCT/US3/016240, PCT/US3/16240, PCT/US3016240, PCT/US316240, US 7214327 B2, US 7214327B2, US-B2-7214327, US7214327 B2, US7214327B2
InventorsLee Chen, Audunn Ludviksson
Original AssigneeTokyo Electron Limited
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Anisotropic dry etching of Cu-containing layers
US 7214327 B2
A method and apparatus for dry etching pure Cu and Cu-containing layers (220, 310) for manufacturing integrated circuits. The invention uses a directional beam of O-atoms with high kinetic energy (340) to oxidize the Cu and Cu-containing layers, and etching reagents (370) that react with the oxidized Cu (360) to form volatile Cu-containing etch products (390). The invention allows for low-temperature, anisotropic etching of pure Cu and Cu-containing layers in accordance with a patterned hard mask or photoresist (230, 330).
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1. A method for anisotropically etching a Cu-containing layer comprising the steps of:
providing a Cu-containing layer overlying a substrate;
introducing a directional beam of neutral oxygen atoms having a kinetic energy between 10 eV and 1 eV;
oxidizing the Cu-containing layer by exposure to the beam of oxygen atoms;
introducing a reagent capable of forming volatile etch products when reacted with the oxidized Cu-containing layer;
removing the etch products from the Cu-containing layer.
2. The method according to claim 1, wherein the substrate is maintained at a temperature below 200° C.
3. The method according to claim 1, wherein the substrate is maintained at a temperature below 150° C.
4. The method according to claim 1, wherein the substrate is maintained at a temperature below 100° C.
5. The method according to claim 1, wherein the reagent comprises a β-diketone gas.
6. The method according to claim 5, wherein the β-diketone gas comprises at least one of acacH, tfacH, and hfacH.
7. The method according to claim 1, further comprising introducing an inert gas.
8. The method according to claim 7, wherein the inert gas comprises at least one of argon, helium, xenon, and nitrogen.

This application claims priority to U.S. Provisional Application Ser. No. 60/392,045, filed Jun. 28, 2002; and is related to co-pending Provisional Application Ser. No. 60/379,754 filed on May 14, 2002, the entire contents of which are incorporated herein by reference.


The present invention relates to the field of semiconductor processing and more particularly to a method and apparatus for anisotropic etching and patterning of pure Cu and Cu-containing layers used in integrated circuits.


Copper (Cu) is emerging as the metal of choice in a wide variety of semiconductor applications. Lower electrical resistivity, coupled with improved electromigration performance and increased stress migration resistance are important material properties that favor the use of Cu over aluminum (Al) in interconnect lines and contacts. The lower electrical resistance is critical since it allows signals to move faster by reducing the RC time delay. The superior resistance to electromigration, a common reliability problem in Al lines, means that Cu can handle higher power densities. An equally important benefit of using Cu over Al is that the manufacturing cost for a Cu metallization scheme can be lower due to new processing methods that reduce the number of manufacturing steps and alleviate the need for some of the most difficult steps.

The capability to process substrates anisotropically permits the production of integrated circuit features at precisely defined locations with sidewalls that are essentially perpendicular to the surface of a masked overlayer. The introduction of Cu into multilevel metallization architecture requires new processing methods for Cu patterning. Because Cu is difficult to dry etch, new process schemes have been developed for Cu patterning.

The damascene approach is based on etching features in the dielectric material, filling them with Cu metal, and planarizing the top surface by chemical mechanical polishing (CMP). Dual damascene schemes integrate both the contacts and the interconnect lines into a single processing scheme. However, Cu CMP technology is challenging and it has difficulty defining extremely fine features. In addition, CMP suffers from yield-detracting problems of scratching, peeling, dishing and erosion.

An alternative to the damascene approach is patterned etching of a Cu layer. The patterned etch process involves deposition of a Cu layer on a substrate, the use of a patterned hard mask or photoresist over the Cu-containing layer, patterned etching of the Cu layer using a reactive ion etching (RIE) process; and deposition of dielectric material over the patterned Cu-containing layer. Patterned etching of Cu can have advantages over damascene processes since it is easier to etch fine Cu patterns and then deposit a dielectric layer onto the Cu pattern, than it is to get barrier layer materials and Cu metal to adequately fill small feature openings in a dielectric film.

Patterned etching using RIE processes is characterized by relatively low pressures and high ion bombardment energies. While ion bombardment is needed to achieve the desired degree of etch anisotropy, it is also responsible for secondary damage to the underlying microstructure. As semiconductor devices have become increasingly more integrated and new advanced materials, such as copper and low-k dielectric materials, have been introduced to improve the circuit properties, the damage caused by fabrication processes presents an increasingly serious problem. A leading reason for damage formation is essentially the incidence of energetic particles, such as ions and UV photons, from the plasma environment to the substrate surface.

The primary etch reagent for removing Cu layers is traditionally a chorine-containing gas in gas mixture that includes argon (Ar). Removal of pure Cu layers and Cu-containing layers with high Cu-content using chlorine plasma essentially involves physical sputtering of the low-volatility CuClx surface layer by energetic ions in the plasma. The Cu removal rates are very low when using this method and another drawback is that the sputtered CuClx coats the chamber walls and this requires periodic cleaning of the etching chamber. An equally serious problem is encountered when high-aspect-ratio features are etched in chlorine plasma and the sputtered CuClx products redeposit on the feature sidewalls where the effects of physical sputtering are reduced.

When the abovementioned chlorine-based etching process is carried out at elevated temperatures (>200° C.) to increase the volatility of the reacted Cu-containing layer, corrosion can occur due to the accumulated CuClx etch residues on the surface. If these residues are not removed by a post-etch cleaning step, they can cause continuing corrosion of the Cu even after the application of a protective layer over the etched features.

Other energy sources have been suggested to increase the etching rate. These approaches include exposing the etching surface to UV or IR light sources to accelerate desorption of CuClx from the etching surface. However, these approaches are not practical for semiconductor batch processing of large substrates due to poor etch uniformity, high cost and added equipment complexity, and reliability problems.

Accordingly, it is desirable to develop a method for anisotropic etching in semiconductor manufacturing using plasmas that are essentially free of energetic ions and photon particles. Such particles are ordinarily required to achieve an isotropic etch with atomic oxygen plasmas in the prior art, but cause secondary damage to the underlying substrate. Furthermore, the reaction products should be highly volatile and easily removed from the etched substrate. In addition, the aforementioned limitations that are encountered when etching Cu-containing layers using conventional chlorine chemistry, show that there is a need for new low temperature dry etching methods in semiconductor manufacturing using chemical approaches that do not involve chlorine-based reactants.


It is a primary object of the present invention to provide a method and an apparatus for anisotropic dry etching of pure Cu layers and Cu-containing layers used in integrated circuits.

The above and other objects are achieved, according to the present invention, by providing a method and an apparatus that uses a directional beam of high kinetic energy (hyperthermal) neutral O-atoms to anisotropically oxidize Cu layers, and an etching gas comprising an etch reagent that readily reacts with the oxidized Cu layers to form volatile Cu-containing etch products. The high directionality of the O-atom beam allows for anisotropic etching of the Cu layers in accordance with a patterned hard mask or photoresist.


A more complete appreciation of the invention and many of the attendant advantages thereof will become readily apparent with reference to the following detailed description, particularly when considered in conjunction with the accompanying drawings, in which:

FIG. 1 is a flowchart for etching a Cu-containing layer in accordance with the present invention;

FIGS. 2 a2 d show a schematic cross-sectional representation of anisotropic etching of Cu-containing layers in accordance with the present invention;

FIG. 3 shows a schematic cross-sectional representation of anisotropic etching of Cu-containing layers in accordance with the present invention;

FIG. 4 illustrates keto-enol tautomerism for β-diketones;

FIG. 5 shows a schematic illustration of the Cu(hfac)2 etch product that is formed from the reaction of hfacH with oxidized Cu; and

FIG. 6 shows a processing system according to a preferred embodiment of the present invention.


In general, the present invention pertains to a method and an apparatus for etching pure Cu and Cu-containing layers in manufacturing integrated circuits. The method uses a directional beam of high kinetic energy O-atoms to oxidize the Cu layers, and an etch reagent that forms volatile Cu-containing etch products when reacted with the oxidized Cu layers.

Importantly, the etch reagent reacts very slowly with unoxidized Cu on feature sidewalls, but reacts readily with oxidized Cu surfaces at low temperatures. Therefore, in order to achieve anisotropic etching and avoid undercutting of etch features, the oxidation rate of Cu on the vertical sidewalls of the etch features must be substantially slower than the oxidation of Cu on the horizontal surfaces. This is achieved using a directional O-atom beam.

The directional beam is preferably a hyperthermal beam of neutral O-atoms that has high kinetic energy and can be produced with low divergence from the substrate normal, thereby allowing production of masked structures with reduced ion damage and charge build-up problems often encountered in plasma processes.

In general, hyperthermal atomic beams contain neutral atoms that have high kinetic energy (Ek≧1 eV) compared to thermalized atoms (Ek˜0.05 eV) produced by conventional glow discharge devices, such as plasma ashers and sputter etching apparatus. The kinetic energy of hyperthermal atomic beams can be has high as several hundred eV.

The use of hyperthermal O-atom beams to oxidize and etch films has been shown to result in reduced ion bombardment damage and charge-induced damage that is commonly observed during plasma etching processes, such as reactive ion etching (RIE). For example, hyperthermal O-atoms have been used for anisotropic etching in semiconductor manufacturing, particularly in the areas of photoresist stripping and multilayer lithography applications, with little or no secondary damage to the underlying substrate.

Koontz and Cross in U.S. Pat. No. 5,271,800 entitled “Method for anisotropic etching in the manufacture of semiconductor devices,” disclose a method for anisotropic etching of a hydrocarbon polymer coating using a beam of hyperthermal atomic oxygen, to generate a desired pattern on a semiconductor wafer. The hyperthermal beam has kinetic energy in the range between about 0.2 eV to 20 eV and is produced using a continous optical discharge laser.

In the current invention, the use of a hyperthermal beam of neutral O-atoms to oxidize Cu layers and Cu-containing layers and subsequent reaction of the oxidized layers with etch reagents to form Cu-containing etch products, allows for anisotropic etching at low substrate temperatures. In one embodiment, the hyperthermal beam of O-atoms is generated in a separate chamber from the processing (etching) chamber and the beam contains only neutral O-atoms when it enters the processing chamber. Alternatively, the O-atom beam is generated inside the processing chamber. The etch reagent is introduced into the processing chamber using effusive sources and is therefore not exposed to a plasma source that could result in deleterious decomposition of the etch reagent prior to reaction with the oxidized Cu layers.

FIG. 1 is a flowchart for etching a Cu-containing layer in accordance with the present invention. Step 100 provides a surface having a Cu-containing layer to be etched in a process chamber. In step 102, a beam of hyperthermal oxygen atoms is generated that is capable of anisotropically oxidizing the Cu-containing layer. The beam of neutral O-atoms is exposed to the Cu-containing layer in step 104 and an oxidized Cu-containing layer is formed in step 106. An etching reagent capable of reacting with the oxidized Cu-containing layer is introduced into the process chamber in step 108. Volatile Cu-containing etching products are formed from the reaction of oxidized Cu-containing layers with the etch reagent in step 110 and are removed from the Cu-containing layer in step 112. Desorption of the etching products from the etching surface is aided by surface bombardment of the energetic O-atoms. The Cu-containing layer is exposed to the beam of O-atoms and the etching gas for a time period that enables desired etching of the Cu-containing layer.

FIGS. 2 a2 d show a schematic cross-sectional representation of anisotropic etching of Cu-containing layers in accordance with the present invention. FIG. 2 a shows a partially completed integrated circuit. The segment 200 comprises a substrate 210, a Cu-containing layer 220, and a hardmask or photoresist material 230 completes the structure. In order to achieve anisotropic etching of a Cu-containing layer, a resist material overlying the Cu-containing layer is required that is resistant to a beam of hyperthermal O-atoms. Examples of such resist materials are polysiloxane-containing resists that are processed using electron-beam exposure in the presence of a mask overlay. The segment 200 in FIG. 2 a is processed using conventional patterning methods known in the art to produce the pattern in FIG. 2 b. Further anisotropic etching of the structure in FIG. 2 b according to the present invention etches the Cu-containing layer 220 while preserving the vertical geometry of the structure defined by the photoresist pattern 230, forming the structure shown in FIG. 2 c. Continued processing as is conventional in the art, removes the remaining photoresist pattern 230, resulting in the patterned Cu-structure shown in FIG. 2 d.

FIG. 3 shows a schematic cross-sectional representation of anisotropic etching of Cu-containing layers in accordance with the present invention. FIG. 3 schematically illustrates characteristics of the etching process that allow for isotropic etching of Cu-containing layers. The segment 300 shows a partially completed integrated circuit that comprises a Cu-containing layer 310 overlaying a substrate 320 and a photoresist pattern 330 overlying the Cu-containing layer 310. Anisotropic etching of the structure in FIG. 3 removes the Cu-containing layer 310 while preserving the vertical geometry of the structure defined by the photoresist pattern 330.

The neutral O-atoms in a hyperthermal beam are schematically represented by arrows 340 in FIG. 3. A beam of hyperthermal O-atoms that has a low divergence from the substrate normal is depicted using near vertical arrows. The directionality and high kinetic energy of the O-atoms results in elastic forward scattering from the vertical surfaces (sidewalls) 350 and therefore low probability of sidewall oxidation. In other words, the residence time of the O-atoms on the sidewalls is too short and the kinetic energy in the direction normal to the sidewalls is insufficient to result in oxidation of the sidewalls 350. In contrast, O-atoms impinging on the horizontal surfaces have enough kinetic energy and a residence time that is long enough to form an oxidized Cu layer 360. An etching gas containing the etch reagent 370 is introduced into the etching chamber separate from the O-atom source using effusive nozzles and the interaction of the etch reagent 370 with the segment 300 is therefore isotropic. The etch reagent 370 is chosen so that it does not react with unoxidized Cu on the sidewalls 350.

In contrast, when the etch reagent 370 adsorbs onto the oxidized Cu layer 360 forming the adsorbed etch reagent 380, it reacts spontaneously, even at low temperature, with the oxidized Cu layer. In addition to exposure to the etch reagent 370, the horizontal surfaces 360 are under constant energetic O-atom bombardment 340, which, in addition to oxidizing the surface, further aids desorption of etch products 390 from the surface and allows etching of Cu-containing layers at low temperatures.

The kinetic energy of the O-atoms affects the oxidation of the horizontal surfaces. When O-atoms with high kinetic energy interact with the horizontal surfaces, the O-atoms penetrate the surface layer, loose their kinetic energy (become thermalized) as they become embedded in the surface layer, and thereby oxidize the surface layer. If the kinetic energy is below a certain threshold energy, the O-atoms are more likely to “bounce back” without becoming thermalized, and this can result in undesired sidewall oxidation and sidewall etching.

Process conditions that enable the desired etching of the Cu-containing layer in the current invention may be determined by direct experimentation and/or design of experiments (DOE). For example, adjustable process parameters can comprise the kinetic energy of the O-atoms in the hyperthermal beam, substrate temperature, process pressure, choice of process gases and relative gas flows of the process gases.

The etch reagent 370 can comprise chemical compounds such as β-diketones. This family of compounds is characterized by a molecular structure involving two carbonyl functional groups that are separated by a single carbon atom to which is attached at least a single hydrogen atom. Therefore, β-diketones are also characterized by keto-enol tautomerism in which the enol form is stabilized by conjugated double bonds. Tautomerism refers to an equilibrium between two different structures of the same compound.

FIG. 4 illustrates keto-enol tautomerism for β-diketones. Keto-enol tautomerism results in β-diketones having chemical properties of both ketones and enols, and for β-diketones, the possibility of intramolecular H-bonding can make enol formation much more favorable than in compounds that contain only one ketone group. In the chemical equilibrium shown in FIG. 4, the net reaction is migration of a hydrogen from carbon to oxygen. Especially movable are the hydrogen atoms, which are next to a carbon atom bound with two carbonyl groups (R1—CO—CH2—CO—R2) and the possibility to form other stable structure (enol), which resembles a six atom ring (R1—CO—CH═CO—R2), thus stabilizing that form.

In addition, the conjugated nature of the double bonding implies significant delocalization of π-electrons which affects the ability to bond to metal atoms. These delocalized electrons readily interact with the d-electrons of metal atoms to form coordination compounds. Due to the presence of the two carbonyl groups, each β-diketonate ligand coordinates twice with the metal atom to form a closed ring or chelated structure.

Common β-diketone compounds include acetylacetone (acacH, where R1═R2═CH3); 1,1,1-trifluoro-acetylacetone (tfacH, where R1═CF3 and R2═CH3); and 1,1,1,5,5,5-hexafluoro-acetylacetone (hfacH, where R1═R2═CF3). These compounds are commercially available and are widely used in chemical synthesis. The well known compound hfacH is used here as an example to illustrate chemical properties of β-diketones and the overall surface etching reactions of a β-diketone with an oxidized Cu (CuO and/or Cu2O) layer.

HfacH has the highest vapor pressure (85 Torr at 20° C.) of the above β-diketones, and this allows for easy transport of the gaseous hfacH etching gas to the processing chamber using a delivery system that can comprise a bubbler system and a mass flow controller (MFC). The bubbler system can be used with or without a carrier gas such as argon (Ar). When a carrier gas is used, it is bubbled through the hfacH liquid and becomes saturated with the hfacH vapor. The partial pressure of the hfacH vapor in the process chamber is controlled by the temperature of the hfacH liquid in the bubbler. Exemplary gas flow rates of hfacH and a carrier gas are less than 1000 sccm, preferably being less than 500 sccm. Alternatively, a liquid injection system can be used to deliver the hfacH to the processing chamber. The handling and use of etch reagents such as β-diketones reagents in this invention is well known in the art.

An important property of β-diketones is that they readily form stable anions (e.g., hfac) that can react with metal cations (e.g., Cu, Pd, and Pt ions) to form stable complexes that have relatively high volatility. For example, Cu(hfac)2 and Cu(hfac)VTMS precursors comounds are used for chemical vapor deposition (CVD) of Cu layers. FIG. 5 shows a schematic illustration of the Cu(hfac)2 etch product that is formed from the reaction of hfacH with oxidized Cu.

The net surface reactions between hfacH and oxidized Cu can be written as:
CuO+2hfacH→Cu(hfac)2 +H 2 O  (1)
Cu 2 O+2hfacH→Cu+Cu(hfac)2 +H 2 O  (2)
According to Eqs. (1) and (2), hfacH reacts with oxidized Cu and forms Cu, and volatile Cu(hfac)2 and H2O etching products. Therefore, when hfacH is selected as the etch reagent 370 in FIG. 3, the volatile etch products 390 are Cu(hfac)2 and H2O. The Cu etch product in Eq. (2) can undergo oxidation and subsequent reaction with hfacH according to Eqs. (1) or (2). Cu(hfac)2 is volatile at low temperatures (Pvap=0.1 Torr@50° C.) and does not significantly redeposit on sidewalls of Cu etch features or on the process chamber walls.

An inert gas can be added to any one of the aforementioned process gas chemistries. The inert gas may include at least one of argon, helium, krypton, xenon, and nitrogen. For example, the addition of inert gas to the process chemistry is used to dilute the process gas or adjust the process gas partial pressure(s).

Methods of reacting β-diketones with oxidized copper layers for in-situ cleaning of processing chambers have been disclosed. These methods involve oxidation of deposited residues and subsequent removal of the oxide residues from the chamber, thereby eliminating the need to disassemble the chamber for cleaning.

Nguyen and Chameski in U.S. Pat. No. 6,284,052 entitled “In-situ method of cleaning a metal-organic chemical vapor deposition chamber,” describe a method to clean the interior surfaces, and especially the chuck, of a metal deposition chamber. The method first oxidizes the surface to be cleaned with an oxygen plasma, and then removes the oxide products as a vapor with the use of hfacH.

Koide et al. in U.S. Pat. No. 5,993,679052 entitled “Method of cleaning metallic films built up within thin film deposition chamber,” describe a method that includes an oxidation step to oxidize a metallic film, a complexing step to complex the oxide film, and a sublimations step to sublimate the complex. The conditions of these cleaning steps are set so that the oxidations step is the rate determining step.

The focus of the current invention is to enable isotropic etching of Cu layers and Cu-containing layers for patterning multilayer structures. The main purpose of the above-mentioned methods is to clean and remove metallic films from processing chambers through the formation of volatile etch products from the reaction of oxidized metal films with β-diketones.

FIG. 6 shows a processing system according to a preferred embodiment of the present invention. The processing system 600 comprises a process chamber 605 and an O-atom beam source 610. The process chamber 605 comprises a substrate holder 615, upon which a substrate 620 to be processed is affixed, a gas injection system 625 for introducing process gases 630 to the process chamber 605, and a vacuum pumping system 635. For example, a gate valve (not shown) is used to throttle the vacuum pumping system 635. Process gases 530 are introduced via the gas injection system 625 and the process pressure is adjusted. The gas injection system 625 allows independent control over the delivery of process gases 630 to the process chamber from ex-situ gas sources. The process gases 630 can comprise etch reagents and inert gases. The O-atom beam source 610 generates a directional beam 640 of high kinetic energy neutral O-atoms that are introduced to the process chamber 610. The beam of O-atoms 640 etches a Cu-containing layer on the substrate 620 in the presence of the etch reagents as described in FIGS. 1–3.

Substrate 620 is transferred into and out of process chamber 605 through a slot valve (not shown) and chamber feed-through (not shown) via robotic substrate transfer system where it is received by substrate lift pins (not shown) housed within substrate holder 615 and mechanically translated by devices housed therein. Once the substrate 620 is received from the substrate transfer system, it is lowered to an upper surface of the substrate holder 615.

In an alternate embodiment, the substrate 620 is affixed to the substrate holder 615 via an electrostatic clamp (not shown). Furthermore, the substrate holder 615 further includes a cooling system including a re-circulating coolant flow that receives heat from the substrate holder 615 and transfers heat to a heat exchanger system (not shown), or when heating, transfers heat from the heat exchanger system. Moreover, gas may be delivered to the backside of the substrate to improve the gas-gap thermal conductance between the substrate 620 and the substrate holder 615. Such a system is utilized when temperature control of the substrate is required at elevated or reduced temperatures. Vacuum pump system 635 preferably includes a turbo-molecular vacuum pump (TMP) capable of a pumping speed up to 5000 liters per second (and greater) and a gate valve for throttling the chamber pressure.

A controller 645 includes a microprocessor, a memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to the processing system 600 as well as monitor outputs from the processing system 600. Moreover, the controller 645 is coupled to and exchanges information with the process chamber 605, the O-atom beam apparatus 610, the process monitor system 650, the gas injection system 625 and the vacuum pump system 635. A program stored in the memory is utilized to control the aforementioned components of a processing system 600 according to a stored process recipe. One example of controller 645 is a digital signal processor (DSP), model number TMS320, available from Texas Instruments, Dallas, Tex.

The process monitor system 650 can comprise, for example, a mass spectrometer system to measure gaseous species, such as etch reagents and etch by-products in the processing environment. In general, the process monitor system 550 is a versatile diagnostic tool capable of performing multiple tasks such as process analysis and endpoint detection. The process monitor system 650, shown in FIG. 6, is attached to the processing chamber 605. In an alternate embodiment, the process monitor system is located downstream from the vacuum pump system 635. The process monitor system 650 can be used with controller 645 to determine the status of the etching process and provide feedback to ensure process compliance.

Examples of hyperthermal O-atom sources will now be described. Various methods and apparatus have been developed for generating a beam of neutral hyperthermal O-atoms. The dissociative ionization of molecular oxygen (O2) supply gas to produce atomic oxygen can be carried out using optical laser-induced discharges, dc- or ac arcs, inductive coupling, microwave, or electron bombardment discharges, that are usually in a separate chamber connected to the wafer processing chamber. O-ions that are formed from the dissociation of O2 in the plasma are accelerated to the selected high kinetic energy and then charge neutralized, forming a beam of neutral hyperthermal O-atoms. The charge neutralization of the O-ions can be carried out using a variety of different method. An example is electron transfer from interaction of O-ions with metal surfaces at grazing incidence.

Chen and Yvonne in U.S. Pat. No. 6,331,701 entitled “RF-grounded sub-Debye neutralizer grid,” describe apparatus for generating a hyperthermal beam of neutral O-atoms with kinetic energy ranging from 20 eV to 400 eV and a beam diameter of 1 inch to greater than 10 inches for processing large substrates. The hyperthermal beam is generated by passing accelerated oxygen ions from a RF-plasma through a neutralizer grid where the oxygen ions are charge neutralized through forward surface scattering. The hyperthermal beam has high flux of neutral O-atoms and a small divergent angle (˜6–3°).

Optical laser-induced discharges can employ pulsed laser radiation as an energy source for dissociation the supply gas (e.g., O2) in an expansion nozzle. The expansion creates a hyperthermal beam of neutral reactive species (e.g., O-atoms) that can be collimated using an orifice between the expansion chamber and the processing chamber.

It should be understood that various modifications and variations of the present invention may be employed in practicing the invention. It is therefore to be understood that, within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US4652463 *Feb 1, 1985Mar 24, 1987Hughes AircraftOxidation of metals
US5108535 *Jun 15, 1990Apr 28, 1992Mitsubishi Denki Kabushiki KaishaDry etching apparatus
US5350480Jul 23, 1993Sep 27, 1994Aspect International, Inc.Surface cleaning and conditioning using hot neutral gas beam array
US5500393 *Jan 21, 1994Mar 19, 1996Sumitomo Electric Industries, Ltd.Method for fabricating a schottky junction
US5593741 *Jun 28, 1995Jan 14, 1997Nec CorporationMethod and apparatus for forming silicon oxide film by chemical vapor deposition
US5750208 *Jul 17, 1996May 12, 1998Fujitsu LimitedMethod for plasma downstream processing
US5883005Nov 3, 1997Mar 16, 1999California Institute Of TechnologySurface damage and undercutting are minimized.
US5993679May 5, 1998Nov 30, 1999Anelva CorporationMethod of cleaning metallic films built up within thin film deposition apparatus
US20010055649 *May 30, 2001Dec 27, 2001Naoaki OgureCoating, modification and etching of substrate surface with particle beam irradiation of the same
US20020006711 *May 8, 2001Jan 17, 2002Semiconductor Energy Laboratory Co., Ltd. Japanese CorporationMethod of manufacturing a semiconductor device
US20020009616 *Aug 13, 2001Jan 24, 2002Yuzo KamiguchiA crystal growth controlling layer as a films wherein a roughness along a boundary between films overlying said crystal growth controlling layer is smaller than a roughness along a boundary underlying it; nondiffusing; heat resistance
US20030168001Mar 7, 2003Sep 11, 2003Sundew Technologies, LlcALD method and apparatus
US20030203572 *Apr 18, 2003Oct 30, 2003Nec Electronics CorporationNonvolatile semiconductor memory device and its manufacturing method
US20050266618 *May 25, 2005Dec 1, 2005Masaru NonomuraPlasma processing method and method for fabricating electronic component module using the same
US20060027166 *Jul 28, 2005Feb 9, 2006Anelva CorporationSubstrate Processing Apparatus And Substrate Processing Method Using Such Substrate Processing Apparatus
US20060068605 *Sep 23, 2005Mar 30, 2006Kabushiki Kaisha ToshibaMethod of manufacturing oxide film and method of manufacturing semiconductor device
US20060110934 *Nov 8, 2005May 25, 2006Yusuke FukuchiMethod and apparatus for forming insulating film
US20060166428 *May 17, 2005Jul 27, 2006Isao KamiokaSemiconductor device and method of fabricating the same
EP1052689A1May 9, 2000Nov 15, 2000Air Products And Chemicals, Inc.Method for anisotropic etching of copper thin films with a beta-diketone, a beta-ketoimine, or a breakdown product thereof
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7781340 *Mar 5, 2007Aug 24, 2010Tokyo Electron LimitedMethod and system for etching high-k dielectric materials
US7838406 *Dec 24, 2008Nov 23, 2010Spansion LlcSONOS-NAND device having a storage region separated between cells
U.S. Classification216/62, 257/E21.582, 216/78, 257/E21.31, 257/E21.311
International ClassificationB44C1/22, H01L21/3213, H01L21/768, C23F1/12, C23F1/00, C23F1/02, B81C1/00, C23F4/00
Cooperative ClassificationH01L21/76838, C23F1/12, B81C1/00492, C23F4/00, H01L21/32136, H01L21/32135, B81C2201/0143
European ClassificationB81C1/00F2Z, H01L21/768C, C23F1/12, H01L21/3213C4B, H01L21/3213C4, C23F4/00
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