|Publication number||US7354682 B1|
|Application number||US 10/887,640|
|Publication date||Apr 8, 2008|
|Filing date||Jul 9, 2004|
|Priority date||Jul 9, 2004|
|Publication number||10887640, 887640, US 7354682 B1, US 7354682B1, US-B1-7354682, US7354682 B1, US7354682B1|
|Original Assignee||Advanced Micro Devices, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (10), Non-Patent Citations (2), Referenced by (14), Classifications (9), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates generally to the field of integrated circuit manufacture and, more particularly, to a chromeless mask for patterning sub-100 nanometer contact holes.
In manufacturing semiconductor devices, small features or small geometric patterns are created by using optical photolithography. Typically, optical photolithography is achieved by projecting or by transmitting light through a pattern made of optically opaque areas and optically clear areas on a mask. The optically opaque areas of the pattern block the light, thereby casting shadows and creating dark areas, while the optically clear areas allow the light to pass, thereby creating light areas. Once the light areas and dark areas are formed, they are projected onto and through a lens and subsequently onto a photosensitive layer (e.g., resist) on a semiconductor wafer. Typically, the lens reduces the dimensions of the light and dark areas or pattern by a predetermined amount. Projecting light areas and dark areas on the resist results in portions of the resist being exposed, while other portions of the resist will be unexposed.
After exposure, the resist is developed to remove either the exposed portions of resist for a positive tone resist or the unexposed portions of resist for a negative tone resist. The patterned resist can then be used during a subsequent semiconductor fabrication process such as ion implantation or etching.
As microcircuit densities have increased, the size of the features of semiconductor devices have decreased to the sub-micron level. These sub-micron features may include the width and spacing of metal conducting lines or the size of various geometric features of active semiconductor devices. The requirement of sub-micron features in semiconductor manufacture has necessitated the development of improved lithographic processes and systems. One such improved lithographic process is known as phase-shift lithography.
With phase-shift lithography the interference of light energy is used to overcome diffraction and improve the resolution and depth of optical images projected onto a target. In phase-shift lithography, the phase of an exposure light at the object is controlled such that adjacent bright areas are formed preferably 180 degrees out of phase with one another. Dark regions are thus produced between the bright areas by destructive interference even when diffraction would otherwise cause these areas to be illuminated. This technique improves total resolution at the object.
In general, a phase-shifting photomask is constructed with a repetitive pattern formed of three distinct layers or areas. An opaque layer provides areas that allow no light transmission, a transparent layer provides areas which allow close to 100% of light to pass through, and a phase-shift layer provides areas which allow close to 100% of light to pass through but phase-shifted 180 degrees from the light passing through the transparent areas. The transparent areas and phase-shift areas are situated such that light energy diffracted through each area are canceled out in a darkened area therebetween. This creates the pattern of dark and bright areas which can be used to clearly delineate features of a pattern defined by the opaque layer of the mask on a photo patterned semiconductor wafer.
Another type of phase-shifting photo mask used in chromeless phase-shifting lithography (CPL) is known in the art as a chromeless phase-shifting mask (CPM). A CPM has no opaque (e.g., chrome) areas. Rather, the edges between the phase-shift areas and light transmission areas on the mask form a pattern of dark lines on the wafer. A CPM includes a transparent substrate with a raised or recessed phase-shifting area. The phase-shifting area may be formed by an additive or a subtractive process. The phase-shift can be created, for example, by etching a quartz substrate of the mask to a depth that is dependent on the wavelength of the imaging system.
Generally, with light being thought of as a wave, phase-shifting with a CPM is achieved by effecting a change in timing or by effecting a shift in waveform of a regular sinusoidal pattern of light waves that propagate through a transparent material. Typically, phase-shifting is achieved by passing light through areas of a transparent material of either differing thicknesses or through materials with different refractive indexes, thereby changing the phase or the period pattern of the light wave.
CPMs reduce diffraction effects by combining both phase-shifted light and non-phase-shifted light so that constructive and destructive interference takes place. Generally, a summation of constructive and destructive interference of phase-shift masks results in improved resolution and in improved depth of focus of a projected image of an optical system. Additionally, there is no need for a second exposure of a trim mask to remove unwanted phase edges, thereby simplifying the manufacturing process.
With additional reference to
As the length 14 and width 16 of each square shape pattern 12 and the width 22 of the strips 18, 20 decrease (i.e., “C” and “S” are decreased), the dimensions of each resulting contact hole image as well as the separation between adjacent contact hole images also decrease. As the values of “C” and/or “S” are reduced below a particular threshold, however, the contact pattern projected on the photosensitive layer becomes distorted or fails to image at all. This distortion is due to optical interference or lack thereof generated by light energy passing through adjacent square shape features 12. At larger feature sizes (e.g., “C” and “S” above a certain threshold), the interference is insignificant. As the feature size is reduced, however, the interference becomes significant and the pattern does not image as desired.
Presently, chromeless phase-shift mask technology can accurately image patterns, such as contact holes, down to about 100 nm. A pervasive trend in modern integrated circuit manufacture is to produce semiconductor devices that are as small as possible. As this trend continues, CPM technology will soon reach a limitation where it can no longer pattern images required for modern integrated circuits.
Accordingly, there is a need in the art for a device and method of patterning sub-100 nm contact holes using CPL.
According to one aspect of the invention, the invention is directed to a method of forming a chromeless phase-shift mask (CPM) for imaging sub-100 nanometer (nm) features. The method includes the steps of: forming a plurality of features on a substrate; and forming a plurality of suppressors on a substrate, wherein when the CPM is exposed to light energy, the suppressors substantially reduce an interference generated between adjacent features.
Another aspect of the invention is directed to a chromeless phase-shift mask (CPM) for forming sub-100 nanometer (nm) features on a target surface. The CPM includes: a substrate; a plurality of features formed on the substrate; and a plurality of suppressors formed on the substrate, wherein when the CPM is exposed to light energy, the suppressors substantially reduce an interference generated between adjacent features.
To the accomplishment of the foregoing and related ends, the invention, then, comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
These and further features of the present invention will be apparent with reference to the following description and drawings, wherein:
In the detailed description that follows, corresponding components have been given the same reference numerals, regardless of whether they are shown in different embodiments of the present invention or at difference times during a wafer processing method. To illustrate the present invention in a clear and concise manner, the drawings may not necessarily be to scale.
The description herein is presented in the exemplary context of fabricating a contact hole on a wafer having an integrated circuit (IC) formed thereon. Example ICs include general purpose microprocessors made from thousands or millions of transistors, a flash memory array or any other dedicated circuitry. One skilled in the art will appreciate that the methods and devices described herein can also be applied to the fabrication of any article manufactured using lithography, such as micromachines, disk drive heads, gene chips, micro electro-mechanical systems (MEMS) and so forth.
The present invention relates to imaging small features, such as contact holes, thereby extending the process window for current and future manufacturing technologies. As will be described in more detail below, a chromeless phase-shift mask (CPM) is used to image contact holes on a target device. Moreover, the CPM of the present invention is used to image sub-100 nm contact holes with good contrast and depth of focus. The CPM includes main features having dimensions proportional to the holes to be patterned. Additionally, the CPM includes side lobe suppressors, which can have varying sizes depending on the proximity context of the array of contacts.
Referring first to
Separating each square shape feature 12 are vertical strips 18 and horizontal strips 20, each having a width 22, wherein the width 22 has a dimension “S”. The vertical and horizontal strips 18, 20, which are formed in non-phase-shifted glass, define the boundaries of each square shape feature 12. Additionally, the vertical and horizontal strips form edges between phase-shift areas and light transmission areas on the CPM and, therefore, form a pattern of dark lines on a target device when exposed to light energy. It is noted that while the exemplary embodiment is illustrated with vertical and horizontal strips 18, 20 having substantially the same widths, the present invention contemplates horizontal and vertical strips have differing widths. For example, the requirements of a particular circuit may dictate that the horizontal spacing be less than the vertical spacing.
Additionally, the CPM 50 includes side lobe suppressors 52. The side lobe suppressors 52 are placed on or near the intersections of the vertical strips 18 and horizontal strips 20 of the CPM 50. In other words, the side lobe suppressors 52 are formed along and/or between the corners of each square shape feature 12. The side lobe suppressors are formed in phase-shifted glass having a different phase or period pattern than the phase-shifted glass used for the square shape features 12. Thus, light energy passing through the side lobe suppressors 52 is phase-shifted with respect to the light energy passing through the square shape features 12. The phase-shifted light energy created by the side lobe suppressors 52 substantially reduces and/or cancels interference created by light energy passing through features within the optical diameter or within optical proximity of the patterned feature. The reduction in interference permits printing of a sub-100 nm contact holes with good resolution and depth of focus.
Generally, a two-way phase shift or a three-way phase shift is implemented. In a two-way phase shift, the phase-shift introduced to light energy passing through each square shape feature 12 is about 180 degrees with respect to light energy passing through non-phase-shifted glass (e.g., through the vertical and horizontal strips 18, 20). In some instances, a 90 degree phase shift can be used, depending on the amount of light intensity that is to be suppressed. In a three-way phase shift, the phase-shift introduced to light energy passing through each square shape feature 12 can be 60, 120 or 180 degrees with respect to light energy passing through non-phase-shifted glass. It is preferable that light energy passing through each square shape feature 12 be phase-shifted between about 60 degrees to about 180 degrees with respect to light energy passing through the side lobe suppressors 52.
With further reference to
Additionally, the side lobe suppressors 52 can be offset with respect to an intersection of the vertical and horizontal strips 18, 20. Referring briefly to
With additional reference to
Referring now to the flowchart 100 of
Beginning at step 102, a transparent substrate 51, such as a quartz substrate, is provided. It should be appreciated that while a quartz substrate is used in the exemplary embodiment, alternate substrates may be formed of other transparent materials having suitable optical and mechanical properties. At step 104, a resist layer 202 is deposited over the substrate 51 using conventional techniques. The type of resist used is dependent on the beam writer's exposure wavelength. For example, electron-beam generation usually requires e-beam sensitive resists, e.g., polybutene-1-sulfone (PBS), while resists for optical beam writers include ARCH 895i and TOK iP3500.
Moving to step 106, the resist layer 202 is exposed to a first pattern, such as, for example, a square shape pattern having the square shape features 12 of
Moving to step 110, the exposed portions 208 of the substrate 51 are etched, thereby forming a first set of trenches 210 in the substrate, as can be seen in
Next at step 112, the resist layer 202 is removed from the substrate 51 using conventional techniques and, at step 114, a second resist layer 202′ is deposited over the substrate 51. Moving to step 116, the optical beam writer (not shown) is used to expose the second resist layer 202′ to a second pattern. The second pattern forms an image of the side lobe suppressors 52 in the second resist layer 202′. The image of the side lobe suppressors is formed in adjacent corners of each trench 210 formed on the substrate, as is shown in more detail in
Moving to step 122, the exposed portions 212 of the substrate 51 are etched, thereby forming a second set of trenches 214 in the substrate, as can be seen in
A cross sectional view and a plan view of the CPM 50 are shown in
Although particular embodiments of the invention have been described in detail, it is understood that the invention is not limited correspondingly in scope, but includes all changes, modifications and equivalents coming within the spirit and terms of the claims appended hereto.
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|U.S. Classification||430/5, 716/53|
|International Classification||G03F1/00, G03F1/14|
|Cooperative Classification||G03F1/28, G03F1/34, G03F1/36|
|European Classification||G03F1/34, G03F1/14G|
|Jul 23, 2004||AS||Assignment|
Owner name: ADVANCED MICRO DEVICES, INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CAPODIECE, LUIGI;REEL/FRAME:014893/0027
Effective date: 20040602
|Sep 23, 2011||FPAY||Fee payment|
Year of fee payment: 4
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