|Publication number||US7378856 B2|
|Application number||US 10/493,459|
|Publication date||May 27, 2008|
|Filing date||Oct 24, 2002|
|Priority date||Oct 24, 2001|
|Also published as||CA2464525A1, CA2464525C, US7476204, US8075502, US20030135120, US20050068044, US20090124937, US20120071786, WO2003036612A1, WO2003036612A9|
|Publication number||10493459, 493459, PCT/2002/34135, PCT/US/2/034135, PCT/US/2/34135, PCT/US/2002/034135, PCT/US/2002/34135, PCT/US2/034135, PCT/US2/34135, PCT/US2002/034135, PCT/US2002/34135, PCT/US2002034135, PCT/US200234135, PCT/US2034135, PCT/US234135, US 7378856 B2, US 7378856B2, US-B2-7378856, US7378856 B2, US7378856B2|
|Inventors||William Peine, Robert Pratico, Jae S. Son|
|Original Assignee||Pressure Profile Systems|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (10), Non-Patent Citations (6), Referenced by (9), Classifications (21), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application claims priority under 35 U.S.C. § 119(e) to co-pending U.S. Provisional Patent Application Ser. No. 60/347,599, entitled “CAPACITIVE ARRAY SENSOR ELECTRONICS,” filed on Oct. 24, 2001. This application further relates to co-pending U.S. Provisional Patent Application Ser. No. 60/343,714, entitled “TIME SPATIAL VISUALIZATION OF LINEAR ARRAY DATA,” filed on Oct. 24, 2001. This application also relates to a co-pending U.S. patent application Ser. No. 10/281,068 entitled “VISUALIZATION OF VALUES OF A PHYSICAL PROPERTY DETECTED IN AN ORGANISM OVER TIME,” filed on even date herewith. Each of the above-cited applications is hereby incorporated by reference in its entirety.
The present application relates to sensor systems such as capacitive array sensors. More particularly, the present application relates to circuits and systems for capturing, amplifying and processing signals received from sensors and sensor arrays.
Sensors are devices that respond to a stimulus and produce a signal indicative of the stimulus' magnitude or other characteristic related to the stimulus. The stimulus may be any physical quantity or parameter which can affect a sensor and is usually a measurable parameter or effect. An array of sensors is a collection of individual sensors that are positioned at discrete locations and are related to one another in at least some aspects.
Sensor arrays are used in applications such as imaging, and generally involve a plurality of individual sensors placed in relation to one another such that an effectively larger sensor is formed by the array of sensors. That is, when placing sensors at a plurality of discrete locations over a region of interest it is possible to make some determination or estimate of the stimulus over the entire region of interest. Extrapolation or interpolation can provide an estimate of the magnitude of the stimulus at a spot which does not itself contain a discrete sensor. Furthermore, aggregate measures of the stimulus over the entire region of interest or smaller regions within the region of interest may be obtained by averaging or other operations performed on signals derived from individual sensors.
Applications in which such sensor arrays are useful include touch pads and distributed sensors that provide an indication of the location and magnitude of a force or a pressure applied to a region of interest.
One type of sensor array is a capacitive sensor array. This array employs a number of discrete capacitors distributed over a region of the array which may be arranged in a pattern forming a grid. A grid of sensors may comprise a plurality of capacitive sensors which may be individually addressable or addressable in groups or in their entirety. Addressing specific sensors may be accomplished using multiplexers coupled to the sensor array according to data or select signals on multiplexer select lines to determine the individual sensors to be driven or sampled. By driving a sensor it is meant the process of generally exciting the sensor or energizing the sensor so as to produce a measurement of the stimulus at the sensor. By sampling a sensor it is meant receiving an output signal from the sensor to read or detect the sensor response to the stimulus. Thus, it is possible to selectively measure a signal from a given capacitive sensor element located at a particular column and row of the capacitive array. Multiplexers may be used to determine the particular row and column from which a measurement is desired.
Capacitive array sensors have been constructed of rows and columns of conductive strips separated by a dielectric material.
A sensor array can be driven and sampled, one sensor at a time or in groups, or in its entirety. By scanning the capacitive array 100 to obtain a signal or measurement from each of its individual elements 200, it is possible to form a real-time picture of the pressure applied to the capacitive array 100.
For large arrays, technical challenges arise in making fast measurements or scans of the entire sensor array. For example, a sampling circuit such as a multiplexer that samples a selected row and column on which to perform a measurement would have to cycle through all rows and all columns (all elements of the array) at a rate sufficient to provide the measurements as required by the specific application.
Nonlinear responses in the signals derived from the individual capacitors and the stimulus, e.g., applied pressure, complicate the design of an overall sensor circuit. Furthermore, the measured signal is typically small compared to the driving signal which drives the capacitive array. This results in a poor signal-to-noise ratio when attempting to derive a useful modulation signal reflecting the quantity being measured. This is because noise becomes amplified as well as the signal being measured when using simple signal amplification.
Traditional sensor circuits employ filters and switches that slow acquisition times by causing transients which need to decay between acquiring measurements from the various elements of an array. For example, in scanning a sensor array, a switch switches between the individual sensors of a traditional array, causing a transient signal to occur. Not only do transients slow the acquisition of a complete sensor array scan, but they can affect the quality of a measurement of a stimulus by introducing noise into sensed signals.
Furthermore, conventional sensor arrays contain considerable parasitic capacitances between sensor elements and other parts of the circuit, such as ground. These parasitic capacitances can contaminate sensed signals with noise and extraneous signal components and can require extra filtering circuitry and processing time to compensate for the parasitic capacitance.
Aspects of one embodiment of the present invention are directed to a sensor system, comprising a sensor array having a plurality of sensor elements; at least one sensor element of the sensor array, having addressable connections designating the sensor element, that senses a stimulus; and an amplifier, disposed in a feedback arrangement around the sensor element, the amplifier receiving an input signal corresponding to an output of the sensor element and providing an output signal that drives the sensor element.
Another embodiment comprises aspects directed to a method for measuring a stimulus on a sensor array, comprising sensing the stimulus using at least one sensor element of the sensor array; generating a sensor element output signal corresponding to the sensed stimulus; amplifying the sensor element output signal to generate an amplified signal representative of the physical property; and feeding back the amplified signal to drive the sensor element.
Still another embodiment comprises aspects directed to a method for linearizing a non-linear sensor response, comprising sensing a stimulus using a sensor element; generating a sensor output signal corresponding to the stimulus; feeding back the sensor output signal to an input of the sensor through a non-linear transformer feedback loop corresponding to the non-linear sensor response.
Another embodiment of the invention comprises aspects directed to a method for reducing parasitic capacitance in a capacitive sensor array, comprising selectively coupling at least one sensor element in the sensor array to a common potential during a time period in which the sensor element is idle.
In the drawings, each similar component that is illustrated in various figures is represented by a like numeral, although this does not necessarily signify that the components are identical. For purposes of clarity, not every component may be labeled in every drawing. In the drawings:
The present description describes various aspects of preferred embodiments of the invention. Some aspects have been described in other co-pending applications. Specifically, this application claims priority under 35 U.S.C. § 119(e) to co-pending U.S. Provisional Patent Application Ser. No. 60/347,599, entitled “CAPACITIVE ARRAY SENSOR ELECTRONICS,” filed on Oct. 24, 2001. This application further relates to co-pending U.S. Provisional Patent Application Ser. No. 60/343,714, entitled “TIME SPATIAL VISUALIZATION OF LINEAR ARRAY DATA,” filed on Oct. 24, 2001. This application also relates to a co-pending U.S. patent application Ser. No. 10/281,068 entitled “VISUALIZATION OF VALUES OF A PHYSICAL PROPERTY DETECTED IN AN ORGANISM OVER TIME,” filed on even date herewith. Each of the above-cited applications is hereby incorporated by reference in its entirety.
The present invention is not limited in its application to the details of construction and the arrangement of components set forth in the following detailed description of the preferred embodiment and drawings. Rather, the invention encompasses other embodiments and may be practiced and carried out in various ways. Also, the terminology used herein is for the purpose of description and should not be regarded as limiting when used to describe aspects and embodiments of the invention. The use of “including,” “comprising,” or “having,” “containing,” etc., and variations thereof are meant to be open-ended and encompass at least the items listed thereafter.
Array input signal 302 provides a driving signal which is delivered to selected sensor elements 200. Once excited or driven by the array input signal 302, the capacitive array provides an array output signal 304. An output multiplexer 121 receives the array output signal 304 and, depending on the data provided to output select lines 131, the output multiplexer 121 provides a selected signal 306. Again, the selected signal 306 may comprise one or more selected samples from the capacitive array 100.
In some embodiments, the selected signal 306 be amplified by an amplifier 140. The amplifier 140 may be of any type, including analog or digital types, that provides an amplified signal 308. According to some aspects, amplification of the selected signal 306 improves resolution and accuracy of the measurement of the stimulus. An amplifier 140 may provide any gain, including gains greater than or less than unity and unity gains. The amplified signal 308 is therefore not constrained to be a signal having an amplitude greater than the selected signal 306.
The amplified signal 308 is detected by an amplitude detector 150, which is typically matched to the range of expected amplitudes provided in the amplified signal 308. Note that some embodiments may employ transconductance amplifiers, energy converters, or other elements that convert one type of signal into another. For example, an electrical signal such as a voltage may be converted into a corresponding optical signal.
The amplitude detector 150 may be any suitable amplitude detector that may detect the size, strength or amplitude of a signal. For example, the amplitude detector 150 may comprise a voltage-measuring circuit or a current-measuring circuit or a frequency measuring circuit, together described herein as amplitude detectors for the sake of simplicity. It should be appreciated that the amplifier 140 may amplify any type of characteristic of the selected signal 306 and that the amplified signal 308 merely indicates that characteristic is enhanced to generally make it simpler to read or measure the characteristic. As mentioned, the amplitude of an alternating current (AC) voltage signal may be a convenient characteristic to amplify and measure using the amplitude detector 150, however, the present invention is not so limited.
The amplitude detector 150 provides a detector output signal 310 corresponding to the amplified signal and in turn corresponding to the selected signal obtained from the element or elements of the capacitive array 100.
It is to be appreciated that
An oscillator 110 provides an oscillator signal 300 to amplifier 141. The amplifier 141 amplifies the oscillator signal 300 and provides an amplified input signal to input multiplexer 120, sometimes referred to as a driving multiplexer (DMUX). The input multiplexer 120 receives the amplified input signal 301 as well as data on input select lines 130, as described earlier. The array input signal 303 is provided by the input multiplexer 120 to selectively drive array element members 200 (not shown) of the capacitive array 100. The capacitive array 100 is driven or excited selectively by the array input signal 303, as was described above. An array output signal 305 is provided from the capacitive array 100 to an output multiplexer 121, sometimes referred to as a sampling multiplexer (SMUX). The output multiplexer 121 samples the selected array elements according to the data on output sampling lines 131.
The output multiplexer 121 provides a selected signal 307 back to the amplifier 141. In this way, the amplifier 141, the capacitive array 100 and other elements, are arranged in a feedback loop 320 by which the amplified input signal 301 and the selected signal 307 act to return a portion of the capacitive array's output to its input. In the embodiment of
The selected signal 307, once provided to amplifier 141 is also amplified and provided as an amplified output signal 309 to amplitude detector 150. In some embodiments, signals 301 and 309 are the same or have the same value. The amplitude detector 150 provides a detector output signal 311, similar to that which was discussed with regard to
It is also to be appreciated that the arrangement shown in the present embodiment does not depict a physical layout of the elements of the scanning system. For instance, some elements of the scanning system 255 may be implemented on remote circuits, as opposed to being implemented on the same circuit. Also, the entire scanning system 255 may be implemented on a microchip or other integrated circuit that performs the scanning system's function. Furthermore, various functions of the scanning system 255 may be carried out in software or in firmware or in any combination of hardware and software suitable. Examples include digital signal processing (DSP) hardware and/or software to perform various functions, e.g. filtering and amplification and application-specific integrated circuits (ASICs).
The oscillator 110 provides an output voltage signal such as an AC waveform. In some embodiments, the oscillator output signal 300 substantially comprises a single frequency sinusoid. The oscillator 110 may be free-running or may be used in a burst mode depending on the application. According to some aspects of the invention, the amplitude and/or frequency of the oscillator output signal 300 may be altered to improve measurement quality or scan rate or another operating parameter of the scanning system 255. Furthermore, the oscillator 110 may be replaced by another suitable component that can provide a periodic driving signal in a steady or pulsed or programmed mode. One example may be to replace the oscillator 110 with a microcontroller or other digital processing control unit that provides a signal substantially equivalent to that described as the oscillator output signal. The oscillator 110 may be controlled by a microprocessor 400 that supplies a control signal 411.
The input multiplexer 120 and the output multiplexer 121 may be of substantially similar design in some aspects of the present invention. According to some embodiments, the multiplexers 120, 121 select a single row 102 and column 104 from the capacitive array 100. This selection designates a single element 200 of the array 100. However, the input and output multiplexers 120, 121 may also be used to select multiple rows and columns simultaneously.
Multiplexer designs having a fast settling time are preferred in some embodiments because they allow for fast switching between sensor elements at a high sampling rate, thus improving the overall bandwidth for the scanning system 255.
The data on the input select lines 130 and the output select lines 131 of the multiplexers 120 and 121 respectively, may be provided in a number of ways. For example, the selection lines 130 and 131 may be set by a microcontroller or digital signal processing unit 400 and may also be set to increment automatically as would be done with a finite state machine. Additionally, separate amplifiers may be included in either or both of the multiplexers 120 and 121 at any of the inputs and outputs of said multiplexers. Also, an amplifier may be constructed as part of the multiplexing scheme used by the multiplexers 120 and 121.
According to some aspects of the present invention, placing the amplifier 141 in the feedback loop 320 comprising the capacitive array 100 and the multiplexers 120 and 121, allows for a higher gain and thus a higher sensitivity in the overall scanning system 255.
Amplifiers 140 and/or 141 may be implemented as described above and can also include provisions for adjusting the gain and offset of said amplifiers. Said gain and offset of amplifiers 140 and/or 141 may be prescribed on an element-to-element basis or as a single setting suitable for all elements. That is, the amplification gain or scheme used for each individual sensor element may be individually tailored to that element, or the gain may be held constant for the entire array 100. An approach combining the element-to-element setting and the single setting for all elements may be used as appropriate. A microcontroller or digital signal processing unit 400 may control said offset and gain corrections for best overall results using control signal 412.
The amplitude detector 150 samples the selected signal 307 at a sampling rate which is typically greater than the array scan rate. According to one embodiment, if a 10 by 10 array is scanned at 100 Hz, then the scan rate is 10 kHz. In this embodiment, the amplitude detector 150 would complete individual measurements at a rate greater than 10 kHz.
According to some embodiments of the present invention, the amplitude detector 150 is implemented using a rectifier that rectifies the output of the output multiplexer 121, thereby acting as a nonlinear transformer. The nonlinear transformation achieved thereby may be subsequently augmented by integrating the resulting transformer output signal over an integer number of periods. In one embodiment the integration is carried out over 10 cycles.
The nonlinear transformation mentioned above may comprise a function that creates a DC component in the signal proportional to the amplitude of the sensed signal 305 or the selected signal 307. While not recited herein for purposes of limitation, examples of such nonlinear transformation include full-wave or half-wave rectification, phase-corrected multiplication with the original driving AC signal, as well as multiplying the output signal with itself to obtain the output signal squared. The amplitude detector 150 may further comprise a root-mean-square (RMS) measuring circuit, a peak detector circuit an envelope detector circuit, or an amplitude modulation circuit and a low-pass filter circuit. Amplitude detection could also be accomplished in some embodiments by sampling the AC waveform using an analog to digital (A/D) converter and using a digital signal processor or microcontroller to compute the measured signal amplitude from the sampled data. As mentioned above, both digital and analog methods may be used for amplitude detection.
An oscillator 110 provides an oscillator signal 300, as mentioned earlier. The oscillator signal 300 is amplified using amplifier 141 to produce an amplified input signal 407. The amplified input signal 407 is provided to input multiplexer 120 as previously described and the input multiplexer 120 subsequently provides a sensor input signal 401 based on data at input select lines 130.
As discussed previously, sensor 200 will provide a sensor output signal 402 based on the sensor input signal 401 and corresponding to a sensed stimulus, such as force, pressure, etc. The sensor output signal 402 is received by an output multiplexer 121 which selects the particular sensor 200 from among a plurality of sensors in a sensor array such as a capacitive sensor array 100 (not shown). The output multiplexer 121 selects the sensor output signal 402 on the basis of data presented on output select lines 131. The selected data 403 is provided from the output multiplexer 121 to the amplifier 141 and may form a feedback loop as previously described. The amplifier 141 provides an amplified output signal 404 which typically corresponds to the selected signal 403 and being amplified in its magnitude.
In the embodiment shown if
The integrator 142 may integrate the signals 404 and 405 over several cycles of the oscillator. The integrator 142 provides a time-integrated signal 406 as an output. The integrator 142 may comprise a summing circuit having an amplifier and an integrating feedback capacitance. The symbol at the output of the integrator 142 indicates that the sensing system 265 may comprise only a portion of a larger overall sensing system such as a capacitive array scanning system.
A bias cancellation circuit is provided by use of bias-canceling capacitor Ctune and gain-adjusting capacitor Gref. The bias-canceling capacitor is adjusted at the time of manufacture and is set in a way such as to cancel or reduce the AC amplitude of the driving carrier signal 300. Oscillator signal 300 passes through the branch containing capacitor Cref to the inverting input of amplifier U1, while capacitor Ctune operates as a filter to shift the phase of the oscillator signal 300 at the output of the resistive digital to analog converter (RDAC). In this way capacitor Ctune and RDAC form a phase shifter as was described by block 145 in
The output of amplifier U1 is provided through resistor R2 to an integrator circuit formed by amplifier U2, capacitor C2 and resistor R3. The phase-shifted signal provided by the series combination of Ctune and RDAC is also provided to the inverting input of amplifier U2. The non-inverting input of amplifier U2 is coupled to ground through a resistor R4. Capacitor C2 and resistor R3 form a feedback impedance around amplifier U2 thus integrating the input signals at the input of amplifier U2. The integrator circuit, mentioned previously as block 142 in
According to some aspects, the arrangement presented in
In some embodiments, the oscillator 110 is a single polarity excitation source providing a stabilized sinusoidal waveform with a frequency in a range from 1 kHz to several megahurtz, for example from 50 kHz to 100 kHz, depending on the rest capacitance of the sensing capacitor 200 and other design considerations such as a tradeoff between sensor range, sensitivity and linearity.
The capacitive sensor 200 or a sensor array 100, represented in
Capacitor Cref is normally selected to be a multiple of Csense, for example Cref may have a value equal to three times the value of Csense. The ratio of capacitors Cref over Csense multiplied by the excitation amplitude of the oscillator determines the magnitude of the output of amplifier U1. Thus, as Csense is increased the output of amplifier U1 will decrease with a sensitivity dictated by the design of the sensing capacitors Csense.
Other design considerations determine the nature of amplifier U 1 characteristics that can be selected for the appropriate gain bandwidth and to minimize phase lag effects.
Furthermore, the driving and sensing lines to and from the sensor array 100 may be individually shielded. In this way it is possible to prevent cross-capacitance effects between the individual lines from impacting the measured capacitance due to effects such as twisting or bending of the cable bundle running to or from the array 100.
It may be advantageous in some aspects to physically place any tunable filter elements near the sensor elements 200 to provide common mode rejection to environmental effects such as temperature changes.
As described previously, combining a phase-shifted signal through the capacitor Ctune with the output of amplifier U1 in the integrator or summing amplifier U2 makes the sensor's sensitivity positive, or in other words inverts the polarity, and allows for bias cancellation. Capacitor Ctune provides any necessary phase lag adjustment while the RDAC acts as a digital potentiometer to allow for precise bias trimming for each sensor element 200. The value of the RDAC is adjusted based on a measurement at the output of summing amplifier U2 with the sensor 200 and its rest capacitance state. Such an adjustment is used to provide sufficient trim for both the bias and gain of each sensor element 200 having similar geometry or electrode surface area.
According to some aspects of the invention, the above-described sensor circuit adjustment may simplify the calibration process. Calibration is normally performed in an iterative process and is time consuming. The present design may also reduce the intervals required between calibration procedures.
Resistor Rf is a feedback resistance and in some embodiments provides stability to the circuit. Rf may also be selected to optimize the sensitivity and linearity of the sensing circuit and in some embodiments improve the settling time to increase the throughput of large sensor arrays.
As mentioned earlier, the oscillator 110 may provide a variety of oscillator signals 300. Such signals may be used as excitation waveforms which can be sinusoidal as well as non-sinusoidal waveforms. Also, dual polarity excitation is possible if its use is advantageous to a particular circuit design.
An alternative embodiment allows for the deletion of any or all of resistors R1, R4 and capacitors C1 and C2.
The output of the sensing circuit 265
An output signal 501 from the second stage amplifier 500 is provided to a rectifier 502. The rectifier 502 is constructed in any appropriate way and converts an AC signal to a DC signal. A rectified signal 503 is provided to a second stage integrator 504 which integrates signal 503 over several cycles in time. According to some aspects, using the second stage integrator 504 instead of a low pass filter stage provides improved response time and avoids the need to wait until transients decay as is the case in low pass filter circuits. Integration in the integrator 504 is carried out over approximately 10 cycles in some embodiments.
A second stage adjustable gain amplifier U3A receives a non-inverting input from signal 406A. The amplifier U3A is configured to provide an appropriate mid-band gain at the excitation frequency while maintaining approximately unity gain at very low frequencies. The mid-band gain is adjustable via the gain resistive digital-to-analog converter (GRDAC). Capacitor C4 ensures that the gain near DC frequencies is low or approximately unity.
Following the second stage amplification circuit 500 a signal 501 is provided to a rectifier stage 502. The rectifier stage 502 comprises an amplifier U3B and performs precision full-wave rectification, especially at the excitation frequencies, including rectification for low input amplitude levels.
The output of rectifier stage 502 is delivered on line 503 to averaging circuit 504. Averaging circuit 504 comprises amplifier U3C and outputs an averaging circuit output 505 that is substantially a DC signal corresponding to the stimulus delivered from the sensor 200. The overall circuit of
Note that by reversing the polarity of the diodes D1 and D2 of the rectifier stage 502 the rectifier stage 502 can be configured to provide gain for negative or positive inputs and removing the RIO path can provide for half-wave rectification.
The output of the second stage amplification circuit 275 may be an AC signal 505 having an amplitude of 4VAC and a modulation of 2V, reflecting the measured signal and having a frequency of 50 to 100 kHz. Such a signal provides a better basis for measurement of variable, but substantially DC, modulation signals from the sensor elements 200.
Some embodiments of the present invention incorporate one or more of the above-described aspects into a system which is coupled to an organism and detects physical parameters or properties of the organism. Time-series collection of biological data is one example of such an embodiment. For example, the circuits and methods described above may be used in conjunction with a catheter or other device, including non-invasive devices or minimally-invasive devices to collect biological data on a human or animal patient. Pressure profiles measured within an orifice or a cavity in time and/or space can be collected for presentation to a user or machine for storage, processing, or analysis. This may form a basis for a diagnosis of some medical condition or be used as a predictor for some other condition of the organism.
In one embodiment, a series of sensors arranged substantially in a linear form factor, are placed within a body cavity such as the esophagus and measure pressures in this cavity as a function of time. These esophageal pressures may then be displayed graphically on a graphical display, showing the physiological sequence of an action such as coughing or swallowing.
Yet another aspect of the present invention permits the use of the above-described systems and methods to obtain high-resolution measurements of large regions of interest. Some embodiments of the invention utilize several sensor array grids, each having its own sensor driving and sampling electronics, as described above, to carry out simultaneous or sequential measurements. Multiplexing electronics are used in some embodiments to collect data from the multiple sensor arrays. These embodiments may in some regards be considered scalable or parallel implementations of the concepts described above.
As an example, consider the case where a large region of interest is to be covered by sensors which collect data regarding a stimulus, e.g. pressure. The number of sensor elements will depend on the resolution required (i.e. the grid spacing) and the overall area of the region of interest. If the grid spacing is tight (fine resolution) then the number of sensor elements becomes large. In this case, interrogating or diving and sampling of each of the large number of sensors might entail cycling through the sensors in the manner described above. For a large number of sensors this can become time-consuming and slows down the sampling rate possible for sampling each member of the array. To increase the sampling rate or to increase the possible resolution for a given sampling rate or to increase the overall area that can be sampled at some resolution at a given sampling rate the region of interest may be broken into adjacent (tiled) sub-regions. Each of the sub-regions can be covered by a sensor array as described earlier, and the output from each of the sub-regions can be read by a circuit such as a multiplexer that switches between each of the sub-regions in turn.
It can be appreciated that this technique can be used in an iterative fashion, thus nesting or scaling up or down the overall sensing system so that an almost arbitrary area or resolution or sampling rate can be obtained, depending on the need. That is, in some aspects temporal performance or spatial performance may be procured at the cost of additional hardware or processing sensor electronics.
Having thus described several aspects of at least one embodiment of this invention, it is to be appreciated that various alterations, modifications, and improvements may occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the invention. Accordingly, the present description and drawings are given by way of example only.
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|U.S. Classification||324/662, 73/862.046, 324/605|
|International Classification||G01B7/00, A61B8/14, G01L9/12, G01L1/14, G01L5/00, A61B5/03, G01P15/125, G01G3/00, G06F3/044, G01R27/26, G06F3/033|
|Cooperative Classification||A61B5/037, A61B2562/0247, A61B2562/043, G06F3/044|
|European Classification||A61B5/74D6, A61B5/03H2, G06F3/044|
|Nov 12, 2004||AS||Assignment|
Owner name: PRESSURE PROFILE SYSTEMS, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PEINE, WILLIAM;PRATICO, ROBERT;SON, JAE S.;REEL/FRAME:015372/0571
Effective date: 20041103
|Nov 28, 2011||FPAY||Fee payment|
Year of fee payment: 4
|Nov 27, 2015||FPAY||Fee payment|
Year of fee payment: 8