|Publication number||US7384725 B2|
|Application number||US 10/817,193|
|Publication date||Jun 10, 2008|
|Filing date||Apr 2, 2004|
|Priority date||Apr 2, 2004|
|Also published as||CN1947063A, DE112005000736B4, DE112005000736T5, US20050221233, WO2005103828A2, WO2005103828A3|
|Publication number||10817193, 817193, US 7384725 B2, US 7384725B2, US-B2-7384725, US7384725 B2, US7384725B2|
|Inventors||Anna M. Minvielle, Cyrus E. Tabery, Hung-Eil Kim, Jongwook Kye|
|Original Assignee||Advanced Micro Devices, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (12), Non-Patent Citations (1), Referenced by (3), Classifications (14), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates generally to the field of integrated circuit manufacture and, more particularly, to a system and method using customized double-dipole illumination for fabricating contact holes of varying pitch and density.
Optical lithography or photolithography has been widely used in the semiconductor industry in connection with the formation of a wide range of structures present in integrated circuit (IC) devices. The photolithography process generally begins with the formation of a photoresist layer on or over the top surface of a semiconductor substrate or wafer (or some intermediate layer). A reticle or mask having fully light non-transmissive opaque regions, which are often formed of chrome, and fully light transmissive clear regions, which are often formed of quartz, is then positioned over the photoresist coated wafer.
The mask is placed between a radiation or light source which produces light of a pre-selected wavelength (e.g., ultraviolet light) and geometry, and an optical lens system, which may form part of a stepper apparatus. When the light from the light source is directed onto the mask, the light is focused to generate a reduced mask image on the wafer, typically using the optical lens system, which contains one or several lenses, filters, and/or mirrors. The light passes through the clear regions of the mask to expose the underlying photoresist layer and is blocked by the opaque regions of the mask, leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically through chemical removal of the exposed or unexposed regions of the photoresist layer. The end result is a semiconductor wafer coated with a photoresist layer exhibiting a desired pattern, which defines geometries, features, lines and shapes of that layer. This pattern can then be used for etching underlying regions of the wafer.
There is a pervasive trend in the art of IC device design and fabrication to increase the density with which various structures are arranged. For example, a flash memory device can include a core region containing one or more arrays of densely-packed double-bit memory cells. The manufacture of such a device can include patterning a contact layer to include regular arrays of densely-packed contact holes (e.g., source/drain contact holes) on a minimum pitch along a first direction as well as a plurality of semi-isolated contact holes (e.g., Vss contact holes). Once formed, these contact holes can be filled with a conductive material, such as a metal, a metal-containing compound or a semiconductor, to form conductive vias for electrically connecting structures disposed above and below the contact layer.
One conventional method of forming contact holes includes performing a double exposure technique using two different illumination sources to expose two different masks (or one mask rotated into two different orientations) for patterning one contact layer. With such a technique, each mask/illumination pair can be optimized to deliver maximum resolution for a given class of structures, while minimizing the impact on the structures defined or otherwise patterned by the other exposure. However, as with any double exposure technique, the effects of misalignment must be taken into account, which can be difficult, time-consuming, and expensive. Otherwise, printing defects may occur.
While various mask types and aggressive illumination strategies have been employed for the imaging of sub-resolution features, including contact holes, each illumination type has certain tradeoffs (e.g., improved contrast at the expense of depth of focus). In addition, each mask type can exhibit varying performance dependent on the pattern to be imaged.
Accordingly, a need exists for an improved system and method for fabricating contact holes of varying pitch and density.
According to one aspect of the invention, the invention is directed to a method of forming a plurality of contact holes in a contact layer of an integrated circuit device. The plurality of contact holes can include a plurality of regularly spaced contact holes having a first pitch along a first direction and a plurality of semi-isolated contact holes having a second pitch along a second direction. The method can include providing a photoresist layer over the contact layer and exposing the photoresist layer to a double-dipole illumination source. The double-dipole illumination source can transmit light energy through a mask having a pattern corresponding to a desired contact hole pattern. This exposure can result in the desired contact hole pattern being transferred to the photoresist layer. The double-dipole illumination source can include a first dipole aperture, which is oriented and optimized for patterning the regularly spaced contact holes, and a second dipole aperture, which is oriented substantially orthogonal to the first dipole aperture and optimized for patterning the plurality of semi-isolated contact holes. The contact layer can be etched using the patterned photoresist layer.
According to another aspect of the invention, the invention is directed to an aperture plate for use with an illumination source for patterning a plurality of contact holes of varying pitch and density. The plurality of contact holes can include a plurality of regularly spaced contact holes having a first pitch along a first direction and a plurality of semi-isolated contact holes having a second pitch along a second direction. The aperture plate can include a substrate, which defines (i) a first dipole pair of openings customized for patterning the plurality of regularly spaced contact hole openings and (ii) a second dipole pair of openings customized for patterning the plurality of semi-isolated contact hole openings.
These and other features of the invention are fully described and particularly pointed out in the claims. The following description and annexed drawings set forth in detail certain illustrative embodiments of the invention, these embodiments being indicative of but a few of the various ways in which the principles of the invention may be employed.
These and further features of the present invention will be apparent with reference to the following description and drawings, wherein:
In the detailed description that follows, corresponding components have been given the same reference numerals regardless of whether they are shown in different embodiments of the present invention. To illustrate the present invention in a clear and concise manner, the drawings may not necessarily be to scale
One embodiment of the present invention includes a method of forming a plurality of contact holes in a contact layer of an integrated circuit (IC) device, where the plurality of contact holes includes a plurality of densely-packed, regularly spaced contact holes having a first pitch along a first direction and a plurality of semi-isolated contact holes having a second pitch along a second direction. After providing a photoresist layer over the contact layer, the photoresist layer can be exposed to a double-dipole illumination source, which transmits light energy through a mask having a pattern corresponding to a desired contact hole pattern. The double-dipole illumination source can include a first dipole aperture oriented and optimized for patterning the densely-packed, regularly spaced contact holes and a second dipole aperture oriented approximately orthogonal to the first dipole aperture and optimized for patterning the plurality of semi-isolated contact holes.
The present invention will be described below in the exemplary context of a process for ultimately patterning a contact layer (e.g., an interlayer dielectric (ILD) layer) that forms a part of an IC device. Exemplary IC devices can include general use processors made from thousands or millions of transistors, a flash memory array or any other dedicated circuitry. However, one skilled in the art will appreciate that the methods and systems described herein can also be applied to the design process and/or manufacture of any article, which includes contact holes or other feature patterns of varying pitch and density and is manufactured using photolithography, such as micromachines, disk drive heads, gene chips, microelectro-mechanical systems (MEMS) and the like.
For purposes of this description,
With reference now to
Light passing through the aperture plate 44 can be condensed or otherwise focused by a lens system 46 onto a mask or reticle 48 having a desired contact hole pattern thereon. In one embodiment, the mask 48 can include a transmissive binary mask having a chrome pattern etched on a quartz substrate. However, it is to be appreciated that other masks, such as reflective masks, phase-shifting masks, attenuated or otherwise, and the like, can be employed without departing from the scope of the present invention. At least the 0th and 1st order diffraction components of the light passed by the mask 48 can be focused by a lens system 50 onto a target 52, such as a substrate or wafer 54 including a contact layer 56 coated with a photosensitive film, such as a photoresist 58.
With reference to
In one embodiment, the spacing of the first dipole pair 60 is optimized or otherwise selected in accordance with
where lambda (λ) is the wavelength of the light source being employed, NA is the numerical aperture associated with the photolithography apparatus, and Pitchx is the pitch of the densely-packed contact holes along the x-direction. Dipolex represents the spacing (dashed line 70) between the respective centers of the dipole pair 60.
Similarly, the spacing of the second dipole pair 62 is optimized or otherwise selected in accordance with
where lambda (λ) is the wavelength of the light source being employed, NA is the numerical aperture associated with the photolithography apparatus, and Pitchy is the pitch of the semi-isolated contact holes along the y-direction. Dipoley represents the spacing (dashed line 72) between the respective centers of the dipole pair 62. The double-dipole aperture plate 44, including the first and second dipole pairs spaced according to two optimized solutions for Dipolex and Dipoley, is used to illuminate a single mask having the desired contact hole pattern.
In additional to optimizing the spacing of the first dipole pair and the second dipole pair, other illumination and/or aperture parameters can be selected and/or optimized. In general, a dipole pair can be characterized using the following parameters: the orientation of the poles (e.g., horizontal, vertical or some angle relative thereto); inner radius, σin; outer radius, σout; and pole angle, θ, (also referred to as wedge angle). These parameters are illustrated in
In order to test the aforementioned illumination and/or aperture parameters, one or more simulation images can be generated using one of a variety of commercially available simulation tools, such as, for example, CALIBREŽ from Mentor Graphics Corp. Each simulation image can correspond to a contact hole pattern that would be printed or otherwise formed on or in the contact layer if the contact layer was exposed to an illumination source (having a selected combination of illumination and/or aperture parameters) directed through a mask including the desired contact hole pattern. Alternatively, the simulation image can correspond to a simulation of a photoresist layer that would be patterned according to exposure to an illumination source (having selected illumination and/or aperture parameters) directed through a mask including the desired contact hole pattern. As such, the “real” contact hole pattern can be simulated for various combinations of illumination and/or aperture parameters as well as optical proximity corrections (OPC) and any other parameters that can alter the final contact hole pattern as compared to the desired contact hole pattern.
In order to determine the effectiveness of each set of illuminations and/or aperture parameters, each simulated image can be evaluated by applying one or more optical rule checking (ORC) checks. The ORC checks can be performed based on or more process-related parameters, also referred to as metrics. Contact hole pattern features that fall outside of an allowed range of one or more practice-related parameters may be indicative of a less than optimal set of illumination and/or aperture parameters.
Once the illumination source, including the customized double-dipole aperture plate is selected, a contact layer can be processed to form a desired contact hole pattern. This processing can be similar to that generally known and used by those of ordinary skill in the art. Therefore, the process will not be described in great detail.
A substrate, such as a semiconductor wafer, can include one or more layers of various materials. In one embodiment, the wafer can include a contact layer to be patterned with a desired contact hole pattern. A photoresist layer can be disposed over the contact layer. As one skilled in the art will appreciate, other materials and/or treatments can be disposed between the contact layer and the photoresist layer, including, for example, a primer, a bottom anti-reflective coating (BARC) layer, and so forth. The contact layer can be made from any suitable material, such as an insulator (e.g., silicon oxide or SiO2, silicon nitride or Si3N4, etc). An appropriate photoresist layer, such as, a positive tone or negative tone photoresist layer, can be employed.
The photoresist layer can be exposed to customized double-dipole radiation, generated by the illumination source passing through the customized double-dipole aperture plate, passing through a mask containing a desired contact hole pattern. In one embodiment, the mask can include a transmissive binary mask, including an etched chrome pattern on quartz. However, it is to be appreciated that other masks can be employed. The exposed photoresist layer can be developed, optionally including a post exposure (PE) bake, in order to remove exposed or unexposed portions of the photoresist layer (depending upon whether a positive tone or negative tone photoresist is employed). Following development, the photoresist layer can include the desired contact hole pattern. Once the photoresist layer has been patterned with the desired contact hole pattern, the contact layer can be etched using a suitable wet etch or dry reactive ion etch (REI) to form contact hole openings corresponding to the desired contact hole pattern in the contact layer. Of course, further processing can include filling the contact hole openings with a suitable conductive material (e.g., a metal, a metal-containing compound or a semiconductor) to form a conductive via that vertically traverses the contact layer. The vias can be used to establish electrical connection between a layer disposed under the contact layer and a subsequently formed layer, components or interconnect disposed above the contact layer.
The above description is provided in connection with the exemplary context of patterning a core region of a contact layer to include densely-packed contact holes as well as semi-isolated contact holes by a single exposure of a mask using customized double-dipole illumination. Often, the fabrication of an IC device includes fabrication of features in the periphery area of the IC device. Typically, the desired contact hole pattern for the periphery region of the contact layer of an IC device includes a random arrangement of contact holes, which can range in density from a regular string of contact holes on a minimum pitch to fully isolated contact holes.
In one embodiment, a contact layer in the core region of the device can be patterned using a double-dipole illumination source, as is described above, to pass light through a single binary mask having a desired contact hole pattern. The periphery region of the contact layer can be patterned separately (i.e., with a different exposure) using a different illumination geometry and a different mask, having a different desired contact hole pattern. In one embodiment, a “low sigma” illumination source (i.e., an annular or dipole source in which the difference between σin and σout is relatively small) can be used in conjunction with an attenuated phase shift mask (PSM) having a transmission of about six percent. Alternatively, other illumination source-mask combinations can be employed in the separate patterning of the periphery region of the contact layer.
It should be noted that in interpreting the words “above”, “over”, and “on top of” in the specification and claims, these words are not intended to be restricted to directly above, directly over or directly on top of, but may include intervening layers between a layer described as being “above”, “over”, or “on top of” another layer or substrate. For example, the description of a first material above, over or on top of a substrate is not intended to exclude other layers being disposed therebetween.
Although particular embodiments of the invention have been described in detail, it is understood that the invention is not limited correspondingly in scope, but includes all changes, modifications and equivalents.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8927198||Jan 15, 2013||Jan 6, 2015||International Business Machines Corporation||Method to print contact holes at high resolution|
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|U.S. Classification||430/311, 430/5|
|International Classification||G03F1/00, G03F7/20|
|Cooperative Classification||G03F7/70425, G03F7/70091, G03F7/70125, G03F7/701, G03F7/70158|
|European Classification||G03F7/70D8, G03F7/70D16B, G03F7/70D10, G03F7/70D8B, G03F7/70J|
|Apr 19, 2004||AS||Assignment|
Owner name: ADVANCED MICRO DEVICES, INC., CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MINVIELLE, ANNA M.;TABERY, CYRUS E.;KIM, HUNG-EIL;AND OTHERS;REEL/FRAME:014528/0277;SIGNING DATES FROM 20040303 TO 20040304
|Sep 23, 2011||FPAY||Fee payment|
Year of fee payment: 4
|Nov 25, 2015||FPAY||Fee payment|
Year of fee payment: 8