|Publication number||US7386326 B2|
|Application number||US 10/235,462|
|Publication date||Jun 10, 2008|
|Filing date||Sep 4, 2002|
|Priority date||Sep 4, 2001|
|Also published as||US20030148793|
|Publication number||10235462, 235462, US 7386326 B2, US 7386326B2, US-B2-7386326, US7386326 B2, US7386326B2|
|Inventors||Vijay Sundararajan, Sriram Sundararajan, Alan Gatherer|
|Original Assignee||Texas Instruments Incorporated|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (16), Referenced by (2), Classifications (9), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Application No. 60/317,362, filed Sep. 4, 2001.
This invention relates in general to task-based co-processors, and, more particularly, to a programmable task-based co-processor.
A co-processor is an additional processor that performs one or more specific tasks to reduce the load on the main processor, or CPU. For example, many personal computers include co-processor chips to perform specific arithmetic functions, which may significantly increase the speed of the computer.
One particular application in which co-processors are commonly used is for processing wireless telecommunication signals. Telecommunication signals transmitted by mobile devices, such as mobile phones, laptops, or PDAs, may be received by a wireless antenna and communicated to a base station node. The base station node then processes the received signals before sending them toward their final destination. The base station node may include one or more co-processors to perform specific tasks in processing the signals. For example, a base station node operating under the 3GPP FDD standard may include one or more co-processors to perform correlation functions for RAKE receiver operations, delay path searching, and preamble detection.
In accordance with the present invention, a programmable task based co-processor is provided that substantially eliminates or reduces the disadvantages and problems associated with previously developed co-processors.
According to one embodiment, a programmable co-processor system comprising a datapath, a microprogram, and a microcontroller is provided. The datapath includes one or more datapath elements operable to receive input signals. The microprogram memory includes a microprogram operable to control the datapath in order to process the input signals. The microcontroller is operable to modify the microprogram based on a modification command.
According to another embodiment, a programmable co-processor system includes a plurality of control modules. Each control module includes a datapath and a microprogram memory. The datapath includes one or more datapath elements operable to receive input signals. The microprogram memory includes a microprogram operable to control the datapath in order to process the input signals. The programmable co-processor system also includes one or more microcontrollers. Each microcontroller is operable to modify one or more of the plurality of microprograms based on one or more modification commands.
According to yet another embodiment, a method for processing signals is provided. The method includes storing a microprogram in a microprogram memory, receiving a modification command at a microcontroller, translating the received modification command into control information, modifying the microprogram based on the control information, receiving input signals at a datapath including one or more datapath elements, and controlling the datapath based at least in part on the modified microprogram in order to process the input signals.
Various embodiments of the present invention may benefit from numerous advantages. It should be noted that one or more embodiments may benefit from some, none, or all of the advantages discussed below.
One advantage is that a fully (or at least partially) programmable or re-programmable co-processor may be provided. A co-processor may include a microprogram that includes control words used to drive a datapath designed to process input signals, such as signals communicated from a wireless device. The microprogram may be adjusted, or reprogrammed, during operation to perform a variety of tasks based on a series of task commands communicated by a processor. For example, the microprogram may be adjusted, or reprogrammed, during operation to generate relatively complex bit patterns used to drive the datapath, or to adjust such bit patterns based on particular feedback. In addition, the microprogram may be modified (one or more times) as desired by various customers, such as to meet the configuration standards required by the particular customers.
Another advantage is that the microcontroller may modify or reprogram particular signal patterns generated by a hardware control module by modifying or updating particular pattern properties (such as a phase and period associated with a particular pattern) which at least partially define the signal patterns, rather than updating or modifying the individual bits which form the signal patterns. Thus, in particular embodiments, the microcontroller need not operate at clock rate in order to modify or reprogram the signal patterns used to control the datapath.
Yet another advantage of the invention is that task-specific data, such as data associated with a particular mobile user, may be stored in a supplemental memory separate from the microprogram memory in which the microprogram is stored. This may reduce the size of the microprogram and, more particularly, the size of the control words in the microprogram, which may be advantageous or even necessary for the desired operation of co-processor. For example, this may allow more complex microprograms to be used, and may increase the speed at which such microprograms may be executed.
Other advantages will be readily apparent to one having ordinary skill in the art from the following figures, descriptions, and claims.
For a more complete understanding of the present invention and for further features and advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which:
Example embodiments of the present invention and their advantages are best understood by referring now to
In particular embodiments, receiver 20 may include a processor 22 coupled to one or more co-processors 24. In the embodiment shown in
As shown in
Datapath 40 may comprise one or more datapath elements 50 operable to perform various operations for processing input signals 18. Microprogram memory 34 may include or store a microprogram 52 operable to control datapath 40 to process input signals 18. Supplemental memory 36 may be operable to store task-specific data 56 corresponding with one or more tasks. Microprogram 52 may comprise a plurality of control words 54, each operable to control one or more datapath elements 50 to perform a micro-task. In some embodiments, each task includes or corresponds with a particular number of micro-tasks. Each control word 54 in microprogram 52 may include a task identifier 58 operable to identify the task corresponding with that control word 54. Storing task-specific data 56 in supplemental memory 36 reduces the size of microprogram 52 and, more particularly, the size of control words 54, which may be advantageous or even necessary for the desired operation of co-processor 24.
In particular embodiments, each task corresponds with an active user, such as a mobile station 16 transmitting signals to receiver 20 via antenna 12. Each task may include or correspond with a certain number of micro-tasks and each micro-task may consume one clock cycle. Data common to each micro-task corresponding with a particular task may be stored as task-specific data 56 in supplemental memory 36 so that each control word 54 (which each correspond with one micro-task) need not store-such common data, thus reducing the size of control words 54 and microprogram 52. For example, in a particular embodiment operating in a code division multiple access (CDMA) standard, the pseudo-random sequence defining each active user may be stored as task-specific data 56 in supplemental memory 36.
Hardware control module 38 may be operable to generate signal patterns 60 based on data received from microprogram memory 34 and supplemental memory 36. Signal patterns 60 are used to control datapath elements 50 in order to process input signals 18. Hardware control module 38 may include various hardware components such as a reset pattern generator and an address generator, for example.
Microcontroller 32 may be operable to modify or reprogram microprogram 52 and/or task-specific data 56 based on task commands received from processor 22. Shared memory 30 provides an interface for the communication of data from processor 22 to microcontroller 32. In the embodiment shown in
In one embodiment, microcontroller 32 is an Advanced RISC Machine (ARM) processor. However, microcontroller 32 may be any other type of microprocessor suitable to control a microprogram based on commands received from a processor without departing from the scope of the present invention.
In operation, processor 22 communicates task commands to microcontroller 32 using shared memory 30 as an interface. Microcontroller 32 interprets or translates the data commands using a program stored in program memory 42. Based on these translations or interpretations, microcontroller 32 writes new data into microprogram 52 and/or task-specific data 56. For example, microcontroller 32 may load new words into, or replace existing words within, microprogram 52.
Control words 54 may be communicated to hardware control module 38 in sequential order in a repeating loop. When a particular control word 54 is to be communicated to hardware control module 38, the task identifier 58 is used to identify the task corresponding with the particular control word 54 (or micro-task). The task-specific data associated with the identified task is communicated to hardware control module 38 along with the particular control word 54. Hardware control module 38 may generate one or more signal patterns 60 based on the received task-specific data and control word 54, as described in greater detail below with reference to
Signal patterns 60 may be used to control one or more datapath elements 50 in order to process input signals 18 to generate output signals 26 and/or control information 28. Output signals 26 and control information 28 may include none, some, or all of the same signals or information. As shown in
In this manner, microprogram 52 and/or task-specific data 56 may be repeatedly or continuously adjusted, or reprogrammed, during operation of co-processor 24 to perform a variety of tasks based on a series of task commands communicated by processor 22. Thus, in some embodiments, co-processor 24 may be said to be fully programmable. In addition, since microprogram 52 may be loaded and controlled by microcontroller 32 based on instructions or task commands communicated by processor 22, co-processor 24 may be configured and reconfigured to process input signal 18 as desired by various customers.
Task specific data 56 may include a particular number of data entries, each corresponding with a particular task or user, such as data entries 56 a, 56 b, and 56 c, as shown in
Control word 54 a may include task identifier 58 and a set of pattern properties 64. Task identifier 58 may identify, or point to, the data entry (in the example shown in
Hardware control module 38 may include various hardware components operable to interpret data in control words 54, such as a reset pattern generator 66 and an address generator 68. Reset pattern generator 66 may be operable to generate a reset pattern 70, such as the reset bit patterns shown in
Datapath elements 50 may include a variety of mathematical operators, such an accumulator 72. Accumulator 72 may be operable to process input signals 18 to generate output 74 based at least in part on reset pattern 70 generated by reset pattern generator 66 of hardware control module 38, as discussed in greater detail below with reference to
As discussed above with reference to
Similarly, microcontroller 32 may add a new data entry 80 or replace an existing data entry with new data entry 80 to modify or update task specific data 56. Like new control word 76, new data entry 80 may be generated by microcontroller 32 in response to a task command received from processor 22, such as described above with reference to
As discussed above with reference to
By controlling or modifying pattern properties 64 which at least partially define bit patterns such as bit patterns 80 and 82 rather than modifying the bit patterns in a bit-by-bit fashion, microcontroller 32 need not feed, adjust, or otherwise control microprogram 52 at clock speed. In addition, using pattern properties 64 to represent bit patterns reduces the size of control words 54 associated with such bit patterns. In addition, by controlling microprogram 52 using microcontroller 32, complex bit patterns such as bit pattern 82 may be generated and modified as desired by processor 22.
Path monitor control module 104 includes a path monitor datapath 110 and is generally operable to monitor multi-paths associated with the signals communicated from a wireless user. For example, as the user moves around, new multi-paths may appear while others may disappear. Path monitor control module 104 may be operable to perform correlations, such as sliding window correlations, to monitor such multi-paths.
Finger de-spreader control module 106 includes a finger de-spreader datapath 112 and is generally operable to separate a plurality of multi-paths associated with a signal from a wireless user and then add the multi-paths together in phase. For example, finger de-spreader control module 106 may separate the plurality of multi-paths by demodulating the wireless signals received from the antenna. Finger de-spreader control module 106 may perform such operations using various correlations, such as correlations performed using an adder tree.
In the embodiment shown in
First and second microcontrollers 114 and 116 may be similar or identical to microcontroller 32 described above. Thus, the microprograms and/or the task-specific data associated with each control module may be repeatedly or continuously adjusted, or reprogrammed, during operation of correlation co-processor 100 to perform various tasks based on a series of task commands communicated by processor 120. Thus, in some embodiments, correlation co-processor 100 may be said to be fully programmable.
Although an embodiment of the invention and its advantages are described in detail, a person skilled in the art could make various alternations, additions, and omissions without departing from the spirit and scope of the present invention as defined by the appended claims.
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|U.S. Classification||455/561, 455/418, 712/E09.007, 455/562.1|
|International Classification||G06F9/24, H04Q7/30, H04M1/00|
|Sep 4, 2002||AS||Assignment|
Owner name: TEXAS INSTRUMENTS INCORPORATED, TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SUNDARARAJAN, VIJAY;SUNDARARAJAN, SRIRAM;GATHERER, ALAN;REEL/FRAME:013270/0610
Effective date: 20020903
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