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Publication numberUS7502231 B2
Publication typeGrant
Application numberUS 11/950,971
Publication dateMar 10, 2009
Filing dateDec 5, 2007
Priority dateJul 16, 2003
Fee statusLapsed
Also published asUS7323642, US20050011668, US20080083561
Publication number11950971, 950971, US 7502231 B2, US 7502231B2, US-B2-7502231, US7502231 B2, US7502231B2
InventorsYi-Sung Hwang, Ho-Tae Jin, Hwan-young Jang
Original AssigneeSamsung Electronics Co., Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Thin printed circuit board for manufacturing chip scale package
US 7502231 B2
Abstract
Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
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Claims(7)
1. An apparatus comprising:
a thin printed circuit board for manufacturing a chip scale package, the thin printed circuit board comprising at least one unit printed circuit board, the at least one unit printed circuit board including a circuit pattern to adhere to a semiconductor chip, a substrate surrounding the circuit pattern, and at least one hole extending therethrough, the at least one hole being disposed between an edge of the thin printed circuit board and the at least one unit printed circuit board; and
a support molding, which is spaced from the circuit pattern of each unit printed circuit board on the substrate of the at least one unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
2. The apparatus of claim 1, wherein the support molding is formed of one of an epoxy molding compound and a resin.
3. The apparatus of claim 1, wherein the support molding is formed using a metal pattern.
4. The apparatus of claim 1, wherein the unit printed circuit boards are arranged in a row.
5. The apparatus of claim 1, wherein the support molding is disposed between the at least one hole and the edge of the thin printed circuit board.
6. The apparatus of claim 5, wherein the at least one hole is located inside a perimeter defined by the ring shape of the support molding.
7. An apparatus comprising:
a thin printed circuit board for manufacturing a chip scale package, the thin printed circuit board comprising at least one unit printed circuit board, the at least one unit printed circuit board including a circuit pattern to adhere to a semiconductor chip, and a substrate surrounding the circuit pattern; and
a support molding, which is spaced from the circuit pattern of each unit printed circuit board on the substrate of the at least one unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board,
wherein one or more holes or slots are vertically arranged at interfaces between adjacent unit printed circuit boards to prevent distortion of the thin printed circuit board.
Description
CROSS REFERENCE TO RELATED APPLICATIONS

This application is a Divisional of U.S. Ser. No. 10/893,615, filed on Jul. 16, 2004, now issued as U.S. Pat. No. 7,323,642, which claims priority from Korean Patent Application No. 2003-48652, filed on Jul. 16, 2003, all of which are hereby incorporated by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a printed circuit board (PCB) for manufacturing a semiconductor package, and more particularly, to a thin PCB for manufacturing a chip scale package (CSP).

2. Description of the Related Art

In recent years, as most electronic products including various portable data communication devices, such as personal computers, cellular phones, and personal data terminals, have been scaled down and become more light-weight and efficient, their data processing capacities have increased. Thus, using a chip scale package (CSP) technique, a semiconductor chip can be assembled in a semiconductor package having a size similar to or slightly larger than the chip size. CSP techniques vary according to manufacturing methods, for example, a thin PCB method of manufacturing a CSP. In this method, semiconductor packages comprise a semiconductor chip manufactured with a thin PCB. However, the thickness (e.g., 0.17 mm or less) of a conventional thin PCB for manufacturing a CSP is typically smaller than that (e.g., 3 mm) of a conventional PCB for manufacturing a typical semiconductor package.

FIGS. 1 through 3 are diagrams illustrating problems of a conventional thin PCB. As shown in FIG. 1, in a conventional thin PCB 10, a plurality of unit PCBs 10 a, 10 b, and 10 c are connected in a row. Although only three exemplary unit PCBs 10 a, 10 b, and 10 c are illustrated in FIG. 1, the thin PCB 10 can include a greater number of unit PCBs. Circuit patterns 11 a, 11 b, and 11 c are disposed in the unit PCBs 10 a, 10 b, and 10 c, respectively. A plurality of holes (not shown) are formed in each of the circuit patterns 11 a, 11 b, and 11 c. A plurality of holes or slots 12 are vertically arranged at interfaces between adjacent unit PCBs, for example, between the unit PCBs 10 a and 10 b or 10 b and 10 c. These holes or slots 12 suppress distortion of the PCB 10. A plurality of holes 13 are formed in an upper portion of the thin PCB 10, and a plurality of holes 14 are formed in a lower portion thereof. These holes 13 and 14 are used as recognition marks for a package manufacturing apparatus and may be used for alignment of the thin PCB 10 when the thin PCB 10 is transferred.

As described above, the thin PCB 10 has a relatively small thickness. Thus, the thin PCB 10 is flexible and makes it difficult to manufacture semiconductor packages. Thus, one solution shown in FIG. 2 was proposed. That is, semiconductor packages are manufactured using a carrier 20 supporting a thin PCB 10. In this method, since the thin PCB 10 is supported by the carrier 20, it is inflexible during package manufacturing processes. The carrier 20 can be formed of an inflexible material, for example, a sus material. A vacant space 23 is located in the center of the carrier 20 so as to expose the rear surface of the thin PCB 10. The carrier 20 is a kind of frame that surrounds the vacant space 23. Holes 21 are formed on both lateral surfaces of the carrier 20, and a mark 22 is formed on an edge thereof. The holes 21 and the mark 22 are used as recognition marks and may be used for alignment of the carrier 20 when the carrier 20 is transferred.

As shown in FIG. 3, in order to adhere the thin PCB 10 to the carrier 20, the thin PCB 10 is first mounted on the carrier 20. Only the upper and lower portions of the thin PCB 10 overlap upper and lower portions of the carrier 20 and are supported by the carrier 20, and the remaining portion of the thin PCB 10 do not overlap the carrier 20. Next, the thin PCB 10 is secured to the carrier 20 by an adhesive 31. The adhesive 31 is applied to the upper and lower portions of the thin PCB 10 and the upper and lower portions of the carrier 20.

As described above, since the conventional thin PCB 10 has a very small thickness, it should be adhered to a supporting portion such as the carrier 10 and used in package manufacturing processes. Thus, prior to the package manufacturing processes, additional processes of aligning and adhering the thin PCB 10 to the carrier 20 should be performed. Also, after a semiconductor package is completed, a process of removing the adhesive 31 from the carrier 20 should be further performed to reuse the carrier 20.

SUMMARY OF THE INVENTION

The present invention provides a thin printed circuit board (PCB) that is inflexible during package manufacturing processes, despite its very small thickness.

According to an aspect of the present invention, there is provided a thin printed circuit board for manufacturing a chip scale package. The thin printed circuit board comprises a plurality of unit printed circuit boards which each adhere to a semiconductor chip, and a substrate surrounding the circuit pattern. Each unit printed circuit board comprises a circuit pattern. The unit printed boards are arranged in a row. The thin printed circuit board comprises a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.

The support molding may comprise epoxy molding compound or resin.

The support molding can be formed using a metal pattern.

One or more holes or slots can be vertically arranged at interfaces between adjacent unit printed circuit boards to prevent distortion of the thin printed circuit board.

According to another aspect of the present invention, there is provided a thin printed circuit board for manufacturing a chip scale package. The thin printed circuit board comprises a plurality of unit printed circuit boards, each of which comprises a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards may be arranged in a row. The thin printed circuit board comprises one or more slots, which are vertically arranged at interfaces between the unit printed circuit boards; and support moldings, which are spaced apart from the circuit patterns of the unit printed circuit boards above and below the interfaces between the unit printed circuit boards and formed perpendicular to the direction in which the slots are formed.

The support moldings can be formed of one of an epoxy molding compound and a resin.

The support moldings can be formed using a metal pattern.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:

FIGS. 1 through 3 are diagrams illustrating a conventional thin PCB;

FIG. 4 is a diagram illustrating a thin PCB according to an embodiment of the present invention; and

FIG. 5 is a diagram illustrating a thin PCB according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described more fully with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein.

FIG. 4 is a diagram illustrating a thin PCB according to an embodiment of the present invention.

Referring to FIG. 4, a thin PCB 400 of the present embodiment comprises a plurality of unit PCBs 400 a, 400 b, and 400 c, which are connected in a row. Although only three exemplary unit PCBs 400 a, 400 b, and 400 c are illustrated in FIG. 4, the thin PCB 400 can include a greater number of unit PCBs. Circuit patterns 410 a, 410 b, and 410 c are formed in the unit PCBs 400 a, 400 b, and 400 c, respectively. A plurality of holes (not shown) are formed in each of the circuit patterns 410 a, 410 b, and 410 c. A semiconductor chip is adhered to each of the circuit patterns 410 a, 410 b, and 410 c in a subsequent process, and a signal is transmitted from the semiconductor chip through the holes formed in the circuit pattern 410 a, 410 b, or 410 c out of the package. A plurality of holes or slots 420 are vertically arranged at interfaces between adjacent unit PCBs, for example, between the unit PCBs 410 a and 410 b or 410 b and 410 c. These holes or slots 420 suppress distortion of the thin PCB 400. A plurality of holes 430 are formed in an upper portion of the thin PCB 400, and a plurality of holes 440 are formed in a lower portion thereof. These holes 430 and 440 are used as recognition marks for a package manufacturing apparatus and may be used for alignment of the thin PCB 400 during thin PCB 400 transfer.

A support molding 450 is formed along the edge of the thin PCB 400. In the present embodiment the support molding 450 is formed of an epoxy molding compound (EMC) or a resin and formed using a metal pattern. The support molding 450 may be formed in a ring shape along the edge of the thin PCB 400 and spaced apart from the circuit patterns 410 a, 410 b, and 410 c. That is, the support molding 450 may not contact the circuit patterns 410 a, 410 b, and 410 c. The support molding 450 can support the circumference of the thin PCB 400. Thus, the thin PCB 400 can be inflexible during package manufacturing processes despite its very small thickness.

FIG. 5 is a diagram illustrating a thin PCB according to another embodiment of the present invention.

Referring to FIG. 5, the thin PCB 500 of the present embodiment comprises a plurality of unit PCBs 500 a, 500 b, and 500 c, which are connected in a row. Although only three exemplary unit PCBs 500 a, 500 b, and 500 c are illustrated in FIG. 5, the thin PCB 500 can include a greater number of unit PCBs. Circuit patterns 510 a, 510 b, and 510 c are formed in the unit PCBs 500 a, 500 b, and 500 c, respectively. A plurality of holes (not shown) are formed in each of the circuit patterns 510 a, 510 b, and 510 c. A semiconductor chip is adhered to each of the circuit patterns 510 a, 510 b, and 510 c in a subsequent process, and a signal is transmitted from the semiconductor chip through the holes formed in the circuit pattern 510 a, 510 b, or 510 c out of the package. A plurality of holes or slots 520 are vertically arranged at interfaces between adjacent unit PCBs, for example, between the unit PCBs 510 a and 510 b or 510 b and 510 c. These holes or slots 520 suppress distortion of the thin PCB 500. A plurality of holes 530 are formed in an upper portion of the thin PCB 500, and a plurality of holes 540 are formed in a lower portion thereof. These holes 530 and 540 are used as recognition marks for a package manufacturing apparatus and may be used for alignment of the thin PCB 500 during thin PCB 500 transfer.

In the thin PCB 500, portions where the slots 520 are formed are most vulnerable to external force and flexible. Thus, support moldings 551 and 552 may be formed above and below the interface between adjacent unit PCBs 500 a, 500 b, and 500 c, that is, above and below the portions where the slots 520 are formed. Although the slots 520 are formed vertically, the support moldings 551 and 552 may be formed horizontally, i.e., substantially perpendicular to the direction in which the slots 520 are arranged. As in the first embodiment, the support moldings 551 and 552 may not contact any of the circuit patterns 510 a, 510 b, and 510 c. In the present embodiment the support moldings 551 and 552 are formed of an EMC or a resin and can be formed using a metal pattern. In the present embodiment, the support moldings 551 and 552 can support the interfaces between the unit PCBs 500 a, 500 b, and 500 c, which are the most vulnerable portions of the thin PCB 500. Thus, the thin PCB 500 can be inflexible during package manufacturing processes despite its very small thickness.

As explained thus far, a thin PCB for manufacturing a chip scale package (CSP) according to the present invention comprises a support molding formed along the edge of the thin PCB or a plurality of support moldings formed above and below interfaces between unit PCBs, which are vulnerable to external force. Thus, the thin PCB can be inflexible during package manufacturing processes despite its very thin thickness. Accordingly, the manufacture of semiconductor packages can be simple without using an additional supporting portion.

While the present invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims. For example, the present invention is not limited to thin PCBs. Of course, other various thin substrates for CSPs, for example, polyimide tape substrates, can be used and include support moldings in the same manner as the thin PCBs.

Although the exemplary embodiments of the present invention have been described in detail, it should be understood that many variations and/or modifications of the basic inventive concepts herein taught, which may appear to those skilled in the art, will still fall within the spirit and scope of the present invention as defined in the appended claims.

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Reference
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Classifications
U.S. Classification361/777, 361/749, 174/254
International ClassificationH01L23/12, H01L23/13, H05K3/00, H05K1/02, H05K7/00
Cooperative ClassificationH05K2201/2009, H05K3/0052, H01L2924/0002, H05K3/0097, H01L23/13, H05K2201/09909, H05K2203/0169
European ClassificationH01L23/13, H05K3/00S
Legal Events
DateCodeEventDescription
Apr 30, 2013FPExpired due to failure to pay maintenance fee
Effective date: 20130310
Mar 10, 2013LAPSLapse for failure to pay maintenance fees
Oct 22, 2012REMIMaintenance fee reminder mailed