|Publication number||US7692996 B2|
|Application number||US 11/830,531|
|Publication date||Apr 6, 2010|
|Filing date||Jul 30, 2007|
|Priority date||Jul 30, 2007|
|Also published as||US8139434, US8395958, US8958260, US20090034354, US20100039097, US20120176847, US20130188430, WO2009018056A1|
|Publication number||11830531, 830531, US 7692996 B2, US 7692996B2, US-B2-7692996, US7692996 B2, US7692996B2|
|Inventors||David R. Resnick|
|Original Assignee||Micron Technology, Inc.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (10), Non-Patent Citations (1), Referenced by (3), Classifications (7), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
Embodiments of the present invention relate to voltage sensors and, particularly, in one or more embodiments, to determining and reporting various voltages on a semiconductor device, sensing and reporting methods, and systems including sensing and reporting capability.
Semiconductor devices, like most electronic products, are sensitive in their operation to supplied voltage levels. If voltage levels at working parts are lower than specified minimum requirements, the parts may malfunction. If voltage levels are higher than specified maximum requirements, the parts may malfunction and can also suffer catastrophic failure. In semiconductor memory devices, for example, such as Dynamic Random Access Memories (DRAMs), inadequate voltage levels may cause memory parts to malfunction by reading out or storing incorrect information. Such low voltage failures are often difficult to detect, and even when they are detected the resultant functional and data errors can seldom be recovered.
Often, the semiconductor device is still operational when the voltage levels become marginal causing the device to potentially fail in some aspect. For example, a memory device may not meet its full timing specifications at low voltages, resulting in a failure to read correct data. Even though the read data may be correct, the access time until correct data is available may be longer than designated by the device specification. Similarly, a low voltage level may result in the memory device's bit-cell capacitors not having enough time to fully change during a write cycle, even though they would work correctly if given additional time to complete the write cycle. In such a case, the bit-cells cannot be properly read and the data becomes corrupted.
There are many causes for unsuitable voltage levels to semiconductor devices, such as power supply errors and power distribution path effects. Power supply errors may result when the power supply is inadequate, misadjusted, or fails all together. Power distribution path effects influence voltage levels, for example through transient noise signals, inductance, and/or resistance in power distribution paths. As semiconductor device activity increases, these power distribution path effects often add together and further increase the chances of data and functional errors.
Historically, voltage sensors have been used to detect the voltage levels coming directly from the power supplies. However, these devices are limited to sensing voltage errors in he supply voltage. These systems are not capable of detecting whether voltage levels are unsuitable at specific locations (e.g., circuits) within the semiconductor device itself. Thus, these devices do not detect unsuitable voltage levels not caused by the voltage source itself, such as the distribution path effects described above.
In view of the shortcomings in the prior art, it would be advantageous to provide a semiconductor device capable of sensing and/or reporting voltage levels at operational circuits within the semiconductor device.
In the following detailed description, circuits and functions may be shown in block diagram form in order not to obscure the present invention in unnecessary detail. Additionally, block definitions and partitioning of logic between various blocks as depicted is non-limiting, and comprise examples of only specific implementations. It will be readily apparent to one of ordinary skill in the art that the present invention may be practiced in a variety of embodiments implementing numerous other partitioning solutions.
Also, it is noted that the embodiments may be described in terms of a process that is depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operational acts as a sequential process, many of these acts can be performed in another sequence, in parallel, or substantially concurrently. In addition, the order of the acts may be re-arranged. A process is terminated when its acts are completed. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination corresponds to a return of the function to the calling function or the main functions
The operating voltage (108A, 108B) may be a supply voltage 108A from an input pin or may be an operating voltage 108B generated internally on the semiconductor memory device 100. The operating voltage (108A, 108B) may be configured to supply a voltage to one or more operational circuits 140 of the semiconductor memory device 100. By way of example and not limitation, operational circuits 140 may include column decoder circuits, write driver circuits, data read and write multiplexers, DC sense amplifiers, etc. Although
Similar to the operating voltage (108A, 108B), the reference voltage (102A, 102B) may be a supply voltage 102A from an input pin to the semiconductor device, or the reference voltage may be a reference voltage 102B generated internally on the semiconductor memory device 100 in any manner known in the art. By way of example and not limitation, the internally generated reference voltage 102B may be generated from a simple resistor voltage divider, a voltage drop generated by a forward biased diode, a reverse-biased Zener diode, or a bandgap reference circuit. Since different circuits of the semiconductor device may require different voltage levels, there may be more than one reference voltage in semiconductor memory device 1X. The reference voltage, as known in the art, may be characterized as a substantially constant voltage within conventional tolerances. In some embodiments, the reference voltage may comprise a ground as opposed to an actual voltage level.
The at least one voltage sensor 110 may be configured to compare the different reference voltages with different operating voltages. As a non-limiting example, voltage sensor 110 may be set to compare a first reference voltage Vref with a first operating voltage Vdd. Voltage sensor 110 may further be set to compare a second voltage reference Vref2 with a second operating voltage Vddq. It will be apparent to one of ordinary skill in the art that it is possible to compare a plurality of reference voltages with a plurality of operating voltages according to numerous combinations, including the disposition of more than one voltage sensor 110 on the semiconductor memory device 100. In some embodiments, a single voltage sensor 110 may be operably connected to compare a plurality of operating voltages to one or more reference voltages as described below.
Further, a voltage sensor 110 may be configured to signal an alarm in the case where the operating voltage is outside of a range. As used herein, “range” signifies the magnitude of the voltage is beyond a predetermined threshold level, which may be an upper or lower level relative to an expected, or normal operating voltage, and is not to be read as requiring the device to necessarily have an operating range sensed between an upper and a lower threshold. In some embodiments, the voltage sensor 110 may be configured to signal an alarm when the operating voltage is above an upper threshold or below a lower threshold, as determined from comparison with the reference voltage. In other embodiments, the voltage sensor 110 may be configured to signal an alarm only when the voltage level is below a lower threshold, while having no upper limit In still other embodiments the voltage sensor 110 may be configured to signal an alarm only when the voltage level is above an upper threshold. Thus, use of the term “range” herein is not limited to embodiments requiring upper and lower thresholds.
If the operating voltage is above or below the relevant threshold, voltage sensor 110 may indicate the voltage failure by sending a flag such as alarm signal 112 to a pin on semiconductor memory device 100 for signaling the alarm externally. It is contemplated that voltage sensor 110 may be coupled to, and share a previously existing pin on semiconductor memory device 100, such as, for example, a boundary scan pin. One of ordinary skill in the art will recognize that any existing pin suitable for sharing may be used to communicate the voltage sensor output. Alternatively, a new pin may be provided on semiconductor memory device 100 with which voltage sensor 110 may be associated. As described above, there may be more than one voltage supplied within the semiconductor memory device 100. In this case a voltage sensor 110 may he provided for each supplied voltage, or, as described above, voltage sensor 110 may be configured to compare multiple reference voltages to multiple operating voltages. In the case where a voltage sensor 110 is provided for each voltage, the outputs for each of the voltage sensors may be connected to the same output pin through an optional output controller 114. By way of non-limiting example, output controller 114 may be configured as one or more logic “OR” gates, or as a multiplexer.
As stated, the pin on semiconductor memory device 100 for carrying the alarm signal 112 externally may be configured as a boundary scan output pin or other internal scan output pin. When not configured for performing a scan function, the scan output pin may be configured to carry the output from the output controller 114 (if present) or directly carry the alarm signal 112. For example, the pin can serve to carry the alarm signal 112 externally during normal operation, when scan functions or other similar functions are not being cared out. When placed into a maintenance or scan mode, the pin may be configured to carry out such other function or functions instead of carrying the alas signal 112.
The output pin may be operably coupled to any suitable external component, which may also be characterized as an external module. By way of example and not limitation, the output pin may be operably coupled to a memory controller, to receive the alarm signal 112 from the at least one voltage sensor 110. Upon receiving the alarm signal 112, the memory controller may be configured to adjust an operating parameter for the semiconductor memory device 100. As a non-limiting example, the memory controller may adjust the timing, and/or the power voltage levels for the semiconductor memory device 100. Adjusting the timing may allow more time to complete operations of the semiconductor memory device 100. For example, the adjustment may provide semiconductor memory device 100 with more time to complete reading and writing operations.
In another embodiment, and as a non-limiting example, the output pin of the semiconductor memory device 100 may be operably coupled to a maintenance system. The maintenance system may be configured to adjust an operating parameter for the semiconductor memory device 100 upon receiving the alarm signal 112. In still another embodiment, the output pin may be operably coupled to both a maintenance system and a memory controller.
With further reference to
One of ordinary skill in the art will recognize that multiple mode registers may be used instead of just one, as described above, in appropriate situations. As a non-limiting example, a different mode register may be used to control each of a plurality of voltage sensors 110 on the semiconductor memory device 100. In addition, another mode register may be used to select which voltage sensor 110 is communicating through the alarm signal 112. The additional mode register may select a voltage sensor directly to communicate through the alarm signal 112, or the mode register may select which voltage sensor may communicate by controlling output controller 114. In addition, if the alarm signal 112 is configured on a scan output pin, the mode register 120 may control whether the scan output pin is configured to carry the alarm signal 1I 2, or conventional scan output signals.
As described above, in some embodiments a single voltage sensor 110 may be operably connected to compare a plurality of operating voltages to one or more reference voltages. In these embodiments, a multiplexer 150 (shown in broken lines in
Additionally, one of ordinary skill in the art will recognize that embodiments of the present invention may be configured without a mode register. As a non-limiting example, a voltage sensor 110 may be configured to compare a single operating voltage (108A or 108B) with a single reference voltage (102A or 102B) and to generate alarm signal 112 in the case the voltage difference is greater than a preset level.
As described above, the output pin may be operably coupled to any suitable external component, which may also be described as an external module, such as a memory controller, a maintenance system, etc. In embodiments similar to that illustrated in
In some embodiments, as described above, mode register 120 may be operably coupled and configured to control output register 130. Similar to
As shown in
Furthermore, embodiments of the present invention can be implemented in types of semiconductor devices other than memories. By way of non-limiting example, embodiments of the present invention may be implemented in microprocessors, microcontrollers, system-on-a-chip, and image sensors. As a non-limiting example, in a microprocessor or microcontroller, clock speed, execution unit operation, and memory access times may be adjusted responsive to results from the voltage sensor 110 (
One of ordinary skill in the art will recognize that when implemented in semiconductor devices other than memories, the mode register(s) used to control the voltage sensor 110, output controller 114, and output register(s) 130 would be written to using command appropriate for the semiconductor device rather than conventional memory commands that may be used in a DRAM or flash memory device.
In other embodiments, a numeric value indicative of the operating voltage may be generated at 550. The numeric value may then be stored for later retrieval at 560, and the stored numeric value may be retrieved and read by another device at 570. By way of example, and not limitation, the numeric value may be stored in an output register, and retrieved by a control module. Those of ordinary skill in the art will recognize that the numeric value may be stored in any suitable register or memory location. Additionally, the alarm, the numeric value, or both, may be made available to any external module determined by the designer to be suitable. By way of example and not limitation, the alarm, the numeric value, or both, may be made available to at least one of a memory controller and a maintenance system. Adjustments may be made to one or more operational parameters on the semiconductor memory device to compensate for the power issues based on at least one of the alarm signal and the numeric value at 580.
In one embodiment of the present invention a semiconductor device may employ at least one reference voltage. At least one operating voltage may be employed, associated with at least one circuit of the semiconductor device. At least one voltage sensor is configured to compare the at least one reference voltage and the at least one operating voltage. The voltage sensor may, optionally, be configured to generate an alarm signal if a difference between the operating voltage and the reference voltage is greater than a predetermined amount.
In another embodiment of the invention, a memory card comprising a plurality of memory devices is provided. At least one of the memory devices is configured with at least one voltage sensor as described above.
Another embodiment of the invention comprises an electronic system. The electronic system may include at least one input device, at least one output device, a processor, and at least one memory device configured with at least one voltage sensor as described above
An embodiment of a method for sensing and reporting a voltage in a semiconductor device is also provided, the method including comparing an operating voltage to a reference voltage and determining whether the operating voltage is outside a predetermined voltage range. The method may further include generating an alarm signal when the operating voltage is outside the predetermined voltage range.
While certain embodiments have been described and shown in the accompanying drawings, such embodiments are merely illustrative and not restrictive of the scope of the invention, and this invention is not limited to the specific constructions ad arrangements shown and described, since various other additions and modifications to, and deletions from, the described embodiments will be apparent to one of ordinary skill in the an. Thus, the scope of the invention is only limited by the literal language, and equivalents, of the claims which follow.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8395958 *||Mar 20, 2012||Mar 12, 2013||Micron Technology, Inc.||Methods and apparatus for voltage sensing and reporting|
|US8958260||Mar 12, 2013||Feb 17, 2015||Micron Technology, Inc.||Systems and methods for voltage sensing and reporting|
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|U.S. Classification||365/226, 365/189.07|
|Cooperative Classification||G01R19/16552, G11C5/147, G11C5/14|
|Jul 30, 2007||AS||Assignment|
Owner name: MICRON TECHNOLOGY, INC.,IDAHO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:RESNICK, DAVID R.;REEL/FRAME:019621/0966
Effective date: 20070719
|Jun 8, 2010||CC||Certificate of correction|
|Sep 4, 2013||FPAY||Fee payment|
Year of fee payment: 4