|Publication number||US7750442 B2|
|Application number||US 11/064,762|
|Publication date||Jul 6, 2010|
|Filing date||Feb 23, 2005|
|Priority date||Aug 23, 2002|
|Also published as||DE10238798B3, US20050242412, WO2004019416A1|
|Publication number||064762, 11064762, US 7750442 B2, US 7750442B2, US-B2-7750442, US7750442 B2, US7750442B2|
|Original Assignee||Infineon Technologies Ag|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (19), Classifications (14), Legal Events (2)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application is a continuation of copending International Application No. PCT/EP03/06791, filed Jun. 26, 2003, which designated the United States and was not published in English, and is incorporated herein by reference in its entirety.
1. Field of the Invention
The present invention relates to a high-frequency switch.
2. Description of Prior Art
PIN diodes are frequently employed as switches for high frequencies in the GHz range.
PIN diodes are semiconductor diodes containing a pin junction as a basic structure, which basically determines the electronical characteristics of this element.
The pin junction differs from a pn junction of a conventional semiconductor diode in particular by an intrinsic (i) layer between the p and n regions (highly doped regions p+ and n+). In the flow direction, this i layer is flooded by the two adjacent highly doped regions with holes and electrons, the result being an intense recombination in the center layer. The result is a very low forward resistance and the characteristic curve does not differ significantly from that of the pn junction. In the reverse direction, however, the entire I zone is depleted of charge carriers and the result is, compared to the pn junction, a considerably broader depletion layer and consequently a higher breakdown voltage up to several 1000 volts. A second effect of the i layer is the decrease in the depletion layer capacitance.
Due to these characteristics PIN diodes are frequently used as rectifier diodes for very high reverse voltages. Another field of application as a fast switch in the microwave range results from the low, mostly voltage-independent capacitance and the high ratio of forward resistance to reverse resistance. This is the basis for applications as microwave rectifiers, switches and as current-controllable resistors, for example for regulating HF tuners.
In particular, the attenuation in the flow operation determined by the resistance of the intrinsic zone, and the insulation depending on the depletion layer capacitance in the reverse direction are quality characteristics of the PIN diode. Intermodulation as a consequence of non-linearities is another quality characteristic.
A considerable disadvantage of the PIN diode is the considerable current flow in the forward direction. The result is that the PIN diode cannot be switched without power. The current in the forward direction is determined by injection and recombination of minority charge carriers at the highly doped p and n regions. This injection and recombination, apart from the dopant concentration of the p and n regions, particularly depends on the area thereof. This area in turn is determined by requirements as regards capacitance and series resistance.
It is another disadvantage of the PIN diode that the high-frequency (HF) path and the direct current (DC) path in the element are not separate. Further elements are consequently necessary in applications as a high-frequency switch. In particular, these elements are coupling capacitors and coils which can be realized discretely or in the form of lines.
In addition, the high-frequency signal at the PIN diode causes a small injection, following the high frequency, of charge carriers into the i zone. The resulting non-linearity determines the intermodulation performance of the diode in a negative way.
It is the object of the present invention to provide a high-frequency switch comprising the characteristics of a PIN diode as regards transmission loss and insulation but reduces the disadvantages of a PIN diode mentioned above.
In accordance with a first aspect, the present invention provides a high-frequency switch having: a semiconductor body made of a semiconductor material having a first surface and a second surface; two direct current terminals; and two high-frequency terminals.
In the high-frequency range (≧1 GHz), the inventive high-frequency switch combines the positive characteristics of low transmission loss and high insulation in the reverse direction by the following positive characteristics:
small current in the forward direction (with constant high-frequency resistance or constant insertion loss),
galvanic separation of HF path and DC path, wherein at least coupling capacitors can be omitted here,
better intermodulation performance due to smaller non-linearities.
An advantageous development of the inventive assembly provides for the semiconductor material to have a resistivity of greater than 100 ohm/cm. Consequently, the semiconductor material can serve as the i zone for a PIN diode.
Another advantageous development of the inventive assembly is for the semiconductor material to be intrinsic. Thus, the semiconductor material, without additional treatment, serves as the i zone of a PIN diode.
An alternative embodiment of the inventive assembly provides for the semiconductor body to be an epitaxy layer. A particularly perfect semiconductor material is provided by this.
Typically, the epitaxy layer has a doping of 1×1012 cm−3 to 1×1014 cm−3. Thus, the charge carrier concentration is very low and the epitaxy layer can be used as the i zone for a PIN diode.
In a particularly advantageous embodiment of the inventive assembly, the semiconductor body is deposited on a carrier plate. The result is a reduction in power losses.
An advantageous development of the inventive assembly is for an oxide to be applied onto the second surface of the semiconductor body. The oxide having a small interface state density has the effect that the recombination at the edge of the i zone of a PIN diode is kept small. Thus, the generation of an undesired current is avoided.
Another advantageous embodiment of the inventive assembly is for the two direct current terminals to be formed at the first surface of the semiconductor body. This entails advantages as far as manufacturing is concerned and the high-frequency switch is suitable for flip-flop mounting.
In an alternative design of the inventive assembly, a direct current terminal is a doped p region and the other direct current terminal is a doped n region. The result is a desired diode.
Typically, the two direct current terminals have a doping of 1×1018 cm−3, which, due to the high charge carrier concentration, provides for a good operating performance of the diode.
A particularly preferred development of the inventive assembly can be obtained when the two direct current terminals, with the semiconductor body, form a PIN diode. The conductivity of the intrinsic region to below the high-frequency switch is controlled with this PIN diode by injecting charge carriers. This is possible due to the very great diffusion length. As a result of the low doping and the low edge recombination, the diffusion length is in the order of magnitude of millimeters.
Another advantageous embodiment of the inventive assembly provides for the two high-frequency terminals to be formed at the first surface of the semiconductor body. This brings advantages as far as manufacturing is concerned and the device is suitable for flip-flop mounting.
A preferred design of the inventive assembly is for the two high-frequency terminals each to include:
the semiconductor body,
a dielectric on the semiconductor body, and
a contact layer.
Thus, the high-frequency capacitance is coupled with the device and results in the desired galvanic separation of the HF path and the DC path.
Another design of the inventive assembly is for the dielectric to be an oxide. This can be realized particularly easily as far as manufacturing is concerned.
An alternative design of the inventive assembly is for the dielectric to be a dielectric stack. The result is that possible short circuits through the dielectric can be ruled out.
Another preferred development of the inventive assembly is for the dielectric stack to be formed of oxide and nitride. Thus, the requirements to the dielectric as regards the capacitance of the high-frequency terminal can be fulfilled to the extent desired. At the same time, a dielectric stack of oxide and nitride can be realized, as far as manufacturing is concerned, with conventional technology processes.
Typically, the contact layer of the inventive assembly is made of a metal. Particularly good high-frequency characteristics can be achieved by this.
In another preferred embodiment of the inventive assembly, the high-frequency switch is confined laterally by a trench. Thus, the high-frequency switch is electrically insulated from the neighboring regions.
The trench is typically filled with oxide. The recombination at the edge of the I zone is kept small by the low interface state density of the oxide. Thus, the generation of an undesired current can be avoided.
An advantageous development of the inventive assembly provides for the first surface, except for the areas of the direct current terminals and except for the areas of the high-frequency terminals, to be covered by an oxide layer. The oxide having a low interface state density has the effect that the recombination at the edge of the i zone of a PIN diode is kept small. The generation of an undesired current can thus be avoided.
Preferred embodiments will be detailed subsequently referring to the appended drawings, in which:
The planar vertical PIN diode illustrated in
A lightly doped epitaxy layer 2 is grown onto the substrate 1. An Au/AuAs contact layer 3 is formed on the back side of the substrate 1.
A highly doped p region 4 is introduced into the epitaxy layer 2. The p region 4 abuts on the surface of the epitaxy layer. Additionally, two highly doped n regions 5 a and 5 b are introduced into the epitaxy layer 2 on both sides of the p region 4. The n regions 5 a and 5 b also abut on the surface of the epitaxy layer 2. An oxide layer 6 is structured on the surface of the epitaxy layer 2 such that it covers the distance between the n region 5 a and the p region 4 and the n region 5 b and the p region 4, respectively. The n regions 5 a and 5 b and parts of the p region 4 are partly covered by this oxide layer.
The surface of the structured oxide layer 6 is covered by a plasma nitride layer 7. This plasma nitride layer 7 also covers a part of the p region 4 and the n regions 5 a and 5 b.
The remaining uncovered part of the p region 4 is contacted by a metal layer 8. The metal layer 8 also extends over a part of the surface of the plasma nitride layer 7.
The usage of a conventional PIN diode 10 for an HF switch is illustrated in
The preferred embodiment of the inventive HF switch illustrated in
A highly doped p region 25 and a highly doped n region 26 are introduced into the semiconductor body 21 on the first surface 24 of the semiconductor body 21. Typically, the dopant concentration of the p region and of the n region is about 1×1018 cm−3.
Oxide 27 is deposited on the first surface of the semiconductor body 21. This oxide 27 is patterned such that the first surface 24 is exposed at four positions. One respective opening of the oxide 27 is above the p region 25 and above the n region 26. The exposed surface 24 of the p region and of the n region is contacted by means of a metal 28. The metal 28 extends over a part of the oxide 27. The p region 25 and the n region 26, together with the metal contacting, each form a direct current terminal 29.
The two remaining exposed positions of the surface 24 are covered by a dielectric 30. A metal contact layer 31 is arranged above the dielectric 30 and a part of the oxide layer 24.
The semiconductor body, 21, the dielectric 30 and the metal contact layer 31 together form a high-frequency terminal 33.
Two trenches 32 laterally confining the HF switch extend from the surface 24 to the oxide layer 22. These two trenches 32 are filled with oxide.
The injection of charge carriers from the highly doped p region and the n region to the region below the high-frequency terminals is indicated in
If the PIN diode is operated in the forward direction, a simple equivalent circuit diagram, as is shown in
The reactance of the capacities should be as small as possible with a predetermined operating frequency. Subsequently, the reactance of a typical embodiment of the inventive high-frequency switch will be estimated. In modern CMOS technologies, a dielectric stack with a thickness of 5 nm and a medium dielectric constant ∈=4 can be manufactured. With an operating frequency of 5 GHz, the reactance of the capacitance will be −i×2876 ohm/μm2. This, with a typically PIN diode area of 100×100 μm2, results in a value of −i×0.28 ohm. With a corresponding dimensioning of the contact areas, this value is small compared to the series resistance of the i zone and can be compensated in the application by means of a corresponding inductivity.
If the PIN diode is operated in the reverse direction, the equivalent circuit diagram for an inventive HF switch, as is shown in
A possible design of the contact areas of the direct current terminals 29 and of the high-frequency terminals 33 is illustrated in
While this invention has been described in terms of several preferred embodiments, there are alterations, permutations, and equivalents which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and compositions of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.
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|U.S. Classification||257/656, 257/625, 257/E29.336, 257/482, 257/601, 257/367, 257/594|
|International Classification||H01L29/868, H01L29/417, H01L27/15|
|Cooperative Classification||H01L29/417, H01L29/868|
|European Classification||H01L29/868, H01L29/417|
|Jul 18, 2005||AS||Assignment|
|Jan 3, 2014||FPAY||Fee payment|
Year of fee payment: 4