|Publication number||US7772022 B2|
|Application number||US 11/916,348|
|Publication date||Aug 10, 2010|
|Filing date||Jun 5, 2006|
|Priority date||Jun 3, 2005|
|Also published as||CN100573211C, CN101189541A, DE602006013619D1, EP1886175A1, EP1886175B1, US20080311693, WO2006129123A1, WO2006129123A8|
|Publication number||11916348, 916348, PCT/2006/2056, PCT/GB/2006/002056, PCT/GB/2006/02056, PCT/GB/6/002056, PCT/GB/6/02056, PCT/GB2006/002056, PCT/GB2006/02056, PCT/GB2006002056, PCT/GB200602056, PCT/GB6/002056, PCT/GB6/02056, PCT/GB6002056, PCT/GB602056, US 7772022 B2, US 7772022B2, US-B2-7772022, US7772022 B2, US7772022B2|
|Inventors||Graeme Douglas Maxwell, Philip Richard Townley, Robert Campbell McDougall|
|Original Assignee||The Centre For Integrated Photonics Limited|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (10), Non-Patent Citations (2), Classifications (16), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application is a national phase of International Application No. PCT/GB2006/002056 filed Jun. 5, 2006 and published in the English language.
This invention relates to a method of fabricating a photonic device including at least one waveguide, and in particular to a method of aligning optical components with waveguides.
There are approaches used for passive hybrid assembly of semiconductor optical components with planar waveguides, such as that used by Blauvelt in U.S. patent application US2004/0052467 that uses evanescent (vertical in this case) coupling to an underlying passive waveguide wafer. This approach is limited to vertical evanescent coupling of components and precludes the straightforward integration of non-waveguiding components such as free space optical isolators and thin film filters. In addition, the alignment technique means that the cladding layer of the waveguide wafer has to be both very thin to enable the evanescent coupling to take place and substantially flat.
An alternative is that disclosed by Maxwell in U.S. Pat. No. 6,778,718 relating to the hybrid integration of active semiconductor components, whereby the top of a planar surface of a waveguide cladding provides the vertical alignment reference frame and mechanical end stops are used to provide lateral positioning. Light is end-fire coupled into the waveguide device through a hole manufactured into the waveguide layer. This approach again talks of a planar surface for the alignment.
In reality, however, the top surface of a cladding over waveguides may not always be planar and in some situations the cladding surface of the waveguide device may have undulations or bumps above the regions which define the waveguide core.
Fasham in GB-A-2,379,995 used an active alignment approach for hybrid integration and there is a view expressed in the documents by Fasham and Blauvelt which maintains that a passive approach for vertical positioning of additional devices placed on a non-planar surface is not possible without additional processing steps to planarise the surface. These undulations would have to be removed through a process such as chemical-mechanical polishing (CMP) to provide a planar surface for alignment, or some level of active alignment would have to be undertaken to compensate for the non-planar surface. In addition, using a planar surface as described by Maxwell and Blauvelt, increases the susceptibility of the alignment process to contamination from dust or dirt on the cladding surface which can compromise the alignment accuracy. In both cases mentioned, the vertical reference frame for alignment is the planar surface of the cladding of the waveguide device, and in both cases, there are limitations associated with the requirements for a planar surface.
The present invention, at least in preferred embodiments, seeks to enable passive alignment techniques to be adopted without the need to planarise the surface of the waveguide.
Accordingly, this invention provides a method of fabricating a photonic device including at least one waveguide. The method comprising the steps of providing a core pattern of waveguide core material on a base layer, and applying a cladding layer over the core material and the base layer. The height of the surface of the cladding layer over the base layer varies in dependence on the pattern of core material. The core pattern is designed with at least two reference regions, each having a width that is selected to provide a peak of the cladding layer with a predetermined height over each reference region. The core pattern is further designed such that a line between the peaks of the reference regions is higher than any intervening peaks of the cladding layer, whereby the peaks of the reference regions provide a vertical alignment reference.
The approach of the invention allows the surface of a cladding layer containing bumps to be used as a vertical reference frame for passive alignment of additional optical components without the need for processing steps to planarise the surface or the requirement for active alignment or the need for thin cladding layers. The invention enables optical and optoelectronic devices of various types to be integrated onto an optical circuit board and finds application in components and systems required for telecommunications, sensing, computing, instrumentation and lab-on-a-chip.
The peaks of the reference regions may have the same predetermined height over the base layer. In this way, the line between the peaks is parallel to the base layer. The widths of the reference regions may be the same. In general, this will result in reference regions of the same height.
The method may further comprise the step of positioning a mounting device, such as a submount, in contact with the peaks of both reference regions to locate a component vertically with respect to the waveguide core. Thus, an optical component being integrated into a waveguide may be housed on a separate submount designed to be integrated in the vertical direction through the use of vertical positioning on bumps. The bumps may be placed in an appropriate pattern around the site for hybrid integration to eliminate any tilt in a submount placed on top.
Lateral alignment may be provided by patterning physical upstands (projections) on the surface of the cladding which act as mechanical end stops for submounts or components that have precisely defined edges defined through processes such as etching, dicing, cleaving or machining.
A hole may be made in the waveguide substrate which allows the insertion of the component to be integrated in the waveguide, as in U.S. Pat. No. 6,778,718. End-fire coupling may be used between the waveguide and the inserted optical component. This end-fire coupling approach allows the integration of different optical components that may use free space propagation such as isolators and thin film filters which the Blauvelt approach does not, as well as active components such as semiconductor lasers, semiconductor optical amplifiers or passive planar waveguides made using a different material system.
Furthermore, because of the passive assembly, this approach allows the integration of multiple elements in a serial fashion on a common waveguide wafer, providing the optical equivalent of an electrical printed circuit board. Using that analogy, the planar waveguide forms the optical equivalent of the electrical circuit on the circuit board, and different optical components are integrated depending on their function, made using a material system appropriate to that function.
The process disclosed for defining the vertical alignment reference position depends upon the controlled and repeatable fabrication of bumps of a specific height in the surface of the cladding which act as pillars to support the vertical positioning of additional components placed thereon. These bumps are fabricated by patterning large blocks in the core layer of the waveguide. The width of the block determines the height of the cladding bump above it. The width of the block that is used also has to take into consideration both the waveguide dimensions used for guiding the optical signal and waveguide pattern (density) in the circuit in proximity to the area where the hybrid integration is to take place. The blocks should also be positioned so as not to affect the optical properties of the waveguide.
Thus, the invention, at least in the preferred embodiments, provides a technique which allows the surface of a cladding layer containing bumps to be used as a vertical reference frame for passive alignment that does not require post cladding planarisation techniques. Furthermore, the sensitivity of placement of a hybrid optical component to dust and other contamination on the waveguide surface is reduced by using a controlled non-planar surface.
The waveguide may be fabricated using silica based materials.
The invention extends to a waveguide core pattern adapted for use in the method described.
An embodiment of the invention will now be described by way of example only and with reference to the accompanying drawings, in which:
Square (or rectangular) waveguide cross sections are common in planar waveguide devices, where the core cross section can have linear dimensions of the order of a few to several microns in each direction for single mode operation.
A uniform thickness of cladding layer 2 is deposited on top of the waveguide core 1 (using one of a number of possible deposition techniques). The cladding layer 2 is substantially planar in regions that do not contain a core pattern, where the cladding 2 is deposited directly on the buffer layer 3. However, the cladding layer 2 is typically curved and raised above the planar level by a few microns in the areas that contain the waveguide core 1. Thus, above the waveguide core 1, the cladding layer 2 forms a “bump”. This is considered to be a problem (see for example Blauvelt or Fasham) when one wishes to use the surface of the cladding layer 2 as a vertical reference frame for alignment of additional components with the required micron scale accuracy.
As shown in
As shown in
In deciding the width of positioning block to use, one must also take into consideration the density of waveguides in the vicinity. As the density of waveguides increases and the gap between the waveguides reduces, the height of the cladding bump begins to resemble that of a single block with a width comparable to the summation of the individual waveguides. This is shown in
The horizontal lines on the graph in
In summary, a method of fabricating a photonic device comprises the steps of providing a core pattern of waveguide core material 1 on a base layer 3 and applying a cladding layer 2 over the core material 1 and the base layer 3. The height of the surface of the cladding layer 2 over the base layer 3 varies in dependence on the pattern of core material 1. The core pattern is designed with at least two reference regions, each having a width w that is selected to provide a peak of the cladding layer 2 with a predetermined height h1 over each reference region. The core pattern is further designed such that a line between the peaks of the reference regions is higher than any intervening peaks of the cladding layer, whereby the peaks of the reference regions provide a vertical alignment reference.
Although this invention has been described in the context of waveguide core material and a cladding layer, the same principle may be applied to any two suitable layers, without departing from the scope of the invention.
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|1||International Search Report for corresponding application No. PCT/GB2006/000357 completed Sep. 18, 2006.|
|2||Maeda et al., "Photonic integrated Circuit Combining Two GaAs Distributed Bragg Reflector Laser Diodes for Generation of the Beat Signal", Dec. 6 1991, 3 pages.|
|U.S. Classification||438/31, 438/29, 257/E21.705|
|International Classification||G02B6/13, G02B6/30, H01L21/00, G02B6/42, G02B6/122|
|Cooperative Classification||G02B6/423, G02B6/30, G02B6/13, G02B6/122|
|European Classification||G02B6/42C5P2, G02B6/30, G02B6/13, G02B6/122|
|Jul 14, 2008||AS||Assignment|
Owner name: THE CENTRE FOR INTEGRATED PHOTONICS LIMITED, UNITE
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MAXWELL, GRAEME DOUGLAS;TOWNLEY, PHILIP RICHARD;MCDOUGALL, ROBERT CAMPBELL;REEL/FRAME:021234/0378;SIGNING DATES FROM 20071217 TO 20071227
Owner name: THE CENTRE FOR INTEGRATED PHOTONICS LIMITED, UNITE
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MAXWELL, GRAEME DOUGLAS;TOWNLEY, PHILIP RICHARD;MCDOUGALL, ROBERT CAMPBELL;SIGNING DATES FROM 20071217 TO 20071227;REEL/FRAME:021234/0378
|Jun 18, 2012||AS||Assignment|
Owner name: HUAWEI TECHNOLOGIES CO., LTD., CHINA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:THE CENTRE FOR INTEGRATED PHOTONICS LIMITED;REEL/FRAME:028396/0973
Effective date: 20120607
|Jan 15, 2014||FPAY||Fee payment|
Year of fee payment: 4