|Publication number||US7772922 B1|
|Application number||US 12/425,058|
|Publication date||Aug 10, 2010|
|Filing date||Apr 16, 2009|
|Priority date||Apr 16, 2009|
|Also published as||CN102362189A, CN102362189B, WO2010120478A2, WO2010120478A3|
|Publication number||12425058, 425058, US 7772922 B1, US 7772922B1, US-B1-7772922, US7772922 B1, US7772922B1|
|Inventors||Christian Volf Olgaard, Wassim El-Hassan, Carsten Andersen|
|Original Assignee||Litepoint Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (4), Referenced by (2), Classifications (5), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
The present invention relates to methods and systems for testing data signal amplifiers, and in particular, to testing data signal amplifiers capable of multiple output signal power levels for minimizing power consumption.
2. Related Art
The current generation (3G) of cellular telephones offer, among other things, faster connection speeds to the internet. These higher connection speeds are achieved by more complex modulation and stricter requirements for accurate signal power levels. At the same time, since such devices are usually powered by batteries, these devices also need to minimize their power consumption.
Accordingly, to meet these conflicting requirements of high performance while consuming the lowest possible amount of power, these devices use many techniques to minimize power consumption, including minimizing current consumption in the radio frequency (RF) circuitry. Examples include dynamically changing bias current in the output power amplifier such that the bias current scales (e.g., higher or lower) in accordance with the transmitted signal power. Alternatively, or in some instances in addition, the power supply voltage to the output power amplifier can be controlled using a switching DC-DC converter to reduce the power supply voltage when transmitting at lower output signal power levels. While these techniques do help improve battery life, they also make device behavior more difficult to calibrate, since multiple power control parameters are changing as the output transmitted signal power changes. Accordingly, a more complex calibration technique is required.
Such calibration, which is done during performance testing of the device following its manufacture, has either been an iterative process or based on simple assumptions of the behavior of the device under test (DUT). The former technique will provide for more thorough testing and calibration, but at the cost of test speed, while the latter will often provide reasonable test results, but not optimal, since the test results, based on assumptions, may not be sufficiently accurate in view of the strict performance requirements.
A common test technique is to perform calibration in two or more steps. One step might be varying the power of the outgoing signal 11 a provided to the amplifier 10, while maintaining fixed power supply voltage and bias current. A second step could be varying the power supply voltage while maintaining fixed input signal power and bias current. A third step can then be varying the bias current while maintaining fixed input signal power and power supply voltage. As a result, amplifier performance has been characterized with respect to two or three control parameters, from which expected performance can be inferred or extrapolated, based on the observed relationships between signal power, power supply voltage and bias current. However, such expected future performance is based on one test parameter with influences based on power supply voltage or bias current assumed to be consistent from one device to another.
While this may yield acceptable results for many devices, with increasingly strict performance requirements, it is unlikely that sufficiently low failure rates during actual operations can be achieved, since the characterized performance does not accurately model actual performance.
For example, maintaining constant bias current while varying the power of the amplifier input signal 11 a, the operating temperature of the amplifier 10 may be higher than that to be expected during actual operation, since the bias setting will likely be higher than that used when battery power conservation measures are being followed. While it is possible to model the expected amplifier temperature, there will nonetheless be variations among devices. Further, since the power variances are applied quickly during testing, the internal temperature of the amplifier 10 may vary during these variances, while the system temperature measured at a different location within the device will not be affected significantly due to the fast testing. Accordingly, the testing operation will not accurately simulate normal operation.
In accordance with the presently claimed invention, a method and apparatus are provided for testing a data signal amplifier having an output signal power dependent upon multiple signal power control parameters, e.g., signal gain control and amplifier bias current control.
In accordance with one embodiment of the presently claimed invention, a method for testing a data signal amplifier having an output signal power dependent upon a plurality of signal power control parameters includes:
providing a first control signal corresponding to a first control parameter and having a first one of a first plurality of values;
providing a second control signal corresponding to a second control parameter and having a first sequential subset of a second plurality of values;
providing, to an amplifier, a power supply voltage and a bias current with at least one of which having a magnitude related to one of the first and second control signals;
providing, to the amplifier, an input data signal having a plurality of sequential magnitudes related to another of the first and second control signals;
providing, with the amplifier, an output data signal having a plurality of sequential magnitudes related to the one of the first and second control signals and the input data signal; and
measuring each one of the plurality of sequential output data signal magnitudes, followed by
In accordance with another embodiment of the presently claimed invention, a system for testing a data signal amplifier having an output signal power dependent upon a plurality of signal power control parameters includes:
controller means for controlling
receiver means for
The following detailed description is of example embodiments of the presently claimed invention with references to the accompanying drawings. Such description is intended to be illustrative and not limiting with respect to the scope of the present invention. Such embodiments are described in sufficient detail to enable one of ordinary skill in the art to practice the subject invention, and it will be understood that other embodiments may be practiced with some variations without departing from the spirit or scope of the subject invention.
Throughout the present disclosure, absent a clear indication to the contrary from the context, it will be understood that individual circuit elements as described may be singular or plural in number. For example, the terms “circuit” and “circuitry” may include either a single component or a plurality of components, which are either active and/or passive and are connected or otherwise coupled together (e.g., as one or more integrated circuit chips) to provide the described function. Additionally, the term “signal” may refer to one or more currents, one or more voltages, or a data signal. Within the drawings, like or related elements will have like or related alpha, numeric or alphanumeric designators. Further, while the present invention has been discussed in the context of implementations using discrete electronic circuitry (preferably in the form of one or more integrated circuit chips), the functions of any part of such circuitry may alternatively be implemented using one or more appropriately programmed processors, depending upon the signal frequencies or data rates to be processed.
The baseband circuitry 202 includes a transmit signal generator to provide the transmit data signal 203 t, e.g., in the form of quadrature signals 203 i, 203 q. Also included is RF power control circuitry to provide voltage gain control (VGC) data for the RF circuitry 206. The VGC data are stored in a register 202 a, with selected data 203 a converted by the VGC DAC 204 to provide an analog control signal 205 for controlling the power levels of the transmit data signals provided as the input signals 207 to the power amplifiers 210. The baseband circuitry 202 also includes power amplifier bias control circuitry to provide bias control data. These bias control data are stored in a bias register 202 b, with the selected bias control data 203 b converted by the bias DAC 208 to provide an analog bias control signal 209 for the power amplifiers 210.
The RF circuitry 206 typically includes frequency synthesis circuitry, filters and mixers for frequency up-conversion of the transmit data signal 203 t, and amplifier circuitry controlled by the VGC signal 205 to provide the transmit data signals 207 to the power amplifiers 210.
The respective transmit data signals 207 a, 207 b, . . . , 207 n are provided to corresponding respective power amplifiers 210 a, 210 b, . . . , 210 n, with each signal 207 and amplifier 210 operating within a different predetermined frequency range. The resulting amplified signals 211 are conveyed to the antenna 214 for transmission 215 via the signal combiner or router 212 in accordance with well known principles.
The control/interface circuitry 104 communicates with the baseband circuitry 202 and RF circuitry 206 via one or more control or interface signals 105 a, 105 b, e.g., to control access to and selection of the stored VGC 202 a and bias 202 b control data during testing. The receiver 106 receives the transmit signal 213 during testing. The computer 102, via one or more control and data signals 103 a communicates with and controls the control/interface circuitry 104. The computer 102, via one or more additional control and data signals 103 b, controls the receiver 106 and accesses transmitter data as received via the output transmit signal 213. The receiver 106 also includes circuitry for measuring power levels of the transmit signal 213, with the resulting power level data being made available for analysis by the computer 102.
As shown in the Figure, each column includes a “center” value, which is the VGC control register value corresponding to the target power (dBm) for that column, with each register control data value being variable up or down by one or more values of Δ (with Δ being configurable as desired in terms of DAC settings per dB), with lower “i” and higher “j” limits (also configurable as desired). These variables (“center”, Δ, “i”, “j”) will have different values from one column to another.
In accordance with one embodiment of the presently claimed invention, the VGC control data 202 a is accessed and selected in subsets, or sub-ranges, with each subset of VGC control data being used with one specific bias control level. For example, at a bias control setting of 32, the VGC control data can be swept through a range of values from 10 through 50 in steps of 10, followed by resetting the bias control data to a value of 52 and sweeping the VGC control data from 40 through 80 in steps of 10, followed by resetting the bias control data to 72 and sweeping the VGC control data from 70 through 120, followed by resetting the bias control data to 82 and sweeping the VGC control data from 100 through 170, followed by resetting the bias control data to 97 and sweeping the VGC control data from 140 through 200, followed by resetting the bias control data to 117 and sweeping the VGC control data from 160 through 240.
Based upon the results of such measurements, it will be possible to interpolate the correct point for a given bias level and matching power level. For example, it will be possible to identify the VGC control register 202 a setting producing −40 dBm of power at a bias control setting of 32, the VGC control register 202 a value producing a power of −20 dBm at a bias setting of 52, and so on. Further, as shown in
As will be readily understood by one of ordinary skill in the art, it may be necessary to insert “dummy” data packets into the outgoing data signals 207 to ensure that the power amplifiers 210 operate for a sufficiently long time interval to reach the correct operating temperature for each bias and VGC control data setting before measurements are performed. As will be readily appreciated, this can be achieved by sending multiple such “dummy” data packets at the particular bias and VGC control data setting before the sequence of test data is transmitted.
In accordance with the presently claimed invention, it is possible to extend this testing technique to provide two variable control parameters affecting the resulting signal transmit power. Preferably, the testing would be defined to have two parameters varying while a third parameter is maintained at a constant predetermined value.
Various other modifications and alternations in the structure and method of operation of this invention will be apparent to those skilled in the art without departing from the scope and the spirit of the invention. Although the invention has been described in connection with specific preferred embodiments, it should be understood that the invention as claimed should not be unduly limited to such specific embodiments. It is intended that the following claims define the scope of the present invention and that structures and methods within the scope of these claims and their equivalents be covered thereby.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8116208 *||Jan 21, 2010||Feb 14, 2012||Litepoint Corporation||System and method for testing multiple digital signal transceivers in parallel|
|US20110090799 *||Apr 21, 2011||Litepoint Corporation||System and method for testing multiple digital signal transceivers in parallel|
|U.S. Classification||330/2, 330/296|
|Apr 16, 2009||AS||Assignment|
Owner name: LITEPOINT CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OLGAARD, CHRISTIAN VOLF;EL-HASSAN, WASSIM;ANDERSEN, CARSTEN;REEL/FRAME:022556/0729
Effective date: 20090416
|Jan 15, 2014||FPAY||Fee payment|
Year of fee payment: 4
|Apr 27, 2015||AS||Assignment|
Owner name: BARCLAYS BANK PLC, NEW YORK
Free format text: PATENT SECURITY AGREEMENT;ASSIGNORS:TERADYNE, INC.;LITEPOINT CORPORATION;REEL/FRAME:035507/0116
Effective date: 20150427