|Publication number||US7804537 B2|
|Application number||US 10/820,464|
|Publication date||Sep 28, 2010|
|Filing date||Apr 8, 2004|
|Priority date||May 6, 2003|
|Also published as||DE60333258D1, EP1475961A1, EP1475961B1, US20040227109|
|Publication number||10820464, 820464, US 7804537 B2, US 7804537B2, US-B2-7804537, US7804537 B2, US7804537B2|
|Inventors||Graeme Storm, Jonathan Ephriam David Hurwitz|
|Original Assignee||STMicrolectronics Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (12), Non-Patent Citations (3), Referenced by (2), Classifications (10), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to electronics, and in particular, to a solid-state image sensor.
Dynamic range is a very important parameter of any imaging system. Human vision has the capability to see details across a wide illumination range in a single scene, and is reported to exhibit around 200 dB of dynamic range. Scenes in excess of 100 dB are not uncommon in everyday situations. Consequently, designers of image sensors are continuously looking for ways to increase dynamic range.
In the field of CMOS image sensors, sensors having a log characteristic are used for image scenes having a high dynamic range. In a logarithmic mode the pixel voltage is continuously available to the outside world and no integration time is used. The photocurrent that is induced flows through one or more MOS transistors and sets up a gate-source voltage that is proportional to the logarithm of the photocurrent. This is exemplified in
Due to the small devices used in the pixels, a high degree of mismatch results from process variations, which produces fixed pattern noise (FPN) across the array. Logarithmic sensors cannot use double sampling (in its conventional form) for removing mismatch since this technique only removes the variation of device M1 and does not alter the effect of device M2.
Another disadvantage of the logarithmic arrangement is a slow response time for low light levels. Increased photocurrent for a given light level can be accomplished by increasing the size of the light sensing element, but this is not desirable since the cost for a given resolution will increase accordingly.
The prior art discloses designs intended to combine features of linear and logarithmic responses, for example, U.S. Pat. No. 6,323,479 to Hynecek et al., and the article to Tu et al. titled “CMOS Active Pixel Sensor with Combined Linear and Logarithmic Mode Operation”, IEEE Canada conference on Electrical and Computer Engineering 1998, vol. 2, pp 754-757, 1998. However, these prior art proposals do not address the FPN and slow response problems.
In view of the foregoing background, an object of the present invention is to provide an image sensor that overcomes or mitigates the problems of linear and logarithmic sensors.
This and other objects, advantages and features in accordance with the present invention are provided by an image sensor comprising an array of pixels, with each pixel comprising a photodiode. A first output circuit may derive a linear output signal by applying a reset signal to the photodiode and reading a voltage on the photodiode after an integration time. A second output circuit may derive a logarithmic output signal by reading a near instantaneous illumination-dependent voltage on the photodiode that is a logarithmic function of the illumination.
The first output circuit may comprise a reset switch for applying a reset voltage to the photodiode. The reset switch may comprise a reset transistor including a conducting terminal connected to the photodiode. A readout switch may turn on the conducting terminal of the reset transistor after expiration of the integration time. The second output circuit may comprise an amplifier, and a log select switch for connecting the amplifier to the photodiode.
The amplifier may comprise a differential amplifier having an inverting input connected to the conducting terminal of the reset transistor, and a non-inverting input connected to a reference voltage. The image sensor may further comprising a calibration circuit for calibrating each pixel before deriving the logarithmic output signal. The calibrating circuit may comprise a constant current source selectively connected to each respective pixel.
An output node may be associated with each photodiode, and wherein the linear and logarithmic output signals may be derived from the output node. The calibration circuit may further comprise a switch connected between the photodiode and the output node for isolating the photodiode from the output node while calibration takes place.
Another aspect of the present invention is directed to a method for operating an image sensor comprising an array of pixels, with each pixel comprising a photodiode. The method may comprise generating a linear output signal from each pixel, and generating a logarithmic output signal from each pixel. The method may further comprise selecting the linear output signal if the pixel has not saturated during generation of the linear output signal, otherwise, the logarithmic output signal is selected.
An embodiment of the invention will now be described, by way of example only, with reference to the drawings, in which:
The basis of the invention is to combine a conventional integrating mode with a logarithmic mode. A single frame of image data will have the information for some pixels gathered from the integrating mode and other pixels from the logarithmic mode. The pixels that have saturated during exposure will have a log value (scaled appropriately). This keeps the superior performance of the integrating mode in low light conditions, but adds the high dynamic range of the logarithmic mode.
The combined linear-log system can be used without the need for a framestore. After a period of integration the linear result is read before switching the pixel to the logarithmic mode and reading the log result. The log result is read in a near instantaneous manner, that is, as soon as the log signal has settled and while no other pixel is being addressed. The linear and log results are then combined during the readout phase.
The logarithmic mode can suffer from image lag due to its slow response time, but by using the linear mode for low light levels the present invention in the logarithmic mode only has to process higher photocurrents. Optionally, the addition of an amplifier connected to the pixel will further aid the response time in the logarithmic mode.
For linear operation the reset voltage Vrt (set in col4) can be sampled onto the node pix by pulsing cal/reset high (applied to transistor M4) and logsel (applied to transistor M6) can be raised to precharge the gate of transistor M2 via col3 low such that it is off and does not affect the integration period. If isolate (applied to transistor M5) is on then the photocurrent generated will lower the voltage on pix. After a set integration time read can be turned on such that M1 now acts as a source follower, with column 2 held at a voltage approximately equal to the reset voltage Vrt and column 1 comprising a current source (not shown).
Optionally, the pixel can include an anti-bloom arrangement to prevent blooming. Blooming is caused by the node pix being driven to near zero volts, allowing leakage of current to adjacent pixels. The anti-bloom arrangement of
The pixel is operated in the logarithmic mode by connecting an amplifier A from the column as shown in
where Voff is the offset of the amplifier A. The output voltage is thus given by:
where Vgs(M2) is the gate-source voltage of device M2 which is determined by the photocurrent and has a logarithmic dependence.
The offset of the amplifier can be removed by performing calibration, that is, by bringing the pixels into a reference state so that the FPN can be learned and cancelled. To do this, the photodiode P is isolated from the load device M2 by turning off device M5. This stops the photocurrent from corrupting the calibration. One method of generating a calibration current for device M2 is to use M4 as a switch to an in-column current source C. This allows a matched current to be pulled through the load device of each pixel, and places each pixel into a reference state which should be equivalent to illuminating the sensor with a uniform intensity.
Other methods of calibration could be used, for example, those shown in Kavadias et al., IEEE Journal of Solid-State Circuits, vol. 35, No. 8, August 2000 and in Loose et al., ibid., vol. 36, No. 4, April 2001, may be used.
However, where a log output is used the actual output must include an offset to place it correctly into the linear range. Referring to
The calculation of A can be done once, and need only be changed if the exposure time is altered. Thus, the present invention combines features of linear and logarithmic sensors in a manner that avoids or minimizes the drawbacks of both types.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US6133563||Sep 29, 1997||Oct 17, 2000||Intel Corporation||Sensor cell having a soft saturation circuit|
|US6323479||Sep 10, 1999||Nov 27, 2001||Dalsa, Inc.||Sensor pixel with linear and logarithmic response|
|US6355965 *||Mar 29, 2000||Mar 12, 2002||Omnivision Technologies, Inc.||On-chip fixed pattern noise canceling logarithmic response imager sensor|
|US6593970 *||Nov 6, 1998||Jul 15, 2003||Matsushita Electric Industrial Co., Ltd.||Imaging apparatus with dynamic range expanded, a video camera including the same, and a method of generating a dynamic range expanded video signal|
|US6606121 *||Sep 27, 1997||Aug 12, 2003||Boehm Markus||Local auto-adaptive optic sensor|
|US6642500 *||Jan 30, 2001||Nov 4, 2003||Canon Kabushiki Kaisha||Signal processing apparatus which performs logarithmic compressions|
|US6697112 *||Nov 18, 1998||Feb 24, 2004||Intel Corporation||Imaging system having multiple image capture modes|
|US6967682 *||Mar 27, 2000||Nov 22, 2005||Minolta Co., Ltd.||Photoelectric converting device|
|US7071982 *||Jul 25, 2002||Jul 4, 2006||Texas Instruments Incorporated||Adaptive relative and absolute address coding CMOS imager technique and system architecture|
|US20030076432 *||Aug 12, 2002||Apr 24, 2003||Qiang Luo||System and method to facilitate time domain sampling for solid state imager|
|US20050052557 *||Oct 12, 2004||Mar 10, 2005||Minolta Co., Ltd.||Image-sensing apparatus|
|US20060044436 *||Dec 24, 2003||Mar 2, 2006||Sharp Kabushiki Kaisha||Solid-state imaging device|
|1||Kavadias, A Logarithmic Response CMOS Image Sensor with On-Chip Calibration, IEEE Journal of Solid-State Circuits, vol. 35, No. 8, Aug. 2000, pp. 1146-1152, XP001075115.|
|2||*||Loose, M. et al.; "A self-calibrating single-chip CMOS camera with logarithmic response"; IEEE Journal of Solid-State Circuits, vol. 36, Iss.4; Apr. 2001; pp. 586-596.|
|3||*||Tu, N. et al.; "CMOS Active Pixel Image Sensor with Combined Linear and Logarithmic Mode Operation"; Department of Electrical Engineering, University of Waterloo, On; 1998 IEEE Canadian Conference on Electrical and Computer Engineering; May 24-28, 1998; vol. 2; p. 754-757.|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8625012 *||Jan 29, 2010||Jan 7, 2014||The Hong Kong University Of Science And Technology||Apparatus and method for improving dynamic range and linearity of CMOS image sensor|
|US20100194956 *||Aug 5, 2010||The Hong Kong University Of Science And Technology||Apparatus and method for improving dynamic range and linearity of CMOS image sensor|
|U.S. Classification||348/302, 250/208.1|
|International Classification||H04N5/335, H04N5/361, H04N5/20, H01L27/00|
|Cooperative Classification||H04N5/335, H04N5/361|
|European Classification||H04N5/361, H04N5/335|
|Jul 20, 2004||AS||Assignment|
Owner name: STMICROELECTRONICS LTD., UNITED KINGDOM
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:STORM, GRAEME;HURWITZ, JONATHAN EPHRIAM DAVID;REEL/FRAME:015579/0147
Effective date: 20040507
|Jun 21, 2011||CC||Certificate of correction|
|Feb 28, 2014||FPAY||Fee payment|
Year of fee payment: 4