US 7820498 B2
A backside illuminated imaging sensor includes a semiconductor having an imaging pixel that can include a photodiode region, an insulation layer, and a reflective layer. The photodiode is typically formed in the frontside of the semiconductor substrate. A surface shield layer can be formed on the frontside of the photodiode region. A light reflecting layer can be formed using silicided polysilicon on the frontside of the sensor. The photodiode region receives light from the back surface of the semiconductor substrate. When a portion of the received light propagates through the photodiode region to the light reflecting layer, the light reflecting layer reflects the portion of light received from the photodiode region towards the photodiode region. The silicided polysilicon light reflecting layer also forms a gate of a transistor for establishing a conductive channel between the photodiode region and a floating drain.
1. A backside illuminated (“BSI”) imaging sensor, the BSI imaging sensor comprising:
a photodiode region disposed within a semiconductor substrate layer having a backside and a frontside, wherein the photodiode region is sensitive to light incident through the backside;
an insulation layer disposed on the frontside of the semiconductor substrate layer over the photodiode region;
metal layers disposed over the frontside of the semiconductor substrate layer; and
a light reflecting layer disposed on the insulation layer and positioned to reflect at least a portion of the light incident through the backside of the semiconductor substrate layer that passes through the photodiode region back towards the photodiode region, wherein the light reflecting layer comprises a transistor gate.
2. The BSI imaging sensor of
3. The BSI imaging sensor of
an isolation region disposed within the semiconductor substrate layer for isolating adjacent pixels of the BSI imaging sensor, wherein the light reflecting layer extends horizontally to overlap a portion of the isolation region and a portion of the drain.
4. The BSI imaging sensor of
5. The BSI imaging sensor of
6. The BSI imaging sensor of
7. The BSI imaging sensor of
8. The BSI imaging sensor of
9. The BSI imaging sensor of
10. The BSI imaging sensor of
11. A backside illuminated (BSI) imaging pixel array, comprising:
a photosensitive region disposed within a substrate layer having a backside and a frontside, wherein the photosensitive region is sensitive to light incident through the backside;
an insulation layer disposed on the frontside of the substrate layer in a region that is over the photosensitive region, wherein the insulation layer is an oxide;
metal layers disposed over the frontside of the substrate layer; and
a silicide light reflecting layer positioned to reflect at least a portion of the light incident through the backside of the substrate layer that passes through the photosensitive region back towards the photosensitive region, wherein the silicide light reflecting layer is disposed on a transfer transistor gate positioned for transferring charge from the photosensitive region to a floating drain disposed within the substrate layer.
12. The BSI imaging pixel array of
13. The BSI imaging pixel array of
14. The BSI imaging pixel array of
an isolation region disposed within the substrate layer for isolating adjacent pixels of the BSI imaging pixel array, wherein the silicide light reflecting layer and the transfer transistor gate extend horizontally to overlay a portion of the isolation region and a portion of the floating drain.
This application claims the benefit of U.S. Provisional Application No. 61/027,343, filed on Feb. 8, 2008, the contents of which are incorporated herein by reference.
This disclosure relates generally to imaging sensors, and in particular but not exclusively, relates to backside illuminated imaging sensors.
Many semiconductor imaging sensors today are frontside illuminated. That is, they include imaging arrays that are fabricated on the frontside of a semiconductor wafer, where light is received at the imaging array from the same frontside. However, frontside illuminated imaging sensors have many drawbacks, one of which is a relatively limited fill factor.
Backside illuminated imaging sensors are an alternative to frontside illuminated imaging sensors and address the fill factor problems associated with frontside illumination. Backside illuminated imaging sensors typically include imaging arrays that are fabricated on the front surface (or frontside) of the semiconductor wafer, but receive light through a back surface of the wafer. However, to detect light from the backside, the silicon wafer on the backside is relatively thin. Color filters and micro-lenses can be included on the back surface of the wafer in order to improve the sensitivity of the backside illuminated sensor. The thickness of the wafer may also be reduced in order to improve the sensitivity to light (especially shorter wavelengths). However, higher sensitivity typically results in higher optical crosstalk. That is, as the semiconductor wafer is thinned, light can more easily pass through the wafer and light intended for one pixel might be reflected within the image sensor to other pixels that were not intended to receive the light. Thus, improving sensitivity and reducing optical crosstalk can improve the signal quality of a backside illuminated sensor.
Non-limiting and non-exhaustive embodiments of the invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
Embodiments of a Backside Illuminated Imaging Sensor with Light Reflecting Transfer Gate are described herein. In the following description numerous specific details are set forth to provide a thorough understanding of the embodiments. One skilled in the relevant art will recognize, however, that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Pixel array 105 is a two-dimensional (“2D”) array of backside illuminated imaging sensors or pixels (e.g., pixels P1, P2 . . . , Pn). In one embodiment, each pixel is an active pixel sensor (“APS”), such as a complementary metal-oxide-semiconductor (“CMOS”) imaging pixel. As illustrated, each pixel is arranged into a row (e.g., rows R1 to Ry) and a column (e.g., column C1 to Cx) to acquire image data of a person, place, or object, which can then be used to render a 2D image of the person, place, or object.
After each pixel has acquired its image data or image charge, the image data is readout by readout circuitry 110 and transferred to function logic 115. Readout circuitry 110 may include amplification circuitry, analog-to-digital conversion circuitry, or otherwise. Function logic 115 may simply storage the image data or even manipulate by applying post image effects (e.g., crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise). In one embodiment, readout circuitry 110 may readout a row of image data at a time along readout column lines (illustrated) or may readout the image data using a variety of other techniques (not illustrated), such as a serial readout or a full parallel readout of all pixels simultaneously.
Control circuitry 120 is coupled to pixel array 105 to control operational characteristic of pixel array 105. For example, control circuitry 120 may generate a shutter signal for controlling image acquisition.
In the illustrated embodiment of
Also included in imaging pixel 200 is transfer gate 255 which is coupled to transfer charge that is accumulated in photodiode region 235 to floating drain 230. In one embodiment, transfer gate 255 is a polycrystalline silicon (i.e., polysilicon) structure.
As shown in
During operation, incident light is received at the back surface of substrate 205 and passes through substrate 205 to be received by photodiode region 235. Photodiode region 235 then generates one or more electrical signals in response to the received light where these electrical signals are routed through peripheral circuitry. However, a portion of the light received at photodiode region 235 may continue propagating through the front surface (e.g., at insulator 220) of substrate 205. In some instances this light continues into one or more of the intermetal dielectric layers (not shown) and is reflected by the metal layers (not shown) back towards a different (e.g., adjacent) pixel, where this different pixel now generates a new electrical signal in response to the reflected light. Light reflecting back to an adjacent or different pixel in this manner is referred to herein as “optical crosstalk” and increases noise and reduces the quality in the resulting image produced by a pixel array.
Optical cross talk can also occur from light incident on the frontside (or reflected by structures in the frontside) of the imaging pixel. The cross talk is typically greater for longer wavelengths of light. Thus, the quality of the image is reduced because incident light is often scattered from adjacent pixels. When the adjacent pixels are used to capture light of different colors, the scattered light can shift the color information captured by the pixels. In addition, the quality of the imaging pixels can be degraded due to etching of structures adjacent to the photodiode region. For example, gate polysilicon is typically deposited on the gate insulator, which is typically less than 100 angstroms. When gate polysilicon is etched by subsequent processing, adjacent photodiode regions are often damaged in the etching process. The etching can cause damage to the silicon above the photodiode region, which can result in increase current leakage and damaged and/or defective pixels.
A sample backside illuminated imaging sensor as disclosed herein includes a semiconductor having an imaging pixel that includes a photodiode region, a doped layer, and a silicided polysilicon reflective layer. The photodiode is formed in the frontside of the semiconductor substrate. A thin insulator layer is formed on the frontside of the photodiode region. A silicided polysilicon light reflecting layer formed on the frontside of the thin insulator layer such that the photodiode region receives light from the back surface of the semiconductor substrate. When a portion of the received light propagates through the photodiode region to the silicided polysilicon light reflecting layer, the silicided polysilicon light reflecting layer reflects the portion of light received from the photodiode region. The silicided polysilicon light reflecting layer and the thin insulating layer also forms a gate of a transistor for establishing a conductive channel between the photodiode region and a floating drain.
In the illustrated embodiment of
Also included in imaging pixel 300 is transfer gate 355 which is coupled to transfer charge that is accumulated in photodiode region 335 to floating drain 330. The charge is transferred through an active channel that is established in gate area 345 when the transfer gate 355 is activated. In one embodiment, transfer gate 355 is a polycrystalline silicon (i.e., polysilicon) structure. As illustrated, the transfer gate 355 extends horizontally from STI 350, across pinning layer 340, to around floating drain 330. Thus, the entire frontside of the photodiode region 335 can be shielded by the transfer gate 355. The polysilicon of the transfer gate 355 works to prevent etching damage of the photodiode region 335 (that would likely occur if the polysilicon was etched through). Thus, the leakage current from the photodiode region 335 is reduced because of a relative lack of defects associated with processing of the frontside of the photodiode region 335.
Additionally, cross talk is reduced by the extended transfer gate 355. Silicide is formed on the polysilicon, which is not transparent. Instead, incident light entering from the backside that encounters silicided polysilicon (such as the extended transfer gate 355 discussed above) is reflected. Light that enters from the backside and traverses the photodiode region 335 (without being absorbed) is thus reflected back into the photodiode region 335 by the silicided polysilicon of extended transfer gate 355. When the light is reflected back into the photodiode region 335, the chances of photon absorption (and concomitant charge generation) are increased. Thus, a decreased depth of the photodiode region 335 does not necessarily result in decreased sensitivity because the unabsorbed light can be reflected back into the photodiode region 335 for more likely absorption.
Moreover, cross talk is reduced because the polysilicon layer of the transfer gate 355 is formed in a region that is relatively close to the photodiode region 335. The relative closeness helps to prevent light rays of high angles of incidence (including oblique light rays) from being reflected from adjacent pixels into an adjacent (unintended) pixel. Thus, incident light from the backside on the pixel is more likely to be absorbed by the photodiode region 335 and light incident and/or reflected by metal structures in the frontside are less likely to be absorbed by the photodiode region 335.
As shown in
The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize.
These modifications can be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.