|Publication number||US8022780 B2|
|Application number||US 12/107,592|
|Publication date||Sep 20, 2011|
|Filing date||Apr 22, 2008|
|Priority date||Apr 22, 2008|
|Also published as||CN102017417A, EP2291913A2, US20090261917, WO2009132152A2, WO2009132152A3|
|Publication number||107592, 12107592, US 8022780 B2, US 8022780B2, US-B2-8022780, US8022780 B2, US8022780B2|
|Inventors||Mazhareddin Taghivand, Conor Donovan, Jeongsik Yang, Sang-Oh Lee|
|Original Assignee||Qualcomm Incorporated|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (9), Non-Patent Citations (2), Referenced by (2), Classifications (8), Legal Events (2)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The disclosure relates to voltage-controlled oscillators (VCO's), and more particularly, to techniques for addressing frequency shift of VCO's due to temperature change.
A voltage-controlled oscillator (VCO) is an electrical oscillator designed to generate a signal having an oscillation frequency controlled by a voltage input. A VCO may be implemented using a varactor (i.e., a voltage variable capacitor) in an LC tank resonator coupled to an oscillator circuit. By varying the capacitance of the varactor using a control voltage, the oscillation frequency of the VCO can be controlled.
During normal operation, temperature changes in the VCO circuit may lead to unwanted deviations of the oscillation frequency from the expected frequency. It would be desirable to have techniques to compensate for deviations in the VCO oscillation frequency caused by temperature change.
An aspect of the present disclosure provides a method for adjusting the oscillation frequency of a voltage-controlled oscillator (VCO), a temperature change in the VCO causing a variation in the VCO oscillation frequency, the method comprising sensing a temperature of the VCO; coupling an auxiliary varactor to the VCO, a change in the capacitance of the auxiliary varactor causing a change in the oscillation frequency of the VCO; controlling the capacitance of the auxiliary varactor using a control voltage; and adjusting the control voltage based on the sensed temperature such that the variation in the VCO oscillation frequency due to VCO temperature change is reduced.
For example, in an embodiment of an analog VCO, the oscillating frequency may be coarsely tuned by selectively switching on and off a bank of capacitors based on a set of digital control voltages. The frequency may then be finely tuned by controlling the capacitance of a varactor using an analog voltage. In this embodiment, the signal Vadj may comprise a plurality of digital signals to control the coarse tuning, and an analog signal to control the fine tuning. Alternatively, in an embodiment of a digital VCO, or a DCO (digitally controlled oscillator), both coarse tuning and fine tuning of the operating capacitance may be controlled using digital signals. Note in this specification and in the claims, the term voltage-controlled oscillator (VCO) will be understood to encompass both analog VCO's and digital VCO's (DCO's). One of ordinary skill in the art will realize that the techniques disclosed herein may readily be applied to both digital and analog VCO's.
Note that the relationship between Vadj and frequency in
One of ordinary skill in the art will realize that in an alternative embodiment shown, for example, in
In an embodiment, the relationship between Vaux and temperature T may be designed according to the following guidelines (Guidelines 1):
is the expected change in oscillator frequency due to temperature divided by the corresponding temperature change,
is the expected change in auxiliary capacitance due to Vaux divided by the corresponding change in Vaux, and
is the desired relationship between change in Vaux and change in temperature T. Note the relationships in Guidelines 1 are given for illustrative purposes only, and are not meant to limit the scope of the present disclosure to any particular relationship between Vaux and T.
One of ordinary skill in the art will realize that the measured temperature T may be an analog or digital signal. The voltage generator 310 may be implemented directly using analog circuitry to synthesize the desired functional relationship, or it may be implemented digitally using, e.g., a look-up table (LUT) or other digital means. In an embodiment, the voltage generator 310 may receive an analog representation of T, digitize it using an analog-to-digital converter (ADC), implement the desired relationship in the digital domain, and convert the digitally generated signal back to the analog domain as Vaux. In an alternative embodiment, the voltage generator 310 may supply Vaux as one or more digital control signals, and Caux may be implemented as a set of switchable capacitors controlled by Vaux.
In an embodiment, the first current source can be designed to generate a current having magnitude directly proportional to absolute temperature, or PTAT (Equation 1):
βI ptat(T)=αI bg(1+T C(T−T 0));
wherein Iptat(T) is the magnitude of the base current generated by first current source 430, Ibg is the (temperature-independent) magnitude of the base current generated by band-gap current source 440, the coefficients α and β are current multipliers selectable by an externally supplied control signal, T is the temperature in Celsius, TC is the temperature coefficient of the first current source 430, and T0 is a reference temperature fixed by the design of the current source. In an embodiment, T0 may be 25 degrees Celsius.
The current Idiff may be expressed as follows (Equations 2):
wherein the term
acts to modify the slope of Idiff's dependence on temperature T.
In an embodiment, the current multipliers α and β may be implemented by selectively activating a plurality of parallel-coupled current sources. In an embodiment, the values of β and α may be programmed to modify the temperature coefficient TC of Idiff (i.e., the first-order dependence of Idiff on temperature T) as follows (Table 1):
α = 1, β = 3
α = 2, β = 4
α = 3, β = 5
α = 4, β = 6
according to Guidelines 1 is controlled, the resistance R1 need not meet strict accuracy tolerances.
Note the embodiment of
Note a VCO employing the techniques described above may be incorporated into, e.g., a phase-locked loop (PLL), to assist the PLL in locking onto a desired frequency in the presence of temperature variations.
The techniques described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in hardware, the techniques may be realized using digital hardware, analog hardware or a combination thereof. If implemented in software, the techniques may be realized at least in part by a computer-program product that includes a computer readable medium on which one or more instructions or code is stored.
By way of example, and not limitation, such computer-readable media can comprise RAM, such as synchronous dynamic random access memory (SDRAM), read-only memory (ROM), non-volatile random access memory (NVRAM), ROM, electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), FLASH memory, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other tangible medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
The instructions or code associated with a computer-readable medium of the computer program product may be executed by a computer, e.g., by one or more processors, such as one or more digital signal processors (DSPs), general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry.
In this specification and in the claims, it will be understood that when an element is referred to as being “connected to” or “coupled to” another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected to” or “directly coupled to” another element, there are no intervening elements present.
A number of aspects and examples have been described. However, various modifications to these examples are possible, and the principles presented herein may be applied to other aspects as well. These and other aspects are within the scope of the following claims.
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|Citing Patent||Filing date||Publication date||Applicant||Title|
|US9344094 *||Mar 15, 2013||May 17, 2016||Intel Corporation||Temperature compensated PLL calibration|
|US20140266472 *||Mar 15, 2013||Sep 18, 2014||Jeffrey W. Waldrip||Temperature compensated pll calibration|
|U.S. Classification||331/176, 331/36.00C, 331/177.00V|
|Cooperative Classification||H03L1/023, H03L1/025|
|European Classification||H03L1/02B1, H03L1/02B1A|
|Apr 24, 2008||AS||Assignment|
Owner name: QUALCOMM INCORPORATED, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TAGHIVAND, MAZHAREDDIN;DONOVAN, CONOR;YANG, JEONGSIK;ANDOTHERS;REEL/FRAME:020848/0329;SIGNING DATES FROM 20080407 TO 20080422
Owner name: QUALCOMM INCORPORATED, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TAGHIVAND, MAZHAREDDIN;DONOVAN, CONOR;YANG, JEONGSIK;ANDOTHERS;SIGNING DATES FROM 20080407 TO 20080422;REEL/FRAME:020848/0329
|Feb 25, 2015||FPAY||Fee payment|
Year of fee payment: 4