|Publication number||US8028177 B2|
|Application number||US 12/344,251|
|Publication date||Sep 27, 2011|
|Filing date||Dec 25, 2008|
|Priority date||Feb 21, 2008|
|Also published as||CN101515194A, CN101515194B, US20090217026|
|Publication number||12344251, 344251, US 8028177 B2, US 8028177B2, US-B2-8028177, US8028177 B2, US8028177B2|
|Inventors||Wen-Cheng Chuang, Ching-Jou Chen, Hung-Chi Huang|
|Original Assignee||Hon Hai Precision Industry Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (8), Referenced by (2), Classifications (21), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
Embodiments of the present disclosure are related to methods of computer management, and particularly to a method for changing power states of a computer.
2. Description of Related Art
Computers may have a total of six different power states ranging from S0 to S5. In state S0, the computer is completely powered on and fully operational, while in state S5, the computer is completely powered off. The states S1, S2, S3 and S4 are referred to as sleep states, in which the computer appears off in order to conserve power. The computer in any sleep state retains enough of the hardware context, thus can return to the work state S0 without a system reboot. If the computer in state S1, S2, or S3 loses battery power, it will lose all the hardware context, therefore, the computer must reboot to return to state S0. The computer in state S4 can restart from its previous location even after it loses battery power, because operating system context is retained in a memory image, which was written to a disk by the computer before entering state S4.
However, if enabled applications have not been stored before the computer goes to state S4 from S0, and the boot device (e.g. a hard disk) of the computer is changed before the computer loses battery power, the computer cannot return to state S0 when resuming battery power because of the boot device has been changed, thus, the applications cannot be restored. In addition, because reading the memory image from the disk spends much time, restarting the computer from state S4 to S0 has a long wake-up latency.
What is needed, therefore, is a method for changing power states of a computer, which can change the power states of the computer between state S0 and S4 with high efficiency.
All of the processes described may be embodied in, and fully automated via, functional code modules executed by one or more general purpose computers or processors. The code modules may be stored in any type of computer-readable medium or other storage device. Some or all of the methods may alternatively be embodied in specialized computer hardware or electronic apparatus.
In block S102, the power manager 10 sends a shutdown event to all running applications 20, and displays a message prompting a user to save any user data that might be lost when the computer is in the S4 state.
In block S104, the BIOS 80 stores a pre-power-down memory state of the computer 1 by creating an image of system memory (hereinafter, “the system memory image”) of the computer 1 in the flash memory 72, and the OSPM 40 stores the system memory image into the hard disk 71 via the kernel 30 and the ACPI 50. The system memory is an area where the computer 1 temporary holds running programs and data that are in use. In one embodiment, the system memory may be a read only memory (ROM), a random access memory (RAM), a cache memory, or any other suitable memory. The system memory image is a copy of programs and data that are in use.
In block S106, the OSPM 40 changes the power state of the computer 1 from the work state S0 to the sleep state S4 by executing a series of going-to-sleep instructions. The going-to-sleep instructions comprise a transition to state (TTS) control method used to prepare the hardware 70 to sleep, and a prepare to sleep (PTS) control method to notify the device drivers 60 of the sleep state transition. The computer 1 consumes the least power when in the sleep state S4 compared to all other sleep states.
In block S108, the computer 1 receives a second power command to change the power state of the computer from the sleep state S4 to the work state S0.
In block S110, the BIOS 80 scans hardware configuration of the computer 1. For example, the BIOS 80 identifies a central process unit (CPU), the system memory, external devices such as the hard disk 71 and the flash memory 72, etc.
In block S112, the BIOS 80 detects if the hardware configuration of the computer 1 has been changed in the sleep state S4. For example, the BIOS 80 detects if the flash memory 72 exists. If the hardware configuration has not been changed, the procedure goes to block S114. Otherwise, if the hardware configuration has been changed, the procedure goes to block 120.
In block S114, the BIOS 80 restores the system memory image from the flash memory 72 to the system memory.
In block S116, the OSPM 40 changes the power state of the computer 1 from the sleep state S4 to the work state S0 by executing a series of wake-up instructions. The wake-up instructions comprise a back from sleep (BFS) control method allowing the ACPI 50 to perform any required functions when returning from the sleep state S4.
In block S118, the computer 1 initializes the operating system of the computer 1.
In block S120, the BIOS 80 instructs the computer 1 to exit the sleep state S4. In one embodiment, the BIOS 80 set a value of a sleep enable field SLP_EN in a ACPI register to ‘0’ to signal the computer 1 to exit the sleep state S4.
In block S122, the BIOS 80 performs a power-on-self-test (POST) of the computer 1, initializes the system memory, and creates a system memory map. The system memory map shows how addresses of the system memory have been allocated to the components of the computer 1, e.g., the applications 20, the ACPI 50, the system memory image, and so on.
In block S124, the OSPM 40 restores the system memory image from the hard disk 71 or directly loads an OS image from the hard disk 71 to the system memory. The OS image is a file that contains the OS. A detailed description of block S124 is given in
In block S1243, the OSPM 40 checks if the system memory image is intact. In one embodiment, the OSPM 40 checks if the system memory image is intact by computing a current checksum of the system memory image, and compare the current checksum with a pre-stored checksum of the system memory image. If the system memory image is intact, the procedure goes to block S1244. Otherwise, if the system memory image is not intact, for example, the system memory image has been damaged, the procedure goes to block S1245.
In block S1244, the OSPM 40 loads the system memory image from the hard disk 71 to the system memory according to the system memory map.
In block S1245, the OSPM 40 loads the OS image from the hard disk 71 to the system memory.
The present embodiment uses the power manager 10 to send the shutdown event to all running applications 20 before the computer 1 goes to the sleep state S4, thus, data lost in the sleep state S4 can be prevented. Furthermore, the present embodiment uses the BIOS 80 stores the system memory image into the flash memory 72 before the computer 1 enters the sleep state S4. Because reading and writing data to the flash memory 72 is much faster than reading and writing data to the hard disk 71, the computer can enter and exit the work state S0 and the sleep state S4 with less time.
It should be emphasized that the above-described inventive embodiments are merely possible examples of implementations, and set forth for a clear understanding of the principles of the present disclosure. Many variations and modifications may be made to the above-described inventive embodiments without departing substantially from the spirit and principles of the present disclosure. All such modifications and variations are intended to be included herein within the scope of this disclosure and the above-described inventive embodiments, and the present disclosure is protected by the following claims.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US6438668 *||Sep 30, 1999||Aug 20, 2002||Apple Computer, Inc.||Method and apparatus for reducing power consumption in a digital processing system|
|US6691234 *||Jun 16, 2000||Feb 10, 2004||Intel Corporation||Method and apparatus for executing instructions loaded into a reserved portion of system memory for transitioning a computer system from a first power state to a second power state|
|US6901298 *||Sep 30, 2002||May 31, 2005||Rockwell Automation Technologies, Inc.||Saving and restoring controller state and context in an open operating system|
|US7757060 *||Sep 11, 2006||Jul 13, 2010||Dell Products L.P.||Reducing wake latency time for power conserving state transition|
|US20080082752 *||Sep 29, 2006||Apr 3, 2008||Ram Chary||Method and apparatus for saving power for a computing system by providing instant-on resuming from a hibernation state|
|CN1530796A||Mar 12, 2003||Sep 22, 2004||联想(北京)有限公司||Guiding method for speeding up operation system|
|CN1818869A||Mar 15, 2006||Aug 16, 2006||浙江大学||Mirror starting optimization of built-in operation system|
|CN1818870A||Mar 16, 2006||Aug 16, 2006||浙江大学||Memory mirror starting optimization of built-in operation system|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8522054 *||Nov 17, 2009||Aug 27, 2013||Via Technologies, Inc.||Stand-by mode management method for use in a stand-by mode of a computer system with stand-by mode management module|
|US20100281277 *||Nov 17, 2009||Nov 4, 2010||Via Technologies, Inc.||Computer system and stand-by mode management module and stand-by mode management method using the same|
|U.S. Classification||713/300, 713/2, 713/1, 713/310, 713/100, 713/340, 711/100, 713/323, 713/324, 713/320, 713/330, 713/321, 713/322|
|International Classification||G06F1/26, G06F15/177, G06F1/32, G06F9/24|
|Cooperative Classification||G06F9/4418, G06F1/3203|
|European Classification||G06F1/32P, G06F9/44A6|
|Dec 25, 2008||AS||Assignment|
Owner name: HON HAI PRECISION INDUSTRY CO., LTD., TAIWAN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHUANG, WEN-CHENG;CHEN, CHING-JOU;HUANG, HUNG-CHI;REEL/FRAME:022030/0388
Effective date: 20081113
|May 8, 2015||REMI||Maintenance fee reminder mailed|
|Sep 27, 2015||LAPS||Lapse for failure to pay maintenance fees|
|Nov 17, 2015||FP||Expired due to failure to pay maintenance fee|
Effective date: 20150927