US 8179175 B2 Abstract A reliable charge pump circuit includes an operational amplifier; an upper current mirror; a lower current mirror; a startup circuit; and an anti-lock circuit, wherein the anti-lock circuit includes a current source and a diode-connected NMOS transistor, which increases the driving strength of the operational amplifier to two NMOS transistors connected to an output node of the operational amplifier, so as to prevent deadlock caused by multiple stable status and improve production yield.
Claims(12) 1. A reliable charge pump circuit, comprising:
an operational amplifier;
an upper current mirror connected to an noninverting input node and an inverting input node of said operational amplifier respectively;
a lower current mirror, comprising two NMOS transistors which are connected to an output node of said operational amplifier;
an integration capacitor connected to said inverting input node of said operational amplifier;
a startup circuit for starting the reliable charge pump circuit, connected to said integration capacitor; and
an anti-lock circuit, comprising a diode-connected NMOS transistor connected to said output node of said operational amplifier, wherein an drain node of said diode-connected NMOS transistor is connected to an gate node of said diode-connected NMOS transistor; and a current source connected to said diode-connected NMOS transistor, wherein said diode-connected NMOS transistor and said current source form a common-source drive.
2. The reliable charge pump circuit, as recited in
3. The reliable charge pump circuit, as recited in
4. The reliable charge pump circuit, as recited in
5. The reliable charge pump circuit, as recited in
1 is connected to an open-loop circuit of a transconductance amplifier G2, wherein a grounded capacitor C1, a grounded resistor R1 and a grounded resistors R3 are connected between said transconductance amplifier G1 and said transconductance amplifier G2, an open-loop end of said transconductance amplifier G2 is connected to a grounded capacitor C2, a grounded resistor R2 and a grounded capacitors C3, wherein said grounded resistor R3 and said grounded capacitor C3 provided in said open-loop circuit is equivalent to said anti-lock circuit.6. The reliable charge pump circuit, as recited in
1 is connected to an open-loop circuit of a transconductance amplifier G2, wherein a grounded capacitor C1, a grounded resistor R1 and a grounded resistors R3 are connected between said transconductance amplifier G1 and said transconductance amplifier G2, an open-loop end of said transconductance amplifier G2 is connected to a grounded capacitor C2, a grounded resistor R2 and a grounded capacitors C3, wherein said grounded resistor R3 and said grounded capacitor C3 provided in said open-loop circuit is equivalent to said anti-lock circuit.7. The reliable charge pump circuit, as recited in
1 is connected to an open-loop circuit of a transconductance amplifier G2, wherein a grounded capacitor C1, a grounded resistor R1 and a grounded resistors R3 are connected between said transconductance amplifier G1 and said transconductance amplifier G2, an open-loop end of said transconductance amplifier G2 is connected to a grounded capacitor C2, a grounded resistor R2 and a grounded capacitors C3, wherein said grounded resistor R3 and said grounded capacitor C3 provided in said open-loop circuit is equivalent to said anti-lock circuit.8. The reliable charge pump circuit, as recited in
1 is connected to an open-loop circuit of a transconductance amplifier G2, wherein a grounded capacitor C1, a grounded resistor R1 and a grounded resistors R3 are connected between said transconductance amplifier G1 and said transconductance amplifier G2, an open-loop end of said transconductance amplifier G2 is connected to a grounded capacitor C2, a grounded resistor R2 and a grounded capacitors C3, wherein said grounded resistor R3 and said grounded capacitor C3 provided in said open-loop circuit is equivalent to said anti-lock circuit.9. The reliable charge pump circuit, as recited in
here, Vout/Vin(s) is a Laplace transform for a ratio of output signal and input signal;
G
1 is equivalent to a transconductance amplifier of said operational amplifier in the reliable charge pump circuit;R
1′ is equivalent to a resistor connected between said output node of said operational amplifier and the ground;C
1 is equivalent to a capacitor connected between said output node of said operational amplifier and the ground;G
2 is equivalent to a transconductance amplifier of said NMOS transistor which is connected to said output node of said operational amplifier;R
2 is equivalent to a resistor connected between an drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;C
2′ is equivalent to a capacitor connected between said drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;s is a Laplace operator,
wherein R
1′=(R1//R3)/(R1+R3), C2′=C2+C3, given two poles W1=1/(R1′×C1), W2=1/(R2×C2′), when W1 gets larger, W2 gets smaller, therefore, said two poles W1, W2 are separated, W1 is far away from W2.10. The reliable charge pump circuit, as recited in
here, Vout/Vin(s) is a Laplace transform for a ratio of output signal and input signal;
G
1 is equivalent to a transconductance amplifier of said operational amplifier in the reliable charge pump circuit;R
1′ is equivalent to a resistor connected between said output node of said operational amplifier and the ground;C
1 is equivalent to a capacitor connected between said output node of said operational amplifier and the ground;G
2 is equivalent to a transconductance amplifier of said NMOS transistor which is connected to said output node of said operational amplifier;R
2 is equivalent to a resistor connected between an drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;C
2′ is equivalent to a capacitor connected between said drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;s is a Laplace operator,
wherein R
1′=(R1//R3)/(R1+R3), C2′=C2+C3, given two poles W1=1/(R1′×C1), W2=1/(R2×C2′) when W1 gets larger, W2 gets smaller, therefore, said two poles W1, W2 are separated, W1 is far away from W2.11. The reliable charge pump circuit, as recited in
here, Vout/Vin(s) is a Laplace transform for a ratio of output signal and input signal;
G
1 is equivalent to a transconductance amplifier of said operational amplifier in the reliable charge pump circuit;R
1′ is equivalent to a resistor connected between said output node of said operational amplifier and the ground;C
1 is equivalent to a capacitor connected between said output node of said operational amplifier and the ground;G
2 is equivalent to a transconductance amplifier of said NMOS transistor which is connected to said output node of said operational amplifier;R
2 is equivalent to a resistor connected between an drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;C
2′ is equivalent to a capacitor connected between said drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;s is a Laplace operator,
wherein R
1′=(R1//R3)/(R1+R3), C2′=C2+C3, given two poles W1=1/(R1′×C1), W2=1/(R2×C2′), when W1 gets larger, W2 gets smaller, therefore, said two poles W1, W2 are separated, W1 is far away from W2.12. The reliable charge pump circuit, as recited in
here, Vout/Vin(s) is a Laplace transform for a ratio of output signal and input signal;
1 is equivalent to a transconductance amplifier of said operational amplifier in the reliable charge pump circuit;1′ is equivalent to a resistor connected between said output node of said operational amplifier and the ground;1 is equivalent to a capacitor connected between said output node of said operational amplifier and the ground;2 is equivalent to a transconductance amplifier of said NMOS transistor which is connected to said output node of said operational amplifier;2 is equivalent to a resistor connected between an drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;2′ is equivalent to a capacitor connected between said drain node of said NMOS transistor which is connected to said output node of said operational amplifier and the ground;s is a Laplace operator,
wherein R
1′=(R1//R3)/(R1+R3), C2′=C2+C3, given two poles W1=1/(R1′×C1), W2=1/(R2×C2′), when W1 gets larger, W2 gets smaller, therefore, said two poles W1, W2 are separated, W1 is far away from W2.Description 1. Field of Invention The present invention relates to electronic field, and more particularly, relates to a reliable charge pump circuit which can ensure proper functionality in all conditions. 2. Description of Related Arts Both Phase-Locked Loop (PLL) and Delay Locked Loop (DLL), require to obtain a phase difference between their own output signal and input reference signal, then integrate this phase difference via a charge pump circuit, and the integrated result is reflected in control voltage VCTRL in form of varying quantity of voltage. The control voltage VCTRL is used to control a voltage controlled oscillator VCO or a voltage controlled delay line VCDL, until their phases are synchronous. The system to achieve above phase-locked loop lock process (PLL) is shown in The relevant reference is the following U.S. patents: CHARGE PUMP CIRCUIT U.S. Pat. No. 6,535,051 B2 March 2003 Kyu-hyoun Kim HIGH OUTPUT IMPEDENCE CHARGE PUMP FOR PLL/DLL U.S. Pat. No. 7,176,733 B2 February 2007 Dieter Haerle During this process, if the output voltage of the charge pump is locked on a certain value owing to some reasons such as circuit's positive feedback, or existence of multiple stable status, the process for tracking and locking the frequency of the input signal will fail. On the other hand, if the phase margin of the feedback loop is not enough, that is, the phase of the loop gain is larger than 135 degree when the magnitude of the loop gain is unity, then the whole feedback loop will oscillate, and the charge pump could not work properly. The startup and stability issues caused by the charge pump circuit are as listed below. As shown in Firstly, if at the end of the above process, the voltage of the net OUT is higher than the voltage of the net Secondly, even if at the end of the process the voltage of the net OUT is less than the voltage of the net Furthermore, if adding a startup circuit in the charge pump circuit, that is, NMOS transistors Making a small signal analysis, the open-loop transferring function of the negative feedback loop is obtained from an equivalent circuit of small signal as shown in
here, W An objective of the present invention is to provide a reliable charge pump circuit which can prevent deadlock or oscillation during the frequency locking process, so as to ensure proper functionality. Accordingly, in order to accomplish the above objective, the present invention provides a reliable charge pump circuit, comprising: an operational amplifier; an upper current mirror; a lower current mirror; an integral capacitor; a startup circuit; and an anti-lock circuit, wherein the anti-lock circuit comprises a current source and a diode-connected (the “diode-connected” is one type of transistor connections in a complementary metal oxide semiconductor (CMOS) integrated circuit, which is characterized as its drain node and its gate node are connected) NMOS transistor, which is equivalent of adding a low resistor to an output node of the operational amplifier, so as to increase the driving strength of the operational amplifier to two NMOS transistors, hence, to prevent deadlock. The anti-lock circuit further comprises a MOS capacitor connected to a noninverting input node of the operational amplifier, for improving stability. The diode-connected NMOS transistor is in saturation region and conducting all the time, so driven by the current source and the diode-connected NMOS transistor, the voltage value of the output node of the operational amplifier is always higher than either threshold voltage value of two NMOS transistors which are connected to the output node of the operational amplifier, then the two NMOS transistors will not be cut-off, so as to solve the deadlock problem. An equivalent circuit of the negative feedback circuit of the charge pump circuit is as follows: a transconductance amplifier G An open-loop transfer function of the negative feedback loop can be expressed by the following Equation:
here, Vout/Vin(s) is a Laplace transform for a ratio of the output signal to the input signal, i.e., the transfer function; G R C G R C s is a Laplace operator; and it is worth noting that in the above function: R Given two poles W The beneficial effects of the present invention are illustrated as follows: firstly, the reliable charge pump circuit can improve stability of the charge pump circuit, so as to make the charge pump circuit more stable and reliable. Secondly, the reliable charge pump circuit can prevent deadlock caused by multiple stable status, so as to improve production yield. These and other objectives, features, and advantages of the present invention will become apparent from the following detailed description, the accompanying drawings, and the appended claims. As shown in The anti-lock circuit further comprises a MOS capacitor The diode-connected NMOS transistor An equivalent circuit of the negative feedback circuit of the charge pump circuit is as follows: a transconductance amplifier G That is, to make a quantitative mathematical analysis of the reliable charge pump circuit shown in It is worth noting that using an equivalent circuit is just for making a mathematic analysis conveniently. Therefore, as equivalence, analysis of this equivalent circuit is equivalent to analysis of the original circuit. Making a mathematic analysis of the small-signal equivalent circuit shown in
here, Vout/Vin(s) is a Laplace transform for a ratio of output signal and input signal, in other words, is the transfer function; G R C G R C s is a Laplace operator; it is worth noting that in the above function: R Given two poles W One skilled in the art will understand that the embodiment of the present invention as shown in the drawings and described above is exemplary only and not intended to be limiting. It will thus be seen that the objects of the present invention have been fully and effectively accomplished. It embodiments have been shown and described for the purposes of illustrating the functional and structural principles of the present invention and is subject to change without departure from such principles. Therefore, this invention includes all modifications encompassed within the spirit and scope of the following claims. Patent Citations
Referenced by
Classifications
Legal Events
Rotate |