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Publication numberUS8222156 B2
Publication typeGrant
Application numberUS 11/618,563
Publication dateJul 17, 2012
Filing dateDec 29, 2006
Priority dateDec 29, 2006
Also published asCN101617392A, US20080160775, US20120312475, WO2008082922A1
Publication number11618563, 618563, US 8222156 B2, US 8222156B2, US-B2-8222156, US8222156 B2, US8222156B2
InventorsRajindra Dhindsa, Hudson Eric, Alexei Marakhtanov, Andreas Fischer
Original AssigneeLam Research Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method and apparatus for processing a substrate using plasma
US 8222156 B2
Abstract
Methods and arrangements for controlling the electron loss to the upper electrode, including techniques and apparatus for biasing the upper electrode more negatively to allow charged species to be trapped within the plasma chamber for a longer period of time, thereby increasing the plasma density may be increased. The induced RF signal on the upper electrode is rectified, thus biasing the upper electrode more negatively. The rectified RF signal may also be amplified, thus driving the upper electrode even more negatively, if desired.
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Claims(14)
1. A method for processing a substrate in a capacitively-coupled plasma processing system, said capacitively-coupled plasma processing system having a plasma processing chamber and at least an upper electrode and a lower electrode, said substrate being disposed on said lower electrode during plasma processing, said method comprising:
providing at least a first RF signal to said lower electrode, said first RF signal having a first RF frequency, said first RF signal coupling with a plasma in said plasma processing chamber, thereby inducing an induced RF signal on said upper electrode;
reducing or eliminating at least a positive cycle of said induced RF signal to generate a rectified RF signal such that said rectified RF signal is more negatively biased with respect to said plasma; and
processing said substrate while said rectified RF signal is provided to said upper electrode.
2. The method of claim 1 wherein said rectifying includes removing positive components of said induced RF signal.
3. The method of claim 1 further comprising providing a second RF signal to said lower electrode, said second RF signal having a second RF frequency different from said first RF signal.
4. The method of claim 3 wherein said second RF frequency is one of 2 MHz, 27 MHz and 60 MHz.
5. The method of claim 1 further comprising amplifying an amplitude of said induced RF signal to generate said rectified RF signal.
6. The method of claim I wherein said capacitively-coupled plasma processing system represents a multi-frequency capacitively-coupled plasma processing system.
7. The method of claim 1 wherein said reducing or eliminating said at least said positive cycle of said induced RF signal to generate said rectified RF signal is performed using a rectifying arrangement.
8. The method of claim 7 wherein said rectifying arrangement includes a power MOSFET.
9. The method of claim 1 further comprising:
negatively biasing said upper electrode using said rectified RF signal; and
repelling electrons from said upper electrode after said negatively biasing said upper electrode, said electrons having been emitted from said substrate.
10. The method of claim 1 further comprising amplifying an amplitude of a negative portion of said induced RF signal to generate said rectified RF signal.
11. The method of claim 1 further comprising using a rectifier circuit to perform said reducing or eliminating.
12. The method of claim 11 further comprising:
including an amplification circuit in said rectifier circuit; and
using said amplification circuit to amplify an amplitude of a negative portion of said induced RF signal.
13. The method of claim 11 wherein said rectifier circuit is coupled with said upper electrode.
14. The method of claim 11 wherein said rectifier circuit is disposed outside said plasma processing chamber.
Description
CROSS REFERENCE TO RELATED APPLICATIONS

The present invention is related to the following applications, all of which are incorporated herein by reference:

Commonly assigned application Ser. No. 11/618,583 entitled “Plasma-Enhanced Substrate Processing Method and Apparatus”, filed on even date herewith by the same inventors.

BACKGROUND OF THE INVENTION

In the processing of semiconductor substrates, plasma processing is often employed. Plasma processing may involve different plasma-generating technologies, for example, inductively-coupled plasma processing systems, capacitively-coupled plasma processing systems, microwave-generated plasma processing systems, and the like. Manufacturers often employ capacitively-coupled plasma processing systems in processes that involve the etching of materials using a photo resist mask.

Important consideration for plasma processing of substrates involves a high etch rate and a high photo resist selectivity. A high etch rate refers to the rate at which the target material is etched during plasma processing. Generally speaking, the faster the underlying layer may be etched, a greater number of wafers may be processed per unit of time. All things being equal, manufacturers desire to process more wafers per unit of time to increase wafer processing efficiency. Photo resist selectivity refers to the discrimination between the photo resist mask and the underlying target layer during etching.

As circuit density increases, manufacturers are required to etch or to form a greater number of devices per unit area on the wafer. The higher device density requires a thinner photo resist layer. The thinner photo resist layer, in turn, tends to be more susceptible to being inadvertently etched away. As a result, manufacturers constantly strive to create processing recipes that may etch the underlying layer at a high etch rate while avoiding damage to the photo resist mask.

One way to increase the etch rate is to increase the plasma density during plasma processing. In a capacitively-coupled plasma processing system, plasma density may be increased by increasing the power of the higher frequency RF signals. To facilitate discussion, FIG. 1 shows a prior art multi-frequency capacitively-coupled plasma processing system 100, representing the plasma processing system typically employed to process substrates. As seen in FIG. 1, multi-frequency capacitively-coupled plasma processing system 100 includes a chamber 102 which is disposed in between an upper electrode 104 and a lower electrode 106.

In the implementation of FIG. 1, lower electrode 106 is provided with multiple RF frequencies, such as 2 Megahertz, 27 Megahertz, and 60 Megahertz. Upper electrode 104 is grounded in the implementation of FIG. 1. Multi-frequency capacitively-coupled plasma processing system 100 also includes a plurality of confinement rings 108A, 108B, 108C, and 108D. The confinement rings 108A-108D function to confine the plasma within chamber 102 during plasma processing.

There is also shown in FIG. 1 a peripheral RF grounded ring 110, representing the RF ground for the plasma generated within chamber 102. To isolate peripheral RF ground 110 from upper electrode 104, an insulating ring 112 is typically provided. A similar insulating ring 114 is also provided to insulate lower electrode 106 from an RF ground 116. During plasma processing, the RF power provided to lower electrode 106 excites etching gas provided into chamber 102, thereby generating a plasma within chamber 102 to etch a substrate that is typically disposed on lower electrode 106 (substrate is not shown to simplify FIG. 1).

As discussed earlier, it is highly desirable to etch the target layer on the substrate while the substrate is disposed in chamber 102 without unduly damaging the overlying photo resist mask. In the prior art, increasing the etch rate of the target layer may be achieved by increasing the plasma density within chamber 102. Generally speaking, the plasma density may be increased by increasing the power level of the higher frequency RF signals that are provided to lower electrode 106. In the context of the present invention, a high frequency RF signal is defined as signals having a frequency higher than about 10 Megahertz. Conversely, RF signals with frequencies below 10 Megahertz are referred to herein as Low Frequency Signals.

However, by increasing the power level of the higher frequency RF signals (e.g., the 27 Megahertz RF signal or the 60 Megahertz RF signal of FIG. 1), it may be challenging to confine the generated plasma within chamber 102. Even if the plasma may be satisfactorily confined, electron loss to the upper electrode during plasma processing places an upper limit on the plasma density within chamber 102. It has been found that as the plasma density increases; electrons are lost to the grounded upper electrodes or other grounded surfaces of multi-frequency capacitively-coupled plasma processing system 100, thereby causing the plasma density within chamber 102 to reach a saturation point. Beyond the saturation point, increasing the RF power of the higher frequency RF signal does not increase the plasma density since the electron loss outpaces the generation of ions.

Furthermore, increasing the RF power to the higher frequency RF signals has been found to adversely affect the photo resist selectivity. At a high RF power level, the photo resist mask is damaged to a greater extent due to increased bombardment, which causes the photo resist mask to erode away at a faster rate, thereby negatively impacting the etching process.

FIG. 2 shows a prior art implementation whereby one or more high frequency RF signals 202 (e.g., the 60 Megahertz RF signal of FIG. 2) are provided to upper electrode 104 in order to provide additional control over the generation of ions within chamber 102. However, the implementation of FIG. 2 still does not solve the aforementioned problem of plasma density saturation point effect. When the RF power level of the higher frequency signal provided to upper electrode 104 is increased, the aforementioned saturation point effect is also observed, limiting the plasma density and consequently, the etch rate through the target layer irrespective of the increase in the RF power level to the higher frequency RF signals.

Additionally, other prior art implementation has tried to control the photo resist selectivity by controlling the temperature of the electrodes. It has been found that the approach of controlling the temperature of the electrodes is minimally effective in controlling the photo resist selectivity. Furthermore, the approach of controlling the temperature of the electrodes does not address the aforementioned problem of plasma density saturation point effect.

Therefore, various aforementioned prior art implementations have proven ineffective in increasing etch rate without adversely affecting or maintaining high photo resist selectivity in capacitively-coupled plasma processing system in processes that involve the etching of materials using a photo resist mask. In the prior art implementation of FIG. 1, the increase in RF power to the lower electrode may lead to unconfinement of plasma, saturation point of plasma density, and adversely affect the photo resist selectivity. Whereas in the prior art implementation of FIG. 2, the increase in RF power to the upper electrode may lead to saturation point of plasma density. Furthermore, the prior art implementation of controlling temperature of the electrodes is minimally effective in controlling the photo resist selectivity while providing no solution for the plasma density saturation effect.

SUMMARY OF INVENTION

The invention relates, in an embodiment, to a method for processing a substrate in a capacitively-coupled plasma processing system, which has a plasma processing chamber and at least an upper electrode and a lower electrode. The substrate is disposed on the lower electrode during plasma processing. The method includes providing at least a first RF signal to the lower electrode. The first RF signal has a first RF frequency. The first RF signal couples with a plasma in the plasma processing chamber, thereby inducing an induced RF signal on the upper electrode. The method also includes rectifying the induced RF signal to generate a rectified RF signal such that the rectified RF signal is more positively biased than negatively biased. The method further includes processing the substrate while the rectified RF signal is provided to the upper electrode.

The above summary relates to only one of the many embodiments of the invention disclosed herein and is not intended to limit the scope of the invention, which is set forth in the claims herein. These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:

FIG. 1 shows a prior art multi-frequency capacitively-coupled plasma processing system representing the plasma processing system typically employed to process substrates.

FIG. 2 shows a prior art implementation whereby one or more high frequency RF signals are provided to upper electrode in order to provide additional control over the generation of ions within chamber.

FIG. 3 a shows an implementation wherein a rectifier circuit is employed to rectify the induced voltage that exists on upper electrode during plasma processing.

FIG. 3 b shows an example RF signal.

FIG. 4 a shows an example plot of electron density on the y-axis versus electron energy on the x-axis for a hypothetical plasma etch process.

FIG. 4 b shows an example plot of electron density for electrons having various electron energy levels when rectification circuit is provided to trap more electrons within plasma chamber during plasma processing.

DETAILED DESCRIPTION OF EMBODIMENTS

The present invention will now be described in detail with reference to a few embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention.

Various embodiments are described hereinbelow, including methods and techniques. It should be kept in mind that the invention might also cover articles of manufacture that includes a computer readable medium on which computer-readable instructions for carrying out embodiments of the inventive technique are stored. The computer readable medium may include, for example, semiconductor, magnetic, opto-magnetic, optical, or other forms of computer readable medium for storing computer readable code. Further, the invention may also cover apparatuses for practicing embodiments of the invention. Such apparatus may include circuits, dedicated and/or programmable, to carry out tasks pertaining to embodiments of the invention. Examples of such apparatus include a general-purpose computer and/or a dedicated computing device when appropriately programmed and may include a combination of a computer/computing device and dedicated/programmable circuits adapted for the various tasks pertaining to embodiments of the invention.

In accordance with embodiments of the invention, there are provided methods and arrangements for controlling the electron loss to the upper electrode such that the plasma density may be increased without the need to unduly increase the power to the plasma. By increasing the plasma density without a concomitant increase to the RF power requirement, the target layer may be etched at a higher rate without unduly degrading the photo resist selectivity. In an embodiment, the upper electrode is configured such that the upper electrode is negatively biased, thereby allowing electrons present in the plasma chamber to be repelled from the upper electrode and trapped within the plasma chamber for a longer period of time. As the negatively charged electrons are trapped for a longer period of time, the plasma density is increased.

Generally speaking, during plasma processing the bombardment mechanism causes electrons to be emitted from the substrate. As discussed earlier, electron loss to the upper electrode limits the increase in plasma density since the electron loss creates saturation point effect which limits the plasma density increase irrespective of the RF power provided to the plasma. In an embodiment, the induced RF signal on the upper electrode is rectified, thus biasing the upper electrode more negatively. Accordingly, the electrons are repelled from the upper electrode instead of being quickly lost to the upper electrode, resulting in a greater number of electrons in the plasma, thereby increasing the plasma density. In another embodiment, the rectified RF signal is amplified, thus driving the upper electrode even more negatively. The higher plasma density may effectively etch more of the target layer to achieve the desired high etch rate. Since it is unnecessary to increase the RF power to achieve the high level of plasma density, photo resist selectivity is not adversely affected to the same degree as might have been in the prior art.

The above summary relates to only one of the many embodiments of the invention disclosed herein and is not intended to limit the scope of the invention, which is set forth in the claims herein. These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.

FIG. 3A shows, in accordance with an embodiment of the present invention, an implementation wherein a rectifier circuit 304 is employed to rectify the induced voltage that exists on upper electrode 302 during plasma processing. As the term is employed herein, rectification refers to the process of reducing or eliminating the positive cycle of the RF signal that exists on upper electrode 302.

With reference to FIG. 3B, an example RF signal 350 is shown. The dotted portion 352 and 354 of the RF signal 350 have been rectified away, leaving solid line 356 and 358, representing the negative portion of the RF signal. Since only the negative portion of the RF signal remains, the upper electrode 302 tends to be more negatively biased with respect to the plasma that exists within plasma chamber 306.

In accordance with an embodiment of the present invention, electrons 308 that are emitted from substrate 310 disposed atop lower electrode 312 accelerate away from substrate 310 due to ion bombardment across the substrate sheath or the lower sheath (lower sheath is not shown to simplify FIG. 3A). Instead of being immediately lost to upper electrode 302 (as would be the case if upper electrode 302 is grounded, for example) the negatively biased upper electrode 302 would repel electrons 308, thereby causing electrons 308 to be trapped in between upper electrode 302 and lower electrode 312 for a longer period of time. It is believed that eventually, through the mechanism of random collision, electrons 308 are eventually lost to RF ground 330. However, the longer residence time of electrons 308 within plasma chamber 306 contributes to a higher plasma density without requiring a corresponding increase in the amount of RF power supplied to plasma processing chamber 300.

Generally speaking, rectifier 304 may be constructed using any known rectification circuitry, including, for example, power MOSFET. In an embodiment, rectifier circuit 304 further includes an amplification circuit to not only eliminate the positive cycle of the RF signal but also to amplify or to reduce the amplitude of the negative portion of the RF cycle that remains. The ability to control the amplitude of the negative portion of the RF signal that remains provides another control knob for the process engineer during processing.

For example, it is known that lower energy electrons and higher energy electrons impact the etch process in different ways. Trapping the lower energy electron requires, in an embodiment, that the upper electrode 302 to be negatively biased to at least negative 100 volt. Trapping higher energy electrons requires, in an embodiment, that the upper electrode be negatively biased to a higher negative value such as negative 500 volt or negative 600 volt or more. Since a high density of higher energy electrons is believed to be beneficial for photo resist selectivity, manufacturers may desire in many cases to negatively bias upper electrode 302 to cause more of the higher energy electrons to be trapped.

FIG. 4A shows an example plot of electron density on the y-axis versus electron energy on the x-axis for a hypothetical plasma etch process. In the typical prior art case, the electron loss mechanism to the grounded upper electrode or to the upper electrode that is supplied with the higher frequency RF signal as in the case of FIG. 2, limit the plasma density that may be achieved using a given level of RF power.

In the case of FIG. 4A, the area under curve 404 represents the distribution of electrons at different energy level. The local maxima 402 of the curve 404 represent the maximum electron density at the density level Y1 of electrons having energy level 406. Notice that distribution of electrons having a higher electron energy level (such as those to the right of point 406 in FIG. 4A) do not exist at a high density level in the plasma chamber 306 during plasma processing. FIG. 4B shows an example plot of electron density for electrons having various electron energy levels when rectification circuit 304 is provided to trap more electrons within plasma chamber 306 during plasma processing.

In contrast to FIG. 4A, the electron density of the lower energy electron, e.g., those having electron density denoted by reference number 406 now increases from electron density level Y1 to a higher electron density level Y2, corresponding to maxima 452 of line 454. Further, by biasing upper electrode 302 more negatively, a greater number of higher energy electrons may be trapped.

The higher energy electrons is shown in FIG. 4B by another local maxima 462 which corresponds to the maximum electron density captured or trapped for electrons having electron energy level that corresponds to reference number 470. In the scenario of local maxima 462, not only do the lower electrons (those associated with reference 406) exist in the chamber at a higher density level but the higher energy electrons (those associated with reference number 470) also exist at a higher electron density level within the plasma processing chamber during plasma processing. These higher electron density levels contribute to a higher plasma density during plasma processing to improve the etch rate to the target layer. Note that the mechanism to increase the plasma density of FIG. 3A does not require the increase in the RF power supplied to the RF signals (such as the 2 Megahertz RF signal, the 27 Megahertz RF signal, or the 60 Megahertz RF signal in the example of FIG. 3A). Consequently, the photo resist selectivity is not negatively impacted to the same degree that would have been impacted had the higher plasma density been achieved by increasing the RF power level.

As may be appreciated from the foregoing, embodiments of the invention achieve a higher level of plasma density to improve etching through the target layer in the capacitively-coupled plasma processing chamber without unduly damaging the photo resist during etching. By providing a mechanism for increasing the plasma density without requiring a concomitant increase in the RF power level of the RF signals provided to the plasma processing chamber, plasma density is increased while photo resist selectivity is maintained the same or is minimally impacted.

While this invention has been described in terms of several preferred embodiments, there are alterations, permutations, and equivalents, which fall within the scope of this invention. Also, the title, summary, and abstract are provided herein for convenience and should not be used to construe the scope of the claims herein. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. Although various examples are provided herein, it is intended that these examples be illustrative and not limiting with respect to the invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US5057185Sep 27, 1990Oct 15, 1991Consortium For Surface Processing, Inc.Triode plasma reactor with phase modulated plasma control
US5116482Sep 24, 1990May 26, 1992Hitachi, Ltd.Film forming system using high frequency power and power supply unit for the same
US5981899 *Jan 17, 1997Nov 9, 1999Balzers AktiengesellschaftCapacitively coupled RF-plasma reactor
US6265831Mar 31, 1999Jul 24, 2001Lam Research CorporationPlasma processing method and apparatus with control of rf bias
US6642661Aug 27, 2002Nov 4, 2003Tokyo Electron LimitedGenerating and controlling radio frequency plasma
US6667577Dec 18, 2001Dec 23, 2003Applied Materials, IncPlasma reactor with spoke antenna having a VHF mode with the spokes in phase
US6744212Feb 14, 2002Jun 1, 2004Lam Research CorporationPlasma processing apparatus and method for confining an RF plasma under very high gas flow and RF power density conditions
US6849154Feb 11, 2003Feb 1, 2005Tokyo Electron LimitedPlasma etching apparatus
US7440301 *Dec 13, 2006Oct 21, 2008Huettinger Elektronik Gmbh & Co. KgHigh frequency excitation system
US7683289Dec 16, 2005Mar 23, 2010Lam Research CorporationApparatus and method for controlling plasma density profile
US20010013504Dec 15, 2000Aug 16, 2001Tokyo Electron LimitedPlasma treatment method and apparatus
US20050031796Aug 7, 2003Feb 10, 2005Taiwan Semiconductor Manufacturing Co., Ltd.Uniformity; over surface of semiconductor wafers; multizonal electrode; applying , controlling bias voltage
US20050155711 *Feb 9, 2005Jul 21, 2005Masahiro SumiyaPlasma processing apparatus and method with controlled biasing functions
US20050211384Feb 11, 2005Sep 29, 2005Tokyo Electron LimitedThermally sprayed member, electrode and plasma processing apparatus using the electrode
US20060113037 *Jan 18, 2005Jun 1, 2006Ryoji NishioPlasma processing apparatus and method for controlling the same
US20060196426Mar 9, 2006Sep 7, 2006Michael GluckVacuum plasma generator
US20070020941Aug 25, 2005Jan 25, 2007Tomoyuki TamuraPlasma etching apparatus and particle removal method
US20070044715Aug 11, 2006Mar 1, 2007Huettinger Elektronik Gmbh + Co. KgSupplying rf power to a plasma process
US20070193975 *Feb 23, 2006Aug 23, 2007Micron Technology, Inc.Using positive DC offset of bias RF to neutralize charge build-up of etch features
US20080160776Dec 29, 2006Jul 3, 2008Rajinder DhindsaPlasma-enhanced substrate processing method and apparatus
JP2000323460A Title not available
JP2001244098A Title not available
JP2006270018A Title not available
WO2006063035A2Dec 6, 2005Jun 15, 2006Varian Semiconductor EquipmentPlasma ion implantation system with axial electrostatic confinement
Non-Patent Citations
Reference
1"Final Office Action", U.S. Appl. No. 11/618,583, Mailing Date: May 16, 2011.
2"First Office Action", Issued in Chinese Application No. 200780051826.9; Mailing Date: Aug. 26, 2010.
3"International Preliminary Report on Patentability", Issued in PCT Application No. PCT/US2007/087671; Mailing Date: Jul. 9, 2009.
4"International Search Report", Issue in PCT Application No. PCT/US07/87670; Mailing Date.: Apr. 29, 2008.
5"International Search Report", Issued in PCT Application No. PCT/US2007/087671; Mailing Date: May 2, 2008.
6"Non Final Office Action", U.S. Appl. No. 11/618,583, Mailing Date: Apr. 28, 2010.
7"Non Final Office Action", U.S. Appl. No. 11/618,583, Mailing Date: Aug. 14, 2009.
8"Written Opinion", Issue in PCT Application No. PCT/US07/87670; Mailing Date.: Apr. 29, 2008.
9"Written Opinion", Issued in PCT Application No. PCT/US2007/087671; Mailing Date: May 2, 2008.
10"Written Opinion", Issued in Singapore Application No. SG 200904367-0; Mailing Date: May 20, 2010.
Classifications
U.S. Classification438/714, 156/345.44, 216/70, 156/345.24, 216/59, 216/67, 216/37
International ClassificationH01L21/302
Cooperative ClassificationH01J37/32532, H01J37/32091, H01J37/32165
European ClassificationH01J37/32M8B, H01J37/32M8H4B, H01J37/32O6
Legal Events
DateCodeEventDescription
Jun 5, 2007ASAssignment
Owner name: LAM RESEARCH CORPORATION, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DHINDSA, RAJINDER;HUDSON, ERIC;MARAKHTANOV, ALEXEI;REEL/FRAME:019381/0129;SIGNING DATES FROM 20070216 TO 20070220
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:DHINDSA, RAJINDER;HUDSON, ERIC;MARAKHTANOV, ALEXEI;SIGNING DATES FROM 20070216 TO 20070220;REEL/FRAME:019381/0129