USB506840I5 - - Google Patents
Info
- Publication number
- USB506840I5 USB506840I5 US50684074A USB506840I5 US B506840 I5 USB506840 I5 US B506840I5 US 50684074 A US50684074 A US 50684074A US B506840 I5 USB506840 I5 US B506840I5
- Authority
- US
- United States
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
- H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
- H03K23/502—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two
- H03K23/505—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two with a base which is an odd number
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/023—Shaping pulses by amplifying using field effect transistors
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19732346966 DE2346966B2 (en) | 1973-09-18 | 1973-09-18 | METHOD OF TRANSFERRING SIGNALS BETWEEN TWO CHIPS WITH FAST COMPLEMENTARY MOS CIRCUITS |
| DT2346966 | 1973-09-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| USB506840I5 true USB506840I5 (en) | 1976-03-23 |
| US4002928A US4002928A (en) | 1977-01-11 |
Family
ID=5892965
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US05/506,840 Expired - Lifetime US4002928A (en) | 1973-09-18 | 1974-09-17 | Process for transmitting signals between two chips with high-speed complementary MOS circuits |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US4002928A (en) |
| JP (1) | JPS5058958A (en) |
| BE (1) | BE820069A (en) |
| DE (1) | DE2346966B2 (en) |
| FR (1) | FR2244314B1 (en) |
| GB (1) | GB1479185A (en) |
| IT (1) | IT1021305B (en) |
| LU (1) | LU70921A1 (en) |
| NL (1) | NL7411692A (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4147940A (en) * | 1977-01-24 | 1979-04-03 | Westinghouse Electric Corp. | MOS Interface circuit |
| US4481642A (en) * | 1981-06-02 | 1984-11-06 | Texas Instruments Incorporated | Integrated circuit FSK modem |
| US4414480A (en) * | 1981-12-17 | 1983-11-08 | Storage Technology Partners | CMOS Circuit using transmission line interconnections |
| EP0129542A4 (en) * | 1982-12-27 | 1986-06-11 | Storage Technology Partners | Cmos circuit using transmission line interconnections. |
| US4572972A (en) * | 1983-01-18 | 1986-02-25 | At&T Laboratories | CMOS Logic circuits with all pull-up transistors integrated in separate chip from all pull-down transistors |
| JPS6220362A (en) * | 1985-07-19 | 1987-01-28 | Hitachi Ltd | Signal transmission circuit for laminated electric circuit |
| US4816773A (en) * | 1987-05-01 | 1989-03-28 | International Business Machines Corporation | Non-inverting repeater circuit for use in semiconductor circuit interconnections |
| US4916337A (en) * | 1989-03-07 | 1990-04-10 | Integrated Device Technology, Inc. | TTL to CMOS logic level translator |
| EP0579314B1 (en) * | 1992-07-14 | 1998-04-29 | Koninklijke Philips Electronics N.V. | System comprising an output buffer circuit and an input buffer circuit |
| TW247975B (en) * | 1992-07-14 | 1995-05-21 | Philips Electronics Nv |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3588527A (en) * | 1969-04-04 | 1971-06-28 | Westinghouse Electric Corp | Shift register using complementary induced channel field effect semiconductor devices |
| US3590273A (en) * | 1968-02-15 | 1971-06-29 | Philips Corp | Four phase logic systems |
| US3673438A (en) * | 1970-12-21 | 1972-06-27 | Burroughs Corp | Mos integrated circuit driver system |
| US3675043A (en) * | 1971-08-13 | 1972-07-04 | Anthony Geoffrey Bell | High speed dynamic buffer |
| US3676700A (en) * | 1971-02-10 | 1972-07-11 | Motorola Inc | Interface circuit for coupling bipolar to field effect transistors |
| US3731114A (en) * | 1971-07-12 | 1973-05-01 | Rca Corp | Two phase logic circuit |
| US3739200A (en) * | 1971-09-27 | 1973-06-12 | Agostino M D | Fet interface circuit |
| US3801831A (en) * | 1972-10-13 | 1974-04-02 | Motorola Inc | Voltage level shifting circuit |
| US3835457A (en) * | 1972-12-07 | 1974-09-10 | Motorola Inc | Dynamic mos ttl compatible |
-
1973
- 1973-09-18 DE DE19732346966 patent/DE2346966B2/en not_active Withdrawn
-
1974
- 1974-08-08 GB GB35054/74A patent/GB1479185A/en not_active Expired
- 1974-09-03 NL NL7411692A patent/NL7411692A/en not_active Application Discontinuation
- 1974-09-12 IT IT27202/74A patent/IT1021305B/en active
- 1974-09-12 FR FR7430843A patent/FR2244314B1/fr not_active Expired
- 1974-09-16 LU LU70921A patent/LU70921A1/xx unknown
- 1974-09-17 US US05/506,840 patent/US4002928A/en not_active Expired - Lifetime
- 1974-09-18 BE BE148663A patent/BE820069A/en unknown
- 1974-09-18 JP JP49108283A patent/JPS5058958A/ja active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3590273A (en) * | 1968-02-15 | 1971-06-29 | Philips Corp | Four phase logic systems |
| US3588527A (en) * | 1969-04-04 | 1971-06-28 | Westinghouse Electric Corp | Shift register using complementary induced channel field effect semiconductor devices |
| US3673438A (en) * | 1970-12-21 | 1972-06-27 | Burroughs Corp | Mos integrated circuit driver system |
| US3676700A (en) * | 1971-02-10 | 1972-07-11 | Motorola Inc | Interface circuit for coupling bipolar to field effect transistors |
| US3731114A (en) * | 1971-07-12 | 1973-05-01 | Rca Corp | Two phase logic circuit |
| US3675043A (en) * | 1971-08-13 | 1972-07-04 | Anthony Geoffrey Bell | High speed dynamic buffer |
| US3739200A (en) * | 1971-09-27 | 1973-06-12 | Agostino M D | Fet interface circuit |
| US3801831A (en) * | 1972-10-13 | 1974-04-02 | Motorola Inc | Voltage level shifting circuit |
| US3835457A (en) * | 1972-12-07 | 1974-09-10 | Motorola Inc | Dynamic mos ttl compatible |
Non-Patent Citations (1)
| Title |
|---|
| IBM Tech. Disc. Bulletin, vol. 16, No. 5, 10/1973, "Low-Power Gated Receiver", by Chin et al. * |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1479185A (en) | 1977-07-06 |
| DE2346966B2 (en) | 1976-07-29 |
| IT1021305B (en) | 1978-01-30 |
| US4002928A (en) | 1977-01-11 |
| FR2244314A1 (en) | 1975-04-11 |
| FR2244314B1 (en) | 1979-08-03 |
| DE2346966A1 (en) | 1975-04-17 |
| JPS5058958A (en) | 1975-05-22 |
| BE820069A (en) | 1975-01-16 |
| NL7411692A (en) | 1975-03-20 |
| LU70921A1 (en) | 1975-02-24 |