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Publication numberUSD235554 S
Publication typeGrant
Publication dateJun 24, 1975
Filing dateNov 8, 1973
Publication numberUS D235554 S, US D235554S, US-S-D235554, USD235554 S, USD235554S
InventorsRonald J. Portugal
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electrical socket
US D235554 S
Abstract  available in
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Claims  available in
Description  (OCR text may contain errors)

Des. 235,554 Patented June 24, 1975 United States Patent ELECTRICAL SOCKET Ronald J. Portugal,

North Haven, Conn., assignor to Continental Specialties Corporation, New Haven, Conn.

Filed Nov. 8, 1973, Ser. No. 413,919

Term of patent 14 years Int. Cl. D13-03 US. Cl. D26-1 B FIG. 1 is a top plan view of an electrical socket of my The front and rear apertures of FIGS. 1, 3, and 9 are new design; partially shown for convenience of illustration, it being FIG. 2 is a side elevational view looking from the right understood that the apertures would normally appear in of FIG. 1; the areas indicated.

FIG. 3 is a bottom plan view of the electrical socket I claim: of FIG. 1',

The ornamental design for an electrical socket, substantially as shown and described.

FIG. 4 is a side elevational view of the electrical socket of FIG. 1 looking from the left of FIG. 1;

FIG. 5 is an end view of the electrical socket R ferelw s Cit d looking from the bottom of FIG. 1 UNITED STATES PATENTS of FIG. 1, the opposite end view EXGRH SZQ w Tommi DF999 333 .333 a id n 7 W n H omonfl mnmmm 380.1 HOGUB 0040 65667 99999 11111 4537 1 90699 27633 088000 0243 J WJQJ. 2233 D f w o m M M m y H W a 6 .m m .m v a .l M M e b m looking from the top of FIG. I being 51.1 tical;

FIG. 6 is a sectional view taken along FIG. 1;

FIG. 7 is an enlarged fragmentary section along line 77 of FIG. 1;

FIG. 8 is an enlarged fragmentary top plan view of FOREIGN PATENTS the electrical Socket; 7/1969 Great Britain 339 12s R OTHER REFERENCES Circuits Manufacturing, December 1970, p. 6, connec- 1,159,048 FIG. 9 1s a top plan view of a second embodiment of r 0 t t. ea kvm a S ym MTRHF m.m n i. en Bumm dt a wm .m m t fwmw 0 w m e e .tee vdmv n a l n pm muu m w m nw O hE ou a R .OII mu sG S 0.11 6 n h n nTw W V n'l .mmwa F a m h.w. SIU

SUSIE J. MERCER, Primary Examiner and 4; and

FIG. 11 is an end view looking from the top of FIG. 10, the end view from the bottom of FIG. 10 being substantially identical.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6650548Jun 5, 2002Nov 18, 2003Paul A. SwetlandApparatus, method and system for interfacing electronic circuits
US7012196Sep 16, 2003Mar 14, 2006Swetland Paul AApparatus, method and system for interfacing electronic circuits
US7081591Nov 18, 2003Jul 25, 2006Swetland Paul ACircuit board