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Publication numberUSD313586 S
Publication typeGrant
Application numberUS 06/934,373
Publication dateJan 8, 1991
Filing dateNov 24, 1986
Publication number06934373, 934373, US D313586 S, US D313586S, US-S-D313586, USD313586 S, USD313586S
InventorsJoseph I. Vitek
Original AssigneeWestinghouse Electric Corp.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Integrated circuit chip carrier
US D313586 S
Abstract  available in
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  1. The ornamental design for an integrated circuit chip carrier, as shown and described.

FIG. 1 is a perspective view of an integrated circuit chip carrier showing my new design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a bottom plan view thereof;

FIG. 4 is an end elevational view thereof; and

FIG. 5 is a side elevational view thereof, the opposite side elevational view being a mirror image.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US8523163 *Jan 29, 2009Sep 3, 2013Techwing., Co. Ltd.Insert for carrier board of test handler
US20090196719 *Jan 29, 2009Aug 6, 2009Techwing Co., Ltd.Insert for carrier board of test handler
U.S. ClassificationD13/182, D03/314