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Publication numberUSD341418 S
Publication typeGrant
Application numberUS 07/748,061
Publication dateNov 16, 1993
Filing dateAug 21, 1991
Priority dateFeb 22, 1991
Publication number07748061, 748061, US D341418 S, US D341418S, US-S-D341418, USD341418 S, USD341418S
InventorsMasami Akimoto
Original AssigneeTokyo Electron Limited, Tokyo Electron Kyushu Limited
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Supply nozzle for applying liquid resist to a semiconductor wafer
US D341418 S
Images(2)
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Claims(1)
  1. The ornamental design for supply nozzle for applying liquid resist to a semiconductor wafer, as shown and described.
Description

FIG. 1 is a top, front and left side perspective view of supply nozzle for applying liquid resist to a semiconductor wafer showing my new design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a front elevational view thereof, the rear being a mirror image;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a bottom plan view thereof;

FIG. 7 is a cross-sectional view thereof taken on line 7--7 in FIG. 3; and,

FIG. 8 is a cross-sectional view thereof taken on line 8--8 in FIG. 2.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6248171Dec 28, 1998Jun 19, 2001Silicon Valley Group, Inc.Yield and line width performance for liquid polymers and other materials
US6669779Mar 5, 2001Dec 30, 2003Asml Holding N.V.Yield and line width performance for liquid polymers and other materials
US6689215Oct 3, 2002Feb 10, 2004Asml Holdings, N.V.Method and apparatus for mitigating cross-contamination between liquid dispensing jets in close proximity to a surface
US6746826Jul 25, 2000Jun 8, 2004Asml Holding N.V.Method for an improved developing process in wafer photolithography
US7208262Dec 7, 2004Apr 24, 2007Asml Holdings N.V.Yield and line width performance for liquid polymers and other materials
US7357842Apr 22, 2005Apr 15, 2008Sokudo Co., Ltd.Cluster tool architecture for processing a substrate
US7625692Nov 8, 2006Dec 1, 2009Asml Holding N.V.Photolithography microelectronic fabrication; minimizing precipitation of developing reactant; involves rinsing polymer layer with an additional charge of developer fluid to minimize a sudden change in pH; and then rinsing said polymer layer with a rinse fluid of different chemistry than developer
US7651306Dec 22, 2005Jan 26, 2010Applied Materials, Inc.Cartesian robot cluster tool architecture
US7694647Jul 19, 2006Apr 13, 2010Applied Materials, Inc.Cluster tool architecture for processing a substrate
US7699021Jan 30, 2006Apr 20, 2010Sokudo Co., Ltd.Cluster tool substrate throughput optimization
US7743728Apr 21, 2008Jun 29, 2010Applied Materials, Inc.Cluster tool architecture for processing a substrate
US7798764Oct 27, 2006Sep 21, 2010Applied Materials, Inc.Substrate processing sequence in a cartesian robot cluster tool
US7925377Jul 19, 2006Apr 12, 2011Applied Materials, Inc.Cluster tool architecture for processing a substrate
US8066466Jul 20, 2010Nov 29, 2011Applied Materials, Inc.Substrate processing sequence in a Cartesian robot cluster tool
US8550031Jun 15, 2012Oct 8, 2013Applied Materials, Inc.Cluster tool architecture for processing a substrate
Classifications
U.S. ClassificationD23/213