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Publication numberUSD350490 S
Publication typeGrant
Application numberUS 29/006,815
Publication dateSep 13, 1994
Filing dateApr 7, 1993
Priority dateOct 8, 1992
Publication number006815, 29006815, US D350490 S, US D350490S, US-S-D350490, USD350490 S, USD350490S
InventorsItaru Takao
Original AssigneeTokyo Electron Kabushiki Kaisha, Tokyo Electron Yamanashi Kabushiki Kaisha
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor wafer testing apparatus
US D350490 S
Abstract  available in
Images(7)
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Claims(1)
  1. The ornamental design for semiconductor wafer testing apparatus, as shown and described.
Description

FIG. 1 is a top, front and right side perspective view of a semiconductor wafer testing apparatus showing my new design;

FIG. 2 is a top plan view;

FIG. 3 is a front elevational view;

FIG. 4 is a left side elevational view;

FIG. 5 is a right side elevational view;

FIG. 6 is a rear elevational view; and,

FIG. 7 is a bottom plan view thereof.

Non-Patent Citations
Reference
1Fully Automatic Wafer Prober Model 785, Tokyo Electron Limited, p. 2.
Classifications
U.S. ClassificationD10/46, D10/75